1 //===-- Mips/MipsCodeEmitter.cpp - Convert Mips Code to Machine Code ------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===---------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Mips machine instructions
11 // into relocatable machine code.
13 //===---------------------------------------------------------------------===//
16 #include "MCTargetDesc/MipsBaseInfo.h"
17 #include "MipsInstrInfo.h"
18 #include "MipsRelocations.h"
19 #include "MipsSubtarget.h"
20 #include "MipsTargetMachine.h"
21 #include "llvm/ADT/Statistic.h"
22 #include "llvm/CodeGen/JITCodeEmitter.h"
23 #include "llvm/CodeGen/MachineConstantPool.h"
24 #include "llvm/CodeGen/MachineFunctionPass.h"
25 #include "llvm/CodeGen/MachineInstr.h"
26 #include "llvm/CodeGen/MachineInstrBuilder.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/CodeGen/MachineModuleInfo.h"
29 #include "llvm/CodeGen/MachineOperand.h"
30 #include "llvm/CodeGen/Passes.h"
31 #include "llvm/IR/Constants.h"
32 #include "llvm/IR/DerivedTypes.h"
33 #include "llvm/PassManager.h"
34 #include "llvm/Support/Debug.h"
35 #include "llvm/Support/ErrorHandling.h"
36 #include "llvm/Support/raw_ostream.h"
43 #define DEBUG_TYPE "jit"
45 STATISTIC(NumEmitted, "Number of machine instructions emitted");
49 class MipsCodeEmitter : public MachineFunctionPass {
51 const MipsInstrInfo *II;
53 const MipsSubtarget *Subtarget;
56 const std::vector<MachineConstantPoolEntry> *MCPEs;
57 const std::vector<MachineJumpTableEntry> *MJTEs;
60 void getAnalysisUsage(AnalysisUsage &AU) const override {
61 AU.addRequired<MachineModuleInfo> ();
62 MachineFunctionPass::getAnalysisUsage(AU);
68 MipsCodeEmitter(TargetMachine &tm, JITCodeEmitter &mce)
69 : MachineFunctionPass(ID), JTI(nullptr), II(nullptr), TD(nullptr),
70 TM(tm), MCE(mce), MCPEs(nullptr), MJTEs(nullptr),
71 IsPIC(TM.getRelocationModel() == Reloc::PIC_) {}
73 bool runOnMachineFunction(MachineFunction &MF) override;
75 const char *getPassName() const override {
76 return "Mips Machine Code Emitter";
79 /// getBinaryCodeForInstr - This function, generated by the
80 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
81 /// machine instructions.
82 uint64_t getBinaryCodeForInstr(const MachineInstr &MI) const;
84 void emitInstruction(MachineBasicBlock::instr_iterator MI,
85 MachineBasicBlock &MBB);
89 void emitWord(unsigned Word);
91 /// Routines that handle operands which add machine relocations which are
92 /// fixed up by the relocation stage.
93 void emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
94 bool MayNeedFarStub) const;
95 void emitExternalSymbolAddress(const char *ES, unsigned Reloc) const;
96 void emitConstPoolAddress(unsigned CPI, unsigned Reloc) const;
97 void emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const;
98 void emitMachineBasicBlock(MachineBasicBlock *BB, unsigned Reloc) const;
100 /// getMachineOpValue - Return binary encoding of operand. If the machine
101 /// operand requires relocation, record the relocation and return zero.
102 unsigned getMachineOpValue(const MachineInstr &MI,
103 const MachineOperand &MO) const;
105 unsigned getRelocation(const MachineInstr &MI,
106 const MachineOperand &MO) const;
108 unsigned getJumpTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
109 unsigned getJumpTargetOpValueMM(const MachineInstr &MI, unsigned OpNo) const;
110 unsigned getBranchTargetOpValueMM(const MachineInstr &MI,
111 unsigned OpNo) const;
113 unsigned getBranchTarget21OpValue(const MachineInstr &MI,
114 unsigned OpNo) const;
115 unsigned getBranchTarget26OpValue(const MachineInstr &MI,
116 unsigned OpNo) const;
117 unsigned getJumpOffset16OpValue(const MachineInstr &MI, unsigned OpNo) const;
119 unsigned getBranchTargetOpValue(const MachineInstr &MI, unsigned OpNo) const;
120 unsigned getMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
121 unsigned getMemEncodingMMImm12(const MachineInstr &MI, unsigned OpNo) const;
122 unsigned getMSAMemEncoding(const MachineInstr &MI, unsigned OpNo) const;
123 unsigned getSizeExtEncoding(const MachineInstr &MI, unsigned OpNo) const;
124 unsigned getSizeInsEncoding(const MachineInstr &MI, unsigned OpNo) const;
125 unsigned getLSAImmEncoding(const MachineInstr &MI, unsigned OpNo) const;
126 unsigned getSimm19Lsl2Encoding(const MachineInstr &MI, unsigned OpNo) const;
127 unsigned getSimm18Lsl3Encoding(const MachineInstr &MI, unsigned OpNo) const;
129 /// Expand pseudo instructions with accumulator register operands.
130 void expandACCInstr(MachineBasicBlock::instr_iterator MI,
131 MachineBasicBlock &MBB, unsigned Opc) const;
133 void expandPseudoIndirectBranch(MachineBasicBlock::instr_iterator MI,
134 MachineBasicBlock &MBB) const;
136 /// \brief Expand pseudo instruction. Return true if MI was expanded.
137 bool expandPseudos(MachineBasicBlock::instr_iterator &MI,
138 MachineBasicBlock &MBB) const;
142 char MipsCodeEmitter::ID = 0;
144 bool MipsCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
145 MipsTargetMachine &Target = static_cast<MipsTargetMachine &>(
146 const_cast<TargetMachine &>(MF.getTarget()));
148 JTI = Target.getJITInfo();
149 II = Target.getInstrInfo();
150 TD = Target.getDataLayout();
151 Subtarget = &TM.getSubtarget<MipsSubtarget> ();
152 MCPEs = &MF.getConstantPool()->getConstants();
154 if (MF.getJumpTableInfo()) MJTEs = &MF.getJumpTableInfo()->getJumpTables();
155 JTI->Initialize(MF, IsPIC, Subtarget->isLittle());
156 MCE.setModuleInfo(&getAnalysis<MachineModuleInfo> ());
159 DEBUG(errs() << "JITTing function '"
160 << MF.getName() << "'\n");
161 MCE.startFunction(MF);
163 for (MachineFunction::iterator MBB = MF.begin(), E = MF.end();
165 MCE.StartMachineBasicBlock(MBB);
166 for (MachineBasicBlock::instr_iterator I = MBB->instr_begin(),
167 E = MBB->instr_end(); I != E;)
168 emitInstruction(*I++, *MBB);
170 } while (MCE.finishFunction(MF));
175 unsigned MipsCodeEmitter::getRelocation(const MachineInstr &MI,
176 const MachineOperand &MO) const {
177 // NOTE: This relocations are for static.
178 uint64_t TSFlags = MI.getDesc().TSFlags;
179 uint64_t Form = TSFlags & MipsII::FormMask;
180 if (Form == MipsII::FrmJ)
181 return Mips::reloc_mips_26;
182 if ((Form == MipsII::FrmI || Form == MipsII::FrmFI)
184 return Mips::reloc_mips_pc16;
185 if (Form == MipsII::FrmI && MI.getOpcode() == Mips::LUi)
186 return Mips::reloc_mips_hi;
187 return Mips::reloc_mips_lo;
190 unsigned MipsCodeEmitter::getJumpTargetOpValue(const MachineInstr &MI,
191 unsigned OpNo) const {
192 MachineOperand MO = MI.getOperand(OpNo);
194 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
195 else if (MO.isSymbol())
196 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
198 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
200 llvm_unreachable("Unexpected jump target operand kind.");
204 unsigned MipsCodeEmitter::getJumpTargetOpValueMM(const MachineInstr &MI,
205 unsigned OpNo) const {
206 llvm_unreachable("Unimplemented function.");
210 unsigned MipsCodeEmitter::getBranchTargetOpValueMM(const MachineInstr &MI,
211 unsigned OpNo) const {
212 llvm_unreachable("Unimplemented function.");
216 unsigned MipsCodeEmitter::getBranchTarget21OpValue(const MachineInstr &MI,
217 unsigned OpNo) const {
218 llvm_unreachable("Unimplemented function.");
222 unsigned MipsCodeEmitter::getBranchTarget26OpValue(const MachineInstr &MI,
223 unsigned OpNo) const {
224 llvm_unreachable("Unimplemented function.");
228 unsigned MipsCodeEmitter::getJumpOffset16OpValue(const MachineInstr &MI,
229 unsigned OpNo) const {
230 llvm_unreachable("Unimplemented function.");
234 unsigned MipsCodeEmitter::getBranchTargetOpValue(const MachineInstr &MI,
235 unsigned OpNo) const {
236 MachineOperand MO = MI.getOperand(OpNo);
237 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
241 unsigned MipsCodeEmitter::getMemEncoding(const MachineInstr &MI,
242 unsigned OpNo) const {
243 // Base register is encoded in bits 20-16, offset is encoded in bits 15-0.
244 assert(MI.getOperand(OpNo).isReg());
245 unsigned RegBits = getMachineOpValue(MI, MI.getOperand(OpNo)) << 16;
246 return (getMachineOpValue(MI, MI.getOperand(OpNo+1)) & 0xFFFF) | RegBits;
249 unsigned MipsCodeEmitter::getMemEncodingMMImm12(const MachineInstr &MI,
250 unsigned OpNo) const {
251 llvm_unreachable("Unimplemented function.");
255 unsigned MipsCodeEmitter::getMSAMemEncoding(const MachineInstr &MI,
256 unsigned OpNo) const {
257 llvm_unreachable("Unimplemented function.");
261 unsigned MipsCodeEmitter::getSizeExtEncoding(const MachineInstr &MI,
262 unsigned OpNo) const {
263 // size is encoded as size-1.
264 return getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
267 unsigned MipsCodeEmitter::getSizeInsEncoding(const MachineInstr &MI,
268 unsigned OpNo) const {
269 // size is encoded as pos+size-1.
270 return getMachineOpValue(MI, MI.getOperand(OpNo-1)) +
271 getMachineOpValue(MI, MI.getOperand(OpNo)) - 1;
274 unsigned MipsCodeEmitter::getLSAImmEncoding(const MachineInstr &MI,
275 unsigned OpNo) const {
276 llvm_unreachable("Unimplemented function.");
280 unsigned MipsCodeEmitter::getSimm18Lsl3Encoding(const MachineInstr &MI,
281 unsigned OpNo) const {
282 llvm_unreachable("Unimplemented function.");
286 unsigned MipsCodeEmitter::getSimm19Lsl2Encoding(const MachineInstr &MI,
287 unsigned OpNo) const {
288 llvm_unreachable("Unimplemented function.");
292 /// getMachineOpValue - Return binary encoding of operand. If the machine
293 /// operand requires relocation, record the relocation and return zero.
294 unsigned MipsCodeEmitter::getMachineOpValue(const MachineInstr &MI,
295 const MachineOperand &MO) const {
297 return TM.getRegisterInfo()->getEncodingValue(MO.getReg());
299 return static_cast<unsigned>(MO.getImm());
300 else if (MO.isGlobal())
301 emitGlobalAddress(MO.getGlobal(), getRelocation(MI, MO), true);
302 else if (MO.isSymbol())
303 emitExternalSymbolAddress(MO.getSymbolName(), getRelocation(MI, MO));
305 emitConstPoolAddress(MO.getIndex(), getRelocation(MI, MO));
307 emitJumpTableAddress(MO.getIndex(), getRelocation(MI, MO));
309 emitMachineBasicBlock(MO.getMBB(), getRelocation(MI, MO));
311 llvm_unreachable("Unable to encode MachineOperand!");
315 void MipsCodeEmitter::emitGlobalAddress(const GlobalValue *GV, unsigned Reloc,
316 bool MayNeedFarStub) const {
317 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(), Reloc,
318 const_cast<GlobalValue *>(GV), 0,
322 void MipsCodeEmitter::
323 emitExternalSymbolAddress(const char *ES, unsigned Reloc) const {
324 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
328 void MipsCodeEmitter::emitConstPoolAddress(unsigned CPI, unsigned Reloc) const {
329 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
330 Reloc, CPI, 0, false));
333 void MipsCodeEmitter::
334 emitJumpTableAddress(unsigned JTIndex, unsigned Reloc) const {
335 MCE.addRelocation(MachineRelocation::getJumpTable(MCE.getCurrentPCOffset(),
336 Reloc, JTIndex, 0, false));
339 void MipsCodeEmitter::emitMachineBasicBlock(MachineBasicBlock *BB,
340 unsigned Reloc) const {
341 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
345 void MipsCodeEmitter::emitInstruction(MachineBasicBlock::instr_iterator MI,
346 MachineBasicBlock &MBB) {
347 DEBUG(errs() << "JIT: " << (void*)MCE.getCurrentPCValue() << ":\t" << *MI);
349 // Expand pseudo instruction. Skip if MI was not expanded.
350 if (((MI->getDesc().TSFlags & MipsII::FormMask) == MipsII::Pseudo) &&
351 !expandPseudos(MI, MBB))
354 MCE.processDebugLoc(MI->getDebugLoc(), true);
356 emitWord(getBinaryCodeForInstr(*MI));
357 ++NumEmitted; // Keep track of the # of mi's emitted
359 MCE.processDebugLoc(MI->getDebugLoc(), false);
362 void MipsCodeEmitter::emitWord(unsigned Word) {
363 DEBUG(errs() << " 0x";
364 errs().write_hex(Word) << "\n");
365 if (Subtarget->isLittle())
366 MCE.emitWordLE(Word);
368 MCE.emitWordBE(Word);
371 void MipsCodeEmitter::expandACCInstr(MachineBasicBlock::instr_iterator MI,
372 MachineBasicBlock &MBB,
373 unsigned Opc) const {
374 // Expand "pseudomult $ac0, $t0, $t1" to "mult $t0, $t1".
375 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opc))
376 .addReg(MI->getOperand(1).getReg()).addReg(MI->getOperand(2).getReg());
379 void MipsCodeEmitter::expandPseudoIndirectBranch(
380 MachineBasicBlock::instr_iterator MI, MachineBasicBlock &MBB) const {
381 // This logic is duplicated from MipsAsmPrinter::emitPseudoIndirectBranch()
382 bool HasLinkReg = false;
385 if (Subtarget->hasMips64r6()) {
386 // MIPS64r6 should use (JALR64 ZERO_64, $rs)
387 Opcode = Mips::JALR64;
389 } else if (Subtarget->hasMips32r6()) {
390 // MIPS32r6 should use (JALR ZERO, $rs)
393 } else if (Subtarget->inMicroMipsMode())
394 // microMIPS should use (JR_MM $rs)
395 Opcode = Mips::JR_MM;
397 // Everything else should use (JR $rs)
401 auto MIB = BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Opcode));
404 unsigned ZeroReg = Subtarget->isGP64bit() ? Mips::ZERO_64 : Mips::ZERO;
408 MIB.addReg(MI->getOperand(0).getReg());
411 bool MipsCodeEmitter::expandPseudos(MachineBasicBlock::instr_iterator &MI,
412 MachineBasicBlock &MBB) const {
413 switch (MI->getOpcode()) {
415 llvm_unreachable("Unhandled pseudo");
418 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::SLL), Mips::ZERO)
419 .addReg(Mips::ZERO).addImm(0);
422 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BEQ)).addReg(Mips::ZERO)
423 .addReg(Mips::ZERO).addOperand(MI->getOperand(0));
426 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::BREAK)).addImm(0)
429 case Mips::JALRPseudo:
430 BuildMI(MBB, &*MI, MI->getDebugLoc(), II->get(Mips::JALR), Mips::RA)
431 .addReg(MI->getOperand(0).getReg());
433 case Mips::PseudoMULT:
434 expandACCInstr(MI, MBB, Mips::MULT);
436 case Mips::PseudoMULTu:
437 expandACCInstr(MI, MBB, Mips::MULTu);
439 case Mips::PseudoSDIV:
440 expandACCInstr(MI, MBB, Mips::SDIV);
442 case Mips::PseudoUDIV:
443 expandACCInstr(MI, MBB, Mips::UDIV);
445 case Mips::PseudoMADD:
446 expandACCInstr(MI, MBB, Mips::MADD);
448 case Mips::PseudoMADDU:
449 expandACCInstr(MI, MBB, Mips::MADDU);
451 case Mips::PseudoMSUB:
452 expandACCInstr(MI, MBB, Mips::MSUB);
454 case Mips::PseudoMSUBU:
455 expandACCInstr(MI, MBB, Mips::MSUBU);
457 case Mips::PseudoReturn:
458 case Mips::PseudoReturn64:
459 case Mips::PseudoIndirectBranch:
460 case Mips::PseudoIndirectBranch64:
461 expandPseudoIndirectBranch(MI, MBB);
463 case TargetOpcode::CFI_INSTRUCTION:
464 case TargetOpcode::IMPLICIT_DEF:
465 case TargetOpcode::KILL:
470 (MI--)->eraseFromBundle();
474 /// createMipsJITCodeEmitterPass - Return a pass that emits the collected Mips
475 /// code to the specified MCE object.
476 FunctionPass *llvm::createMipsJITCodeEmitterPass(MipsTargetMachine &TM,
477 JITCodeEmitter &JCE) {
478 return new MipsCodeEmitter(TM, JCE);
481 #include "MipsGenCodeEmitter.inc"