1 //===-- Mips16RegisterInfo.cpp - MIPS16 Register Information --------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the MIPS16 implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "Mips16RegisterInfo.h"
16 #include "Mips16InstrInfo.h"
17 #include "MipsAnalyzeImmediate.h"
18 #include "MipsInstrInfo.h"
19 #include "MipsMachineFunction.h"
20 #include "MipsSubtarget.h"
21 #include "llvm/ADT/BitVector.h"
22 #include "llvm/ADT/STLExtras.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineFunction.h"
25 #include "llvm/CodeGen/MachineInstrBuilder.h"
26 #include "llvm/CodeGen/MachineRegisterInfo.h"
27 #include "llvm/IR/Constants.h"
28 #include "llvm/IR/DebugInfo.h"
29 #include "llvm/IR/Function.h"
30 #include "llvm/IR/Type.h"
31 #include "llvm/Support/CommandLine.h"
32 #include "llvm/Support/Debug.h"
33 #include "llvm/Support/ErrorHandling.h"
34 #include "llvm/Support/raw_ostream.h"
35 #include "llvm/Target/TargetFrameLowering.h"
36 #include "llvm/Target/TargetInstrInfo.h"
37 #include "llvm/Target/TargetMachine.h"
38 #include "llvm/Target/TargetOptions.h"
42 #define DEBUG_TYPE "mips16-registerinfo"
44 Mips16RegisterInfo::Mips16RegisterInfo(const MipsSubtarget &ST)
45 : MipsRegisterInfo(ST) {}
47 bool Mips16RegisterInfo::requiresRegisterScavenging
48 (const MachineFunction &MF) const {
51 bool Mips16RegisterInfo::requiresFrameIndexScavenging
52 (const MachineFunction &MF) const {
56 bool Mips16RegisterInfo::useFPForScavengingIndex
57 (const MachineFunction &MF) const {
61 bool Mips16RegisterInfo::saveScavengerRegister
62 (MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator I,
64 MachineBasicBlock::iterator &UseMI,
65 const TargetRegisterClass *RC,
68 const TargetInstrInfo &TII =
69 *MBB.getParent()->getTarget().getSubtargetImpl()->getInstrInfo();
70 TII.copyPhysReg(MBB, I, DL, Mips::T0, Reg, true);
71 TII.copyPhysReg(MBB, UseMI, DL, Reg, Mips::T0, true);
75 const TargetRegisterClass *
76 Mips16RegisterInfo::intRegClass(unsigned Size) const {
78 return &Mips::CPU16RegsRegClass;
81 void Mips16RegisterInfo::eliminateFI(MachineBasicBlock::iterator II,
82 unsigned OpNo, int FrameIndex,
84 int64_t SPOffset) const {
85 MachineInstr &MI = *II;
86 MachineFunction &MF = *MI.getParent()->getParent();
87 MachineFrameInfo *MFI = MF.getFrameInfo();
89 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
94 MinCSFI = CSI[0].getFrameIdx();
95 MaxCSFI = CSI[CSI.size() - 1].getFrameIdx();
98 // The following stack frame objects are always
99 // referenced relative to $sp:
100 // 1. Outgoing arguments.
101 // 2. Pointer to dynamically allocated stack space.
102 // 3. Locations for callee-saved registers.
103 // Everything else is referenced relative to whatever register
104 // getFrameRegister() returns.
107 if (FrameIndex >= MinCSFI && FrameIndex <= MaxCSFI)
110 const TargetFrameLowering *TFI =
111 MF.getTarget().getSubtargetImpl()->getFrameLowering();
112 if (TFI->hasFP(MF)) {
116 if ((MI.getNumOperands()> OpNo+2) && MI.getOperand(OpNo+2).isReg())
117 FrameReg = MI.getOperand(OpNo+2).getReg();
122 // Calculate final offset.
123 // - There is no need to change the offset if the frame object
125 // following: an outgoing argument, pointer to a dynamically allocated
126 // stack space or a $gp restore location,
127 // - If the frame object is any of the following,
128 // its offset must be adjusted
129 // by adding the size of the stack:
130 // incoming argument, callee-saved register location or local variable.
133 Offset = SPOffset + (int64_t)StackSize;
134 Offset += MI.getOperand(OpNo + 1).getImm();
137 DEBUG(errs() << "Offset : " << Offset << "\n" << "<--------->\n");
139 if (!MI.isDebugValue() &&
140 !Mips16InstrInfo::validImmediate(MI.getOpcode(), FrameReg, Offset)) {
141 MachineBasicBlock &MBB = *MI.getParent();
142 DebugLoc DL = II->getDebugLoc();
144 const Mips16InstrInfo &TII =
145 *static_cast<const Mips16InstrInfo *>(
146 MBB.getParent()->getTarget().getSubtargetImpl()->getInstrInfo());
147 FrameReg = TII.loadImmediate(FrameReg, Offset, MBB, II, DL, NewImm);
148 Offset = SignExtend64<16>(NewImm);
151 MI.getOperand(OpNo).ChangeToRegister(FrameReg, false, false, IsKill);
152 MI.getOperand(OpNo + 1).ChangeToImmediate(Offset);