lib/Target/Mips/Mips16ISelLowering.h

   1 //===-- Mips16ISelLowering.h - Mips16 DAG Lowering Interface ----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // Subclass of MipsTargetLowering specialized for mips16.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #ifndef MIPS16ISELLOWERING_H
  15 #define MIPS16ISELLOWERING_H
  16
  17 #include "MipsISelLowering.h"
  18
  19 namespace llvm {
  20   class Mips16TargetLowering : public MipsTargetLowering  {
  21   public:
  22     explicit Mips16TargetLowering(MipsTargetMachine &TM,
  23                                   const MipsSubtarget &STI);
  24
  25     bool allowsUnalignedMemoryAccesses(EVT VT, unsigned AddrSpace,
  26                                        bool *Fast) const override;
  27
  28     MachineBasicBlock *
  29     EmitInstrWithCustomInserter(MachineInstr *MI,
  30                                 MachineBasicBlock *MBB) const override;
  31
  32   private:
  33     bool isEligibleForTailCallOptimization(const MipsCC &MipsCCInfo,
  34                                      unsigned NextStackOffset,
  35                                      const MipsFunctionInfo& FI) const override;
  36
  37     void setMips16HardFloatLibCalls();
  38
  39     unsigned int
  40       getMips16HelperFunctionStubNumber(ArgListTy &Args) const;
  41
  42     const char *getMips16HelperFunction
  43       (Type* RetTy, ArgListTy &Args, bool &needHelper) const;
  44
  45     void
  46     getOpndList(SmallVectorImpl<SDValue> &Ops,
  47                 std::deque< std::pair<unsigned, SDValue> > &RegsToPass,
  48                 bool IsPICCall, bool GlobalOrExternal, bool InternalLinkage,
  49                 CallLoweringInfo &CLI, SDValue Callee,
  50                 SDValue Chain) const override;
  51
  52     MachineBasicBlock *emitSel16(unsigned Opc, MachineInstr *MI,
  53                                  MachineBasicBlock *BB) const;
  54
  55     MachineBasicBlock *emitSeliT16(unsigned Opc1, unsigned Opc2,
  56                                    MachineInstr *MI,
  57                                    MachineBasicBlock *BB) const;
  58
  59     MachineBasicBlock *emitSelT16(unsigned Opc1, unsigned Opc2,
  60                                   MachineInstr *MI,
  61                                   MachineBasicBlock *BB) const;
  62
  63     MachineBasicBlock *emitFEXT_T8I816_ins(unsigned BtOpc, unsigned CmpOpc,
  64                                            MachineInstr *MI,
  65                                            MachineBasicBlock *BB) const;
  66
  67     MachineBasicBlock *emitFEXT_T8I8I16_ins(
  68       unsigned BtOpc, unsigned CmpiOpc, unsigned CmpiXOpc, bool ImmSigned,
  69       MachineInstr *MI,  MachineBasicBlock *BB) const;
  70
  71     MachineBasicBlock *emitFEXT_CCRX16_ins(
  72       unsigned SltOpc,
  73       MachineInstr *MI,  MachineBasicBlock *BB) const;
  74
  75     MachineBasicBlock *emitFEXT_CCRXI16_ins(
  76       unsigned SltiOpc, unsigned SltiXOpc,
  77       MachineInstr *MI,  MachineBasicBlock *BB )const;
  78   };
  79 }
  80
  81 #endif // Mips16ISELLOWERING_H