lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp

   1 //===-- HexagonMCTargetDesc.cpp - Hexagon Target Descriptions -------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides Hexagon specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "HexagonMCTargetDesc.h"
  15 #include "Hexagon.h"
  16 #include "HexagonMCAsmInfo.h"
  17 #include "HexagonMCELFStreamer.h"
  18 #include "MCTargetDesc/HexagonInstPrinter.h"
  19 #include "llvm/MC/MCCodeGenInfo.h"
  20 #include "llvm/MC/MCContext.h"
  21 #include "llvm/MC/MCELFStreamer.h"
  22 #include "llvm/MC/MCInstrInfo.h"
  23 #include "llvm/MC/MCObjectStreamer.h"
  24 #include "llvm/MC/MCRegisterInfo.h"
  25 #include "llvm/MC/MCStreamer.h"
  26 #include "llvm/MC/MCSubtargetInfo.h"
  27 #include "llvm/MC/MachineLocation.h"
  28 #include "llvm/Support/ELF.h"
  29 #include "llvm/Support/ErrorHandling.h"
  30 #include "llvm/Support/TargetRegistry.h"
  31
  32 using namespace llvm;
  33
  34 #define GET_INSTRINFO_MC_DESC
  35 #include "HexagonGenInstrInfo.inc"
  36
  37 #define GET_SUBTARGETINFO_MC_DESC
  38 #include "HexagonGenSubtargetInfo.inc"
  39
  40 #define GET_REGINFO_MC_DESC
  41 #include "HexagonGenRegisterInfo.inc"
  42
  43 MCInstrInfo *llvm::createHexagonMCInstrInfo() {
  44   MCInstrInfo *X = new MCInstrInfo();
  45   InitHexagonMCInstrInfo(X);
  46   return X;
  47 }
  48
  49 static MCRegisterInfo *createHexagonMCRegisterInfo(const Triple &TT) {
  50   MCRegisterInfo *X = new MCRegisterInfo();
  51   InitHexagonMCRegisterInfo(X, Hexagon::R0);
  52   return X;
  53 }
  54
  55 static MCSubtargetInfo *
  56 createHexagonMCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
  57   return createHexagonMCSubtargetInfoImpl(TT, CPU, FS);
  58 }
  59
  60 namespace {
  61 class HexagonTargetAsmStreamer : public HexagonTargetStreamer {
  62 public:
  63   HexagonTargetAsmStreamer(MCStreamer &S,
  64                            formatted_raw_ostream &, bool,
  65                            MCInstPrinter &)
  66       : HexagonTargetStreamer(S) {}
  67   void prettyPrintAsm(MCInstPrinter &InstPrinter, raw_ostream &OS,
  68                       const MCInst &Inst, const MCSubtargetInfo &STI) override {
  69     assert(HexagonMCInstrInfo::isBundle(Inst));
  70     assert(HexagonMCInstrInfo::bundleSize(Inst) <= HEXAGON_PACKET_SIZE);
  71     std::string Buffer;
  72     {
  73       raw_string_ostream TempStream(Buffer);
  74       InstPrinter.printInst(&Inst, TempStream, "", STI);
  75     }
  76     StringRef Contents(Buffer);
  77     auto PacketBundle = Contents.rsplit('\n');
  78     auto HeadTail = PacketBundle.first.split('\n');
  79     auto Preamble = "\t{\n\t\t";
  80     auto Separator = "";
  81     while(!HeadTail.first.empty()) {
  82       OS << Separator;
  83       StringRef Inst;
  84       auto Duplex = HeadTail.first.split('\v');
  85       if(!Duplex.second.empty()){
  86         OS << Duplex.first << "\n";
  87         Inst = Duplex.second;
  88       }
  89       else {
  90         if(!HeadTail.first.startswith("immext"))
  91           Inst = Duplex.first;
  92       }
  93       OS << Preamble;
  94       OS << Inst;
  95       HeadTail = HeadTail.second.split('\n');
  96       Preamble = "";
  97       Separator = "\n\t\t";
  98     }
  99     if(HexagonMCInstrInfo::bundleSize(Inst) != 0)
 100       OS << "\n\t}" << PacketBundle.second;
 101   }
 102 };
 103 }
 104
 105 namespace {
 106 class HexagonTargetELFStreamer : public HexagonTargetStreamer {
 107 public:
 108   MCELFStreamer &getStreamer() {
 109     return static_cast<MCELFStreamer &>(Streamer);
 110   }
 111   HexagonTargetELFStreamer(MCStreamer &S, MCSubtargetInfo const &STI)
 112       : HexagonTargetStreamer(S) {
 113     auto Bits = STI.getFeatureBits();
 114     unsigned Flags;
 115     if (Bits.to_ullong() & llvm::Hexagon::ArchV5)
 116       Flags = ELF::EF_HEXAGON_MACH_V5;
 117     else
 118       Flags = ELF::EF_HEXAGON_MACH_V4;
 119     getStreamer().getAssembler().setELFHeaderEFlags(Flags);
 120   }
 121   void EmitCommonSymbolSorted(MCSymbol *Symbol, uint64_t Size,
 122                               unsigned ByteAlignment,
 123                               unsigned AccessSize) override {
 124     HexagonMCELFStreamer &HexagonELFStreamer =
 125         static_cast<HexagonMCELFStreamer &>(getStreamer());
 126     HexagonELFStreamer.HexagonMCEmitCommonSymbol(Symbol, Size, ByteAlignment,
 127                                                  AccessSize);
 128   }
 129   void EmitLocalCommonSymbolSorted(MCSymbol *Symbol, uint64_t Size,
 130                                    unsigned ByteAlignment,
 131                                    unsigned AccessSize) override {
 132     HexagonMCELFStreamer &HexagonELFStreamer =
 133         static_cast<HexagonMCELFStreamer &>(getStreamer());
 134     HexagonELFStreamer.HexagonMCEmitLocalCommonSymbol(
 135         Symbol, Size, ByteAlignment, AccessSize);
 136   }
 137 };
 138 }
 139
 140 static MCAsmInfo *createHexagonMCAsmInfo(const MCRegisterInfo &MRI,
 141                                          const Triple &TT) {
 142   MCAsmInfo *MAI = new HexagonMCAsmInfo(TT);
 143
 144   // VirtualFP = (R30 + #0).
 145   MCCFIInstruction Inst =
 146       MCCFIInstruction::createDefCfa(nullptr, Hexagon::R30, 0);
 147   MAI->addInitialFrameState(Inst);
 148
 149   return MAI;
 150 }
 151
 152 static MCCodeGenInfo *createHexagonMCCodeGenInfo(const Triple &TT,
 153                                                  Reloc::Model RM,
 154                                                  CodeModel::Model CM,
 155                                                  CodeGenOpt::Level OL) {
 156   MCCodeGenInfo *X = new MCCodeGenInfo();
 157   // For the time being, use static relocations, since there's really no
 158   // support for PIC yet.
 159   X->initMCCodeGenInfo(Reloc::Static, CM, OL);
 160   return X;
 161 }
 162
 163 static MCInstPrinter *createHexagonMCInstPrinter(const Triple &T,
 164                                                  unsigned SyntaxVariant,
 165                                                  const MCAsmInfo &MAI,
 166                                                  const MCInstrInfo &MII,
 167                                                  const MCRegisterInfo &MRI) {
 168   if (SyntaxVariant == 0)
 169     return (new HexagonInstPrinter(MAI, MII, MRI));
 170   else
 171     return nullptr;
 172 }
 173
 174 static MCTargetStreamer *createMCAsmTargetStreamer(MCStreamer &S,
 175                                                    formatted_raw_ostream &OS,
 176                                                    MCInstPrinter *InstPrint,
 177                                                    bool IsVerboseAsm) {
 178   return new HexagonTargetAsmStreamer(S,  OS, IsVerboseAsm, *InstPrint);
 179 }
 180
 181 static MCStreamer *createMCStreamer(Triple const &T, MCContext &Context,
 182                                     MCAsmBackend &MAB, raw_pwrite_stream &OS,
 183                                     MCCodeEmitter *Emitter, bool RelaxAll) {
 184   return createHexagonELFStreamer(Context, MAB, OS, Emitter);
 185 }
 186
 187 static MCTargetStreamer *
 188 createHexagonObjectTargetStreamer(MCStreamer &S, MCSubtargetInfo const &STI) {
 189   return new HexagonTargetELFStreamer(S, STI);
 190 }
 191
 192 // Force static initialization.
 193 extern "C" void LLVMInitializeHexagonTargetMC() {
 194   // Register the MC asm info.
 195   RegisterMCAsmInfoFn X(TheHexagonTarget, createHexagonMCAsmInfo);
 196
 197   // Register the MC codegen info.
 198   TargetRegistry::RegisterMCCodeGenInfo(TheHexagonTarget,
 199                                         createHexagonMCCodeGenInfo);
 200
 201   // Register the MC instruction info.
 202   TargetRegistry::RegisterMCInstrInfo(TheHexagonTarget,
 203                                       createHexagonMCInstrInfo);
 204
 205   // Register the MC register info.
 206   TargetRegistry::RegisterMCRegInfo(TheHexagonTarget,
 207                                     createHexagonMCRegisterInfo);
 208
 209   // Register the MC subtarget info.
 210   TargetRegistry::RegisterMCSubtargetInfo(TheHexagonTarget,
 211                                           createHexagonMCSubtargetInfo);
 212
 213   // Register the MC Code Emitter
 214   TargetRegistry::RegisterMCCodeEmitter(TheHexagonTarget,
 215                                         createHexagonMCCodeEmitter);
 216
 217   // Register the asm backend
 218   TargetRegistry::RegisterMCAsmBackend(TheHexagonTarget,
 219                                        createHexagonAsmBackend);
 220
 221   // Register the obj streamer
 222   TargetRegistry::RegisterELFStreamer(TheHexagonTarget, createMCStreamer);
 223
 224   // Register the asm streamer
 225   TargetRegistry::RegisterAsmTargetStreamer(TheHexagonTarget,
 226                                             createMCAsmTargetStreamer);
 227
 228   // Register the MC Inst Printer
 229   TargetRegistry::RegisterMCInstPrinter(TheHexagonTarget,
 230                                         createHexagonMCInstPrinter);
 231
 232   TargetRegistry::RegisterObjectTargetStreamer(
 233       TheHexagonTarget, createHexagonObjectTargetStreamer);
 234 }