1 //===- HexagonMCInstrInfo.cpp - Hexagon sub-class of MCInst ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This class extends MCInstrInfo to allow Hexagon specific MCInstr queries
12 //===----------------------------------------------------------------------===//
14 #include "HexagonMCInstrInfo.h"
17 #include "HexagonBaseInfo.h"
18 #include "HexagonMCChecker.h"
20 #include "llvm/MC/MCContext.h"
21 #include "llvm/MC/MCExpr.h"
22 #include "llvm/MC/MCInstrInfo.h"
23 #include "llvm/MC/MCSubtargetInfo.h"
26 void HexagonMCInstrInfo::addConstant(MCInst &MI, uint64_t Value,
28 MI.addOperand(MCOperand::createExpr(MCConstantExpr::create(Value, Context)));
31 void HexagonMCInstrInfo::addConstExtender(MCContext &Context,
32 MCInstrInfo const &MCII, MCInst &MCB,
34 assert(HexagonMCInstrInfo::isBundle(MCB));
35 MCOperand const &exOp =
36 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
38 // Create the extender.
40 new (Context) MCInst(HexagonMCInstrInfo::deriveExtender(MCII, MCI, exOp));
42 MCB.addOperand(MCOperand::createInst(XMCI));
45 iterator_range<MCInst::const_iterator>
46 HexagonMCInstrInfo::bundleInstructions(MCInst const &MCI) {
47 assert(isBundle(MCI));
48 return iterator_range<MCInst::const_iterator>(
49 MCI.begin() + bundleInstructionsOffset, MCI.end());
52 size_t HexagonMCInstrInfo::bundleSize(MCInst const &MCI) {
53 if (HexagonMCInstrInfo::isBundle(MCI))
54 return (MCI.size() - bundleInstructionsOffset);
59 bool HexagonMCInstrInfo::canonicalizePacket(MCInstrInfo const &MCII,
60 MCSubtargetInfo const &STI,
61 MCContext &Context, MCInst &MCB,
62 HexagonMCChecker *Check) {
63 // Examine the packet and convert pairs of instructions to compound
64 // instructions when possible.
65 if (!HexagonDisableCompound)
66 HexagonMCInstrInfo::tryCompound(MCII, Context, MCB);
67 // Check the bundle for errors.
68 bool CheckOk = Check ? Check->check() : true;
71 HexagonMCShuffle(MCII, STI, MCB);
72 // Examine the packet and convert pairs of instructions to duplex
73 // instructions when possible.
74 MCInst InstBundlePreDuplex = MCInst(MCB);
75 if (!HexagonDisableDuplex) {
76 SmallVector<DuplexCandidate, 8> possibleDuplexes;
77 possibleDuplexes = HexagonMCInstrInfo::getDuplexPossibilties(MCII, MCB);
78 HexagonMCShuffle(MCII, STI, Context, MCB, possibleDuplexes);
80 // Examines packet and pad the packet, if needed, when an
81 // end-loop is in the bundle.
82 HexagonMCInstrInfo::padEndloop(Context, MCB);
83 // If compounding and duplexing didn't reduce the size below
84 // 4 or less we have a packet that is too big.
85 if (HexagonMCInstrInfo::bundleSize(MCB) > HEXAGON_PACKET_SIZE)
87 HexagonMCShuffle(MCII, STI, MCB);
91 void HexagonMCInstrInfo::clampExtended(MCInstrInfo const &MCII,
92 MCContext &Context, MCInst &MCI) {
93 assert(HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
94 HexagonMCInstrInfo::isExtended(MCII, MCI));
96 MCI.getOperand(HexagonMCInstrInfo::getExtendableOp(MCII, MCI));
97 // If the extended value is a constant, then use it for the extended and
98 // for the extender instructions, masking off the lower 6 bits and
99 // including the assumed bits.
101 if (exOp.getExpr()->evaluateAsAbsolute(Value)) {
102 unsigned Shift = HexagonMCInstrInfo::getExtentAlignment(MCII, MCI);
103 exOp.setExpr(MCConstantExpr::create((Value & 0x3f) << Shift, Context));
107 MCInst HexagonMCInstrInfo::createBundle() {
109 Result.setOpcode(Hexagon::BUNDLE);
110 Result.addOperand(MCOperand::createImm(0));
114 MCInst *HexagonMCInstrInfo::deriveDuplex(MCContext &Context, unsigned iClass,
116 MCInst const &inst1) {
117 assert((iClass <= 0xf) && "iClass must have range of 0 to 0xf");
118 MCInst *duplexInst = new (Context) MCInst;
119 duplexInst->setOpcode(Hexagon::DuplexIClass0 + iClass);
121 MCInst *SubInst0 = new (Context) MCInst(deriveSubInst(inst0));
122 MCInst *SubInst1 = new (Context) MCInst(deriveSubInst(inst1));
123 duplexInst->addOperand(MCOperand::createInst(SubInst0));
124 duplexInst->addOperand(MCOperand::createInst(SubInst1));
128 MCInst HexagonMCInstrInfo::deriveExtender(MCInstrInfo const &MCII,
130 MCOperand const &MO) {
131 assert(HexagonMCInstrInfo::isExtendable(MCII, Inst) ||
132 HexagonMCInstrInfo::isExtended(MCII, Inst));
134 MCInstrDesc const &Desc = HexagonMCInstrInfo::getDesc(MCII, Inst);
136 XMI.setOpcode((Desc.isBranch() || Desc.isCall() ||
137 HexagonMCInstrInfo::getType(MCII, Inst) == HexagonII::TypeCR)
141 XMI.addOperand(MCOperand::createImm(MO.getImm() & (~0x3f)));
142 else if (MO.isExpr())
143 XMI.addOperand(MCOperand::createExpr(MO.getExpr()));
145 llvm_unreachable("invalid extendable operand");
149 MCInst const *HexagonMCInstrInfo::extenderForIndex(MCInst const &MCB,
151 assert(Index <= bundleSize(MCB));
155 MCB.getOperand(Index + bundleInstructionsOffset - 1).getInst();
161 void HexagonMCInstrInfo::extendIfNeeded(MCContext &Context,
162 MCInstrInfo const &MCII, MCInst &MCB,
163 MCInst const &MCI, bool MustExtend) {
164 if (isConstExtended(MCII, MCI) || MustExtend)
165 addConstExtender(Context, MCII, MCB, MCI);
168 HexagonII::MemAccessSize
169 HexagonMCInstrInfo::getAccessSize(MCInstrInfo const &MCII, MCInst const &MCI) {
170 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
172 return (HexagonII::MemAccessSize((F >> HexagonII::MemAccessSizePos) &
173 HexagonII::MemAccesSizeMask));
176 unsigned HexagonMCInstrInfo::getBitCount(MCInstrInfo const &MCII,
178 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
179 return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
182 // Return constant extended operand number.
183 unsigned short HexagonMCInstrInfo::getCExtOpNum(MCInstrInfo const &MCII,
185 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
186 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
189 MCInstrDesc const &HexagonMCInstrInfo::getDesc(MCInstrInfo const &MCII,
191 return (MCII.get(MCI.getOpcode()));
194 unsigned short HexagonMCInstrInfo::getExtendableOp(MCInstrInfo const &MCII,
196 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
197 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask);
201 HexagonMCInstrInfo::getExtendableOperand(MCInstrInfo const &MCII,
203 unsigned O = HexagonMCInstrInfo::getExtendableOp(MCII, MCI);
204 MCOperand const &MO = MCI.getOperand(O);
206 assert((HexagonMCInstrInfo::isExtendable(MCII, MCI) ||
207 HexagonMCInstrInfo::isExtended(MCII, MCI)) &&
208 (MO.isImm() || MO.isExpr()));
212 unsigned HexagonMCInstrInfo::getExtentAlignment(MCInstrInfo const &MCII,
214 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
215 return ((F >> HexagonII::ExtentAlignPos) & HexagonII::ExtentAlignMask);
218 unsigned HexagonMCInstrInfo::getExtentBits(MCInstrInfo const &MCII,
220 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
221 return ((F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask);
224 // Return the max value that a constant extendable operand can have
225 // without being extended.
226 int HexagonMCInstrInfo::getMaxValue(MCInstrInfo const &MCII,
228 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
230 (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
231 unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
233 if (isSigned) // if value is signed
234 return ~(-1U << (bits - 1));
236 return ~(-1U << bits);
239 // Return the min value that a constant extendable operand can have
240 // without being extended.
241 int HexagonMCInstrInfo::getMinValue(MCInstrInfo const &MCII,
243 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
245 (F >> HexagonII::ExtentSignedPos) & HexagonII::ExtentSignedMask;
246 unsigned bits = (F >> HexagonII::ExtentBitsPos) & HexagonII::ExtentBitsMask;
248 if (isSigned) // if value is signed
249 return -1U << (bits - 1);
254 char const *HexagonMCInstrInfo::getName(MCInstrInfo const &MCII,
256 return MCII.getName(MCI.getOpcode());
259 unsigned short HexagonMCInstrInfo::getNewValueOp(MCInstrInfo const &MCII,
261 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
262 return ((F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask);
265 MCOperand const &HexagonMCInstrInfo::getNewValueOperand(MCInstrInfo const &MCII,
267 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
269 (F >> HexagonII::NewValueOpPos) & HexagonII::NewValueOpMask;
270 MCOperand const &MCO = MCI.getOperand(O);
272 assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
273 HexagonMCInstrInfo::hasNewValue(MCII, MCI)) &&
278 /// Return the new value or the newly produced value.
279 unsigned short HexagonMCInstrInfo::getNewValueOp2(MCInstrInfo const &MCII,
281 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
282 return ((F >> HexagonII::NewValueOpPos2) & HexagonII::NewValueOpMask2);
286 HexagonMCInstrInfo::getNewValueOperand2(MCInstrInfo const &MCII,
288 unsigned O = HexagonMCInstrInfo::getNewValueOp2(MCII, MCI);
289 MCOperand const &MCO = MCI.getOperand(O);
291 assert((HexagonMCInstrInfo::isNewValue(MCII, MCI) ||
292 HexagonMCInstrInfo::hasNewValue2(MCII, MCI)) &&
297 int HexagonMCInstrInfo::getSubTarget(MCInstrInfo const &MCII,
299 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
301 HexagonII::SubTarget Target = static_cast<HexagonII::SubTarget>(
302 (F >> HexagonII::validSubTargetPos) & HexagonII::validSubTargetMask);
306 return Hexagon::ArchV4;
307 case HexagonII::HasV5SubT:
308 return Hexagon::ArchV5;
312 // Return the Hexagon ISA class for the insn.
313 unsigned HexagonMCInstrInfo::getType(MCInstrInfo const &MCII,
315 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
317 return ((F >> HexagonII::TypePos) & HexagonII::TypeMask);
320 unsigned HexagonMCInstrInfo::getUnits(MCInstrInfo const &MCII,
321 MCSubtargetInfo const &STI,
324 const InstrItinerary *II = STI.getSchedModel().InstrItineraries;
325 int SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
326 return ((II[SchedClass].FirstStage + HexagonStages)->getUnits());
329 bool HexagonMCInstrInfo::hasImmExt(MCInst const &MCI) {
330 if (!HexagonMCInstrInfo::isBundle(MCI))
333 for (const auto &I : HexagonMCInstrInfo::bundleInstructions(MCI)) {
334 auto MI = I.getInst();
342 bool HexagonMCInstrInfo::hasExtenderForIndex(MCInst const &MCB, size_t Index) {
343 return extenderForIndex(MCB, Index) != nullptr;
346 // Return whether the instruction is a legal new-value producer.
347 bool HexagonMCInstrInfo::hasNewValue(MCInstrInfo const &MCII,
349 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
350 return ((F >> HexagonII::hasNewValuePos) & HexagonII::hasNewValueMask);
353 /// Return whether the insn produces a second value.
354 bool HexagonMCInstrInfo::hasNewValue2(MCInstrInfo const &MCII,
356 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
357 return ((F >> HexagonII::hasNewValuePos2) & HexagonII::hasNewValueMask2);
360 MCInst const &HexagonMCInstrInfo::instruction(MCInst const &MCB, size_t Index) {
361 assert(isBundle(MCB));
362 assert(Index < HEXAGON_PACKET_SIZE);
363 return *MCB.getOperand(bundleInstructionsOffset + Index).getInst();
366 bool HexagonMCInstrInfo::isBundle(MCInst const &MCI) {
367 auto Result = Hexagon::BUNDLE == MCI.getOpcode();
368 assert(!Result || (MCI.size() > 0 && MCI.getOperand(0).isImm()));
372 // Return whether the insn is an actual insn.
373 bool HexagonMCInstrInfo::isCanon(MCInstrInfo const &MCII, MCInst const &MCI) {
374 return (!HexagonMCInstrInfo::getDesc(MCII, MCI).isPseudo() &&
375 !HexagonMCInstrInfo::isPrefix(MCII, MCI) &&
376 HexagonMCInstrInfo::getType(MCII, MCI) != HexagonII::TypeENDLOOP);
379 bool HexagonMCInstrInfo::isCompound(MCInstrInfo const &MCII,
381 return (getType(MCII, MCI) == HexagonII::TypeCOMPOUND);
384 bool HexagonMCInstrInfo::isDblRegForSubInst(unsigned Reg) {
385 return ((Reg >= Hexagon::D0 && Reg <= Hexagon::D3) ||
386 (Reg >= Hexagon::D8 && Reg <= Hexagon::D11));
389 bool HexagonMCInstrInfo::isDuplex(MCInstrInfo const &MCII, MCInst const &MCI) {
390 return HexagonII::TypeDUPLEX == HexagonMCInstrInfo::getType(MCII, MCI);
393 // Return whether the instruction needs to be constant extended.
394 // 1) Always return true if the instruction has 'isExtended' flag set.
397 // 2) For immediate extended operands, return true only if the value is
399 // 3) For global address, always return true.
401 bool HexagonMCInstrInfo::isConstExtended(MCInstrInfo const &MCII,
403 if (HexagonMCInstrInfo::isExtended(MCII, MCI))
405 // Branch insns are handled as necessary by relaxation.
406 if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeJ) ||
407 (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCOMPOUND &&
408 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()) ||
409 (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeNV &&
410 HexagonMCInstrInfo::getDesc(MCII, MCI).isBranch()))
412 // Otherwise loop instructions and other CR insts are handled by relaxation
413 else if ((HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR) &&
414 (MCI.getOpcode() != Hexagon::C4_addipc))
416 else if (!HexagonMCInstrInfo::isExtendable(MCII, MCI))
419 MCOperand const &MO = HexagonMCInstrInfo::getExtendableOperand(MCII, MCI);
421 // We could be using an instruction with an extendable immediate and shoehorn
422 // a global address into it. If it is a global address it will be constant
423 // extended. We do this for COMBINE.
424 // We currently only handle isGlobal() because it is the only kind of
425 // object we are going to end up with here for now.
426 // In the future we probably should add isSymbol(), etc.
429 if (!MO.getExpr()->evaluateAsAbsolute(Value))
431 int MinValue = HexagonMCInstrInfo::getMinValue(MCII, MCI);
432 int MaxValue = HexagonMCInstrInfo::getMaxValue(MCII, MCI);
433 return (MinValue > Value || Value > MaxValue);
436 bool HexagonMCInstrInfo::isExtendable(MCInstrInfo const &MCII,
438 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
439 return (F >> HexagonII::ExtendablePos) & HexagonII::ExtendableMask;
442 bool HexagonMCInstrInfo::isExtended(MCInstrInfo const &MCII,
444 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
445 return (F >> HexagonII::ExtendedPos) & HexagonII::ExtendedMask;
448 bool HexagonMCInstrInfo::isFloat(MCInstrInfo const &MCII, MCInst const &MCI) {
449 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
450 return ((F >> HexagonII::FPPos) & HexagonII::FPMask);
453 bool HexagonMCInstrInfo::isImmext(MCInst const &MCI) {
454 auto Op = MCI.getOpcode();
455 return (Op == Hexagon::A4_ext_b || Op == Hexagon::A4_ext_c ||
456 Op == Hexagon::A4_ext_g || Op == Hexagon::A4_ext);
459 bool HexagonMCInstrInfo::isInnerLoop(MCInst const &MCI) {
460 assert(isBundle(MCI));
461 int64_t Flags = MCI.getOperand(0).getImm();
462 return (Flags & innerLoopMask) != 0;
465 bool HexagonMCInstrInfo::isIntReg(unsigned Reg) {
466 return (Reg >= Hexagon::R0 && Reg <= Hexagon::R31);
469 bool HexagonMCInstrInfo::isIntRegForSubInst(unsigned Reg) {
470 return ((Reg >= Hexagon::R0 && Reg <= Hexagon::R7) ||
471 (Reg >= Hexagon::R16 && Reg <= Hexagon::R23));
474 // Return whether the insn is a new-value consumer.
475 bool HexagonMCInstrInfo::isNewValue(MCInstrInfo const &MCII,
477 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
478 return ((F >> HexagonII::NewValuePos) & HexagonII::NewValueMask);
481 // Return whether the operand can be constant extended.
482 bool HexagonMCInstrInfo::isOperandExtended(MCInstrInfo const &MCII,
484 unsigned short OperandNum) {
485 uint64_t const F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
486 return ((F >> HexagonII::ExtendableOpPos) & HexagonII::ExtendableOpMask) ==
490 bool HexagonMCInstrInfo::isOuterLoop(MCInst const &MCI) {
491 assert(isBundle(MCI));
492 int64_t Flags = MCI.getOperand(0).getImm();
493 return (Flags & outerLoopMask) != 0;
496 bool HexagonMCInstrInfo::isPredicated(MCInstrInfo const &MCII,
498 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
499 return ((F >> HexagonII::PredicatedPos) & HexagonII::PredicatedMask);
502 bool HexagonMCInstrInfo::isPredicateLate(MCInstrInfo const &MCII,
504 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
505 return (F >> HexagonII::PredicateLatePos & HexagonII::PredicateLateMask);
508 /// Return whether the insn is newly predicated.
509 bool HexagonMCInstrInfo::isPredicatedNew(MCInstrInfo const &MCII,
511 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
512 return ((F >> HexagonII::PredicatedNewPos) & HexagonII::PredicatedNewMask);
515 bool HexagonMCInstrInfo::isPredicatedTrue(MCInstrInfo const &MCII,
517 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
519 !((F >> HexagonII::PredicatedFalsePos) & HexagonII::PredicatedFalseMask));
522 bool HexagonMCInstrInfo::isPredReg(unsigned Reg) {
523 return (Reg >= Hexagon::P0 && Reg <= Hexagon::P3_0);
526 bool HexagonMCInstrInfo::isPrefix(MCInstrInfo const &MCII, MCInst const &MCI) {
527 return (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypePREFIX);
530 bool HexagonMCInstrInfo::isSolo(MCInstrInfo const &MCII, MCInst const &MCI) {
531 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
532 return ((F >> HexagonII::SoloPos) & HexagonII::SoloMask);
535 bool HexagonMCInstrInfo::isMemReorderDisabled(MCInst const &MCI) {
536 assert(isBundle(MCI));
537 auto Flags = MCI.getOperand(0).getImm();
538 return (Flags & memReorderDisabledMask) != 0;
541 bool HexagonMCInstrInfo::isMemStoreReorderEnabled(MCInst const &MCI) {
542 assert(isBundle(MCI));
543 auto Flags = MCI.getOperand(0).getImm();
544 return (Flags & memStoreReorderEnabledMask) != 0;
547 bool HexagonMCInstrInfo::isSoloAX(MCInstrInfo const &MCII, MCInst const &MCI) {
548 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
549 return ((F >> HexagonII::SoloAXPos) & HexagonII::SoloAXMask);
552 bool HexagonMCInstrInfo::isSoloAin1(MCInstrInfo const &MCII,
554 const uint64_t F = HexagonMCInstrInfo::getDesc(MCII, MCI).TSFlags;
555 return ((F >> HexagonII::SoloAin1Pos) & HexagonII::SoloAin1Mask);
558 bool HexagonMCInstrInfo::isVector(MCInstrInfo const &MCII, MCInst const &MCI) {
559 if ((getType(MCII, MCI) <= HexagonII::TypeCVI_LAST) &&
560 (getType(MCII, MCI) >= HexagonII::TypeCVI_FIRST))
565 int64_t HexagonMCInstrInfo::minConstant(MCInst const &MCI, size_t Index) {
566 auto Sentinal = static_cast<int64_t>(std::numeric_limits<uint32_t>::max())
568 if (MCI.size() <= Index)
570 MCOperand const &MCO = MCI.getOperand(Index);
574 if (!MCO.getExpr()->evaluateAsAbsolute(Value))
579 void HexagonMCInstrInfo::padEndloop(MCContext &Context, MCInst &MCB) {
581 Nop.setOpcode(Hexagon::A2_nop);
582 assert(isBundle(MCB));
583 while ((HexagonMCInstrInfo::isInnerLoop(MCB) &&
584 (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_INNER_SIZE)) ||
585 ((HexagonMCInstrInfo::isOuterLoop(MCB) &&
586 (HexagonMCInstrInfo::bundleSize(MCB) < HEXAGON_PACKET_OUTER_SIZE))))
587 MCB.addOperand(MCOperand::createInst(new (Context) MCInst(Nop)));
590 bool HexagonMCInstrInfo::prefersSlot3(MCInstrInfo const &MCII,
592 if (HexagonMCInstrInfo::getType(MCII, MCI) == HexagonII::TypeCR)
595 unsigned SchedClass = HexagonMCInstrInfo::getDesc(MCII, MCI).getSchedClass();
596 switch (SchedClass) {
597 case Hexagon::Sched::ALU32_3op_tc_2_SLOT0123:
598 case Hexagon::Sched::ALU64_tc_2_SLOT23:
599 case Hexagon::Sched::ALU64_tc_3x_SLOT23:
600 case Hexagon::Sched::M_tc_2_SLOT23:
601 case Hexagon::Sched::M_tc_3x_SLOT23:
602 case Hexagon::Sched::S_2op_tc_2_SLOT23:
603 case Hexagon::Sched::S_3op_tc_2_SLOT23:
604 case Hexagon::Sched::S_3op_tc_3x_SLOT23:
610 void HexagonMCInstrInfo::replaceDuplex(MCContext &Context, MCInst &MCB,
611 DuplexCandidate Candidate) {
612 assert(Candidate.packetIndexI < MCB.size());
613 assert(Candidate.packetIndexJ < MCB.size());
614 assert(isBundle(MCB));
616 deriveDuplex(Context, Candidate.iClass,
617 *MCB.getOperand(Candidate.packetIndexJ).getInst(),
618 *MCB.getOperand(Candidate.packetIndexI).getInst());
619 assert(Duplex != nullptr);
620 MCB.getOperand(Candidate.packetIndexI).setInst(Duplex);
621 MCB.erase(MCB.begin() + Candidate.packetIndexJ);
624 void HexagonMCInstrInfo::setInnerLoop(MCInst &MCI) {
625 assert(isBundle(MCI));
626 MCOperand &Operand = MCI.getOperand(0);
627 Operand.setImm(Operand.getImm() | innerLoopMask);
630 void HexagonMCInstrInfo::setMemReorderDisabled(MCInst &MCI) {
631 assert(isBundle(MCI));
632 MCOperand &Operand = MCI.getOperand(0);
633 Operand.setImm(Operand.getImm() | memReorderDisabledMask);
634 assert(isMemReorderDisabled(MCI));
637 void HexagonMCInstrInfo::setMemStoreReorderEnabled(MCInst &MCI) {
638 assert(isBundle(MCI));
639 MCOperand &Operand = MCI.getOperand(0);
640 Operand.setImm(Operand.getImm() | memStoreReorderEnabledMask);
641 assert(isMemStoreReorderEnabled(MCI));
644 void HexagonMCInstrInfo::setOuterLoop(MCInst &MCI) {
645 assert(isBundle(MCI));
646 MCOperand &Operand = MCI.getOperand(0);
647 Operand.setImm(Operand.getImm() | outerLoopMask);