[Hexagon] Resubmission of 220427
[oota-llvm.git] / lib / Target / Hexagon / Disassembler / HexagonDisassembler.cpp
1 //===-- HexagonDisassembler.cpp - Disassembler for Hexagon ISA ------------===//\r
2 //\r
3 //                     The LLVM Compiler Infrastructure\r
4 //\r
5 // This file is distributed under the University of Illinois Open Source\r
6 // License. See LICENSE.TXT for details.\r
7 //\r
8 //===----------------------------------------------------------------------===//\r
9 \r
10 #include "MCTargetDesc/HexagonBaseInfo.h"\r
11 #include "MCTargetDesc/HexagonMCTargetDesc.h"\r
12 \r
13 #include "llvm/MC/MCContext.h"\r
14 #include "llvm/MC/MCDisassembler.h"\r
15 #include "llvm/MC/MCExpr.h"\r
16 #include "llvm/MC/MCFixedLenDisassembler.h"\r
17 #include "llvm/MC/MCInst.h"\r
18 #include "llvm/MC/MCInstrDesc.h"\r
19 #include "llvm/MC/MCSubtargetInfo.h"\r
20 #include "llvm/Support/Debug.h"\r
21 #include "llvm/Support/ErrorHandling.h"\r
22 #include "llvm/Support/LEB128.h"\r
23 #include "llvm/Support/MemoryObject.h"\r
24 #include "llvm/Support/raw_ostream.h"\r
25 #include "llvm/Support/TargetRegistry.h"\r
26 #include "llvm/Support/Endian.h"\r
27 \r
28 #include <vector>\r
29 #include <array>\r
30 \r
31 using namespace llvm;\r
32 \r
33 #define DEBUG_TYPE "hexagon-disassembler"\r
34 \r
35 // Pull DecodeStatus and its enum values into the global namespace.\r
36 typedef llvm::MCDisassembler::DecodeStatus DecodeStatus;\r
37 \r
38 namespace {\r
39 /// \brief Hexagon disassembler for all Hexagon platforms.\r
40 class HexagonDisassembler : public MCDisassembler {\r
41 public:\r
42   HexagonDisassembler(MCSubtargetInfo const &STI, MCContext &Ctx)\r
43       : MCDisassembler(STI, Ctx) {}\r
44 \r
45   DecodeStatus getInstruction(MCInst &instr, uint64_t &size,\r
46                               MemoryObject const &region, uint64_t address,\r
47                               raw_ostream &vStream, raw_ostream &cStream) const override;\r
48 };\r
49 }\r
50 \r
51 static const uint16_t IntRegDecoderTable[] = {\r
52     Hexagon::R0,  Hexagon::R1,  Hexagon::R2,  Hexagon::R3,  Hexagon::R4,\r
53     Hexagon::R5,  Hexagon::R6,  Hexagon::R7,  Hexagon::R8,  Hexagon::R9,\r
54     Hexagon::R10, Hexagon::R11, Hexagon::R12, Hexagon::R13, Hexagon::R14,\r
55     Hexagon::R15, Hexagon::R16, Hexagon::R17, Hexagon::R18, Hexagon::R19,\r
56     Hexagon::R20, Hexagon::R21, Hexagon::R22, Hexagon::R23, Hexagon::R24,\r
57     Hexagon::R25, Hexagon::R26, Hexagon::R27, Hexagon::R28, Hexagon::R29,\r
58     Hexagon::R30, Hexagon::R31};\r
59 \r
60 static const uint16_t PredRegDecoderTable[] = {Hexagon::P0, Hexagon::P1,\r
61                                                Hexagon::P2, Hexagon::P3};\r
62 \r
63 static DecodeStatus DecodeIntRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
64                                                uint64_t /*Address*/,\r
65                                                void const *Decoder) {\r
66   if (RegNo > 31)\r
67     return MCDisassembler::Fail;\r
68 \r
69   unsigned Register = IntRegDecoderTable[RegNo];\r
70   Inst.addOperand(MCOperand::CreateReg(Register));\r
71   return MCDisassembler::Success;\r
72 }\r
73 \r
74 static DecodeStatus DecodePredRegsRegisterClass(MCInst &Inst, unsigned RegNo,\r
75                                                 uint64_t /*Address*/,\r
76                                                 void const *Decoder) {\r
77   if (RegNo > 3)\r
78     return MCDisassembler::Fail;\r
79 \r
80   unsigned Register = PredRegDecoderTable[RegNo];\r
81   Inst.addOperand(MCOperand::CreateReg(Register));\r
82   return MCDisassembler::Success;\r
83 }\r
84 \r
85 #include "HexagonGenDisassemblerTables.inc"\r
86 \r
87 static MCDisassembler *createHexagonDisassembler(Target const &T,\r
88                                                  MCSubtargetInfo const &STI,\r
89                                                  MCContext &Ctx) {\r
90   return new HexagonDisassembler(STI, Ctx);\r
91 }\r
92 \r
93 extern "C" void LLVMInitializeHexagonDisassembler() {\r
94   TargetRegistry::RegisterMCDisassembler(TheHexagonTarget,\r
95                                          createHexagonDisassembler);\r
96 }\r
97 \r
98 DecodeStatus HexagonDisassembler::getInstruction(MCInst &MI, uint64_t &Size,\r
99                                                  MemoryObject const &Region,\r
100                                                  uint64_t Address,\r
101                                                  raw_ostream &os,\r
102                                                  raw_ostream &cs) const {\r
103   std::array<uint8_t, 4> Bytes;\r
104   Size = 4;\r
105   if (Region.readBytes(Address, Bytes.size(), Bytes.data()) == -1) {\r
106     return MCDisassembler::Fail;\r
107   }\r
108   uint32_t insn =\r
109       llvm::support::endian::read<uint32_t, llvm::support::little,\r
110                                   llvm::support::unaligned>(Bytes.data());\r
111 \r
112   // Remove parse bits.\r
113   insn &= ~static_cast<uint32_t>(HexagonII::InstParseBits::INST_PARSE_MASK);\r
114   return decodeInstruction(DecoderTable32, MI, insn, Address, this, STI);\r
115 }\r