1 //===- SPURegisterInfo.h - Cell SPU Register Information Impl ----*- C++ -*-==//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Cell SPU implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #ifndef SPU_REGISTERINFO_H
15 #define SPU_REGISTERINFO_H
18 #include "SPUGenRegisterInfo.h.inc"
22 class TargetInstrInfo;
25 class SPURegisterInfo : public SPUGenRegisterInfo {
27 const SPUSubtarget &Subtarget;
28 const TargetInstrInfo &TII;
30 //! Predicate: Does the machine function use the link register?
31 bool usesLR(MachineFunction &MF) const;
34 SPURegisterInfo(const SPUSubtarget &subtarget, const TargetInstrInfo &tii);
36 //! Translate a register's enum value to a register number
38 This method translates a register's enum value to it's regiser number,
41 static unsigned getRegisterNumbering(unsigned RegEnum);
43 //! Store a register to a stack slot, based on its register class.
44 void storeRegToStackSlot(MachineBasicBlock &MBB,
45 MachineBasicBlock::iterator MBBI,
46 unsigned SrcReg, bool isKill, int FrameIndex,
47 const TargetRegisterClass *RC) const;
49 //! Store a register to an address, based on its register class
50 void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill,
51 SmallVectorImpl<MachineOperand> &Addr,
52 const TargetRegisterClass *RC,
53 SmallVectorImpl<MachineInstr*> &NewMIs) const;
55 //! Load a register from a stack slot, based on its register class.
56 void loadRegFromStackSlot(MachineBasicBlock &MBB,
57 MachineBasicBlock::iterator MBBI,
58 unsigned DestReg, int FrameIndex,
59 const TargetRegisterClass *RC) const;
61 //! Loqad a register from an address, based on its register class
62 virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg,
63 SmallVectorImpl<MachineOperand> &Addr,
64 const TargetRegisterClass *RC,
65 SmallVectorImpl<MachineInstr*> &NewMIs) const;
67 //! Copy a register to another
68 void copyRegToReg(MachineBasicBlock &MBB,
69 MachineBasicBlock::iterator MI,
70 unsigned DestReg, unsigned SrcReg,
71 const TargetRegisterClass *DestRC,
72 const TargetRegisterClass *SrcRC) const;
74 void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
75 unsigned DestReg, const MachineInstr *Orig) const;
77 //! Fold spills into load/store instructions
78 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
79 SmallVectorImpl<unsigned> &Ops,
80 int FrameIndex) const;
82 //! Fold any load/store to an operand
83 virtual MachineInstr* foldMemoryOperand(MachineInstr* MI,
84 SmallVectorImpl<unsigned> &Ops,
85 MachineInstr* LoadMI) const;
87 //! Return the array of callee-saved registers
88 virtual const unsigned* getCalleeSavedRegs(const MachineFunction *MF) const;
90 //! Return the register class array of the callee-saved registers
91 virtual const TargetRegisterClass* const *
92 getCalleeSavedRegClasses(const MachineFunction *MF) const;
94 //! Return the reserved registers
95 BitVector getReservedRegs(const MachineFunction &MF) const;
97 //! Prediate: Target has dedicated frame pointer
98 bool hasFP(const MachineFunction &MF) const;
99 //! Eliminate the call frame setup pseudo-instructions
100 void eliminateCallFramePseudoInstr(MachineFunction &MF,
101 MachineBasicBlock &MBB,
102 MachineBasicBlock::iterator I) const;
103 //! Convert frame indicies into machine operands
104 void eliminateFrameIndex(MachineBasicBlock::iterator II, int,
105 RegScavenger *RS) const;
106 //! Determine the frame's layour
107 void determineFrameLayout(MachineFunction &MF) const;
109 void processFunctionBeforeCalleeSavedScan(MachineFunction &MF,
110 RegScavenger *RS = NULL) const;
111 //! Emit the function prologue
112 void emitPrologue(MachineFunction &MF) const;
113 //! Emit the function epilogue
114 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const;
115 //! Get return address register (LR, aka R0)
116 unsigned getRARegister() const;
117 //! Get the stack frame register (SP, aka R1)
118 unsigned getFrameRegister(MachineFunction &MF) const;
119 //! Perform target-specific stack frame setup.
120 void getInitialFrameState(std::vector<MachineMove> &Moves) const;
122 //------------------------------------------------------------------------
123 // New methods added:
124 //------------------------------------------------------------------------
126 //! Return the array of argument passing registers
128 \note The size of this array is returned by getArgRegsSize().
130 static const unsigned *getArgRegs();
132 //! Return the size of the argument passing register array
133 static const unsigned getNumArgRegs();
135 //! Get DWARF debugging register number
136 int getDwarfRegNum(unsigned RegNum, bool isEH) const;
138 } // end namespace llvm