lib/Target/CellSPU/MCTargetDesc/SPUMCTargetDesc.cpp

   1 //===-- SPUMCTargetDesc.cpp - Cell SPU Target Descriptions -----*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides Cell SPU specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "SPUMCTargetDesc.h"
  15 #include "SPUMCAsmInfo.h"
  16 #include "llvm/MC/MachineLocation.h"
  17 #include "llvm/MC/MCCodeGenInfo.h"
  18 #include "llvm/MC/MCInstrInfo.h"
  19 #include "llvm/MC/MCRegisterInfo.h"
  20 #include "llvm/MC/MCSubtargetInfo.h"
  21 #include "llvm/Target/TargetRegistry.h"
  22
  23 #define GET_INSTRINFO_MC_DESC
  24 #include "SPUGenInstrInfo.inc"
  25
  26 #define GET_SUBTARGETINFO_MC_DESC
  27 #include "SPUGenSubtargetInfo.inc"
  28
  29 #define GET_REGINFO_MC_DESC
  30 #include "SPUGenRegisterInfo.inc"
  31
  32 using namespace llvm;
  33
  34 static MCInstrInfo *createSPUMCInstrInfo() {
  35   MCInstrInfo *X = new MCInstrInfo();
  36   InitSPUMCInstrInfo(X);
  37   return X;
  38 }
  39
  40 static MCRegisterInfo *createCellSPUMCRegisterInfo(StringRef TT) {
  41   MCRegisterInfo *X = new MCRegisterInfo();
  42   InitSPUMCRegisterInfo(X, SPU::R0);
  43   return X;
  44 }
  45
  46 static MCSubtargetInfo *createSPUMCSubtargetInfo(StringRef TT, StringRef CPU,
  47                                                  StringRef FS) {
  48   MCSubtargetInfo *X = new MCSubtargetInfo();
  49   InitSPUMCSubtargetInfo(X, TT, CPU, FS);
  50   return X;
  51 }
  52
  53 static MCAsmInfo *createSPUMCAsmInfo(const Target &T, StringRef TT) {
  54   MCAsmInfo *MAI = new SPULinuxMCAsmInfo(T, TT);
  55
  56   // Initial state of the frame pointer is R1.
  57   MachineLocation Dst(MachineLocation::VirtualFP);
  58   MachineLocation Src(SPU::R1, 0);
  59   MAI->addInitialFrameState(0, Dst, Src);
  60
  61   return MAI;
  62 }
  63
  64 static MCCodeGenInfo *createSPUMCCodeGenInfo(StringRef TT, Reloc::Model RM,
  65                                       CodeModel::Model CM) {
  66   MCCodeGenInfo *X = new MCCodeGenInfo();
  67   // For the time being, use static relocations, since there's really no
  68   // support for PIC yet.
  69   X->InitMCCodeGenInfo(Reloc::Static, CM);
  70   return X;
  71 }
  72
  73 // Force static initialization.
  74 extern "C" void LLVMInitializeCellSPUTargetMC() {
  75   // Register the MC asm info.
  76   RegisterMCAsmInfoFn X(TheCellSPUTarget, createSPUMCAsmInfo);
  77
  78   // Register the MC codegen info.
  79   TargetRegistry::RegisterMCCodeGenInfo(TheCellSPUTarget,
  80                                         createSPUMCCodeGenInfo);
  81
  82   // Register the MC instruction info.
  83   TargetRegistry::RegisterMCInstrInfo(TheCellSPUTarget, createSPUMCInstrInfo);
  84
  85   // Register the MC register info.
  86   TargetRegistry::RegisterMCRegInfo(TheCellSPUTarget,
  87                                     createCellSPUMCRegisterInfo);
  88
  89   // Register the MC subtarget info.
  90   TargetRegistry::RegisterMCSubtargetInfo(TheCellSPUTarget,
  91                                           createSPUMCSubtargetInfo);
  92 }