Split the SDValue out of OutputArg so that SelectionDAG-independent
[oota-llvm.git] / lib / Target / Blackfin / BlackfinISelLowering.h
1 //===- BlackfinISelLowering.h - Blackfin DAG Lowering Interface -*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines the interfaces that Blackfin uses to lower LLVM code into a
11 // selection DAG.
12 //
13 //===----------------------------------------------------------------------===//
14
15 #ifndef BLACKFIN_ISELLOWERING_H
16 #define BLACKFIN_ISELLOWERING_H
17
18 #include "llvm/Target/TargetLowering.h"
19 #include "Blackfin.h"
20
21 namespace llvm {
22
23   namespace BFISD {
24     enum {
25       FIRST_NUMBER = ISD::BUILTIN_OP_END,
26       CALL,                     // A call instruction.
27       RET_FLAG,                 // Return with a flag operand.
28       Wrapper                   // Address wrapper
29     };
30   }
31
32   class BlackfinTargetLowering : public TargetLowering {
33   public:
34     BlackfinTargetLowering(TargetMachine &TM);
35     virtual MVT::SimpleValueType getSetCCResultType(EVT VT) const;
36     virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const;
37     virtual void ReplaceNodeResults(SDNode *N,
38                                     SmallVectorImpl<SDValue> &Results,
39                                     SelectionDAG &DAG) const;
40
41     ConstraintType getConstraintType(const std::string &Constraint) const;
42     std::pair<unsigned, const TargetRegisterClass*>
43     getRegForInlineAsmConstraint(const std::string &Constraint, EVT VT) const;
44     std::vector<unsigned>
45     getRegClassForInlineAsmConstraint(const std::string &Constraint,
46                                       EVT VT) const;
47     virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const;
48     const char *getTargetNodeName(unsigned Opcode) const;
49     unsigned getFunctionAlignment(const Function *F) const;
50
51   private:
52     SDValue LowerGlobalAddress(SDValue Op, SelectionDAG &DAG) const;
53     SDValue LowerJumpTable(SDValue Op, SelectionDAG &DAG) const;
54     SDValue LowerADDE(SDValue Op, SelectionDAG &DAG) const;
55
56     virtual SDValue
57       LowerFormalArguments(SDValue Chain,
58                            CallingConv::ID CallConv, bool isVarArg,
59                            const SmallVectorImpl<ISD::InputArg> &Ins,
60                            DebugLoc dl, SelectionDAG &DAG,
61                            SmallVectorImpl<SDValue> &InVals) const;
62     virtual SDValue
63       LowerCall(SDValue Chain, SDValue Callee,
64                 CallingConv::ID CallConv, bool isVarArg, bool &isTailCall,
65                 const SmallVectorImpl<ISD::OutputArg> &Outs,
66                 const SmallVectorImpl<SDValue> &OutVals,
67                 const SmallVectorImpl<ISD::InputArg> &Ins,
68                 DebugLoc dl, SelectionDAG &DAG,
69                 SmallVectorImpl<SDValue> &InVals) const;
70
71     virtual SDValue
72       LowerReturn(SDValue Chain,
73                   CallingConv::ID CallConv, bool isVarArg,
74                   const SmallVectorImpl<ISD::OutputArg> &Outs,
75                   const SmallVectorImpl<SDValue> &OutVals,
76                   DebugLoc dl, SelectionDAG &DAG) const;
77   };
78 } // end namespace llvm
79
80 #endif    // BLACKFIN_ISELLOWERING_H