1 #===-- R600GenRegisterInfo.pl - Script for generating register info files --===#
3 # The LLVM Compiler Infrastructure
5 # This file is distributed under the University of Illinois Open Source
6 # License. See LICENSE.TXT for details.
8 #===------------------------------------------------------------------------===#
10 # This perl script prints to stdout .td code to be used as R600RegisterInfo.td
11 # it also generates a file called R600HwRegInfo.include, which contains helper
12 # functions for determining the hw encoding of registers.
14 #===------------------------------------------------------------------------===#
19 use constant CONST_REG_COUNT => 100;
20 use constant TEMP_REG_COUNT => 128;
22 my $CREG_MAX = CONST_REG_COUNT - 1;
23 my $TREG_MAX = TEMP_REG_COUNT - 1;
27 class R600Reg <string name, bits<16> encoding> : Register<name> {
28 let Namespace = "AMDGPU";
29 let HWEncoding = encoding;
32 class R600Reg_128<string n, list<Register> subregs, bits<16> encoding> :
33 RegisterWithSubRegs<n, subregs> {
34 let Namespace = "AMDGPU";
35 let SubRegIndices = [sel_x, sel_y, sel_z, sel_w];
36 let HWEncoding = encoding;
45 my @creg_list = print_reg_defs(CONST_REG_COUNT * 4, "C");
46 my @treg_list = print_reg_defs(TEMP_REG_COUNT * 4, "T");
50 for (my $i = 0; $i < TEMP_REG_COUNT; $i++) {
51 my $name = "T$i\_XYZW";
52 print qq{def $name : R600Reg_128 <"T$i.XYZW", [T$i\_X, T$i\_Y, T$i\_Z, T$i\_W], $i >;\n};
54 $treg_x[$i] = "T$i\_X";
61 my $treg_string = join(",", @treg_list);
62 my $creg_list = join(",", @creg_list);
63 my $t128_string = join(",", @t128reg);
64 my $treg_x_string = join(",", @treg_x);
67 class RegSet <dag s> {
71 def ZERO : R600Reg<"0.0", 248>;
72 def ONE : R600Reg<"1.0", 249>;
73 def NEG_ONE : R600Reg<"-1.0", 249>;
74 def ONE_INT : R600Reg<"1", 250>;
75 def HALF : R600Reg<"0.5", 252>;
76 def NEG_HALF : R600Reg<"-0.5", 252>;
77 def PV_X : R600Reg<"pv.x", 254>;
78 def ALU_LITERAL_X : R600Reg<"literal.x", 253>;
80 def R600_CReg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add
83 def R600_TReg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add
86 def R600_TReg32_X : RegisterClass <"AMDGPU", [f32, i32], 32, (add
89 def R600_Reg32 : RegisterClass <"AMDGPU", [f32, i32], 32, (add
92 ZERO, HALF, ONE, ONE_INT, PV_X, ALU_LITERAL_X, NEG_ONE, NEG_HALF)>;
94 def R600_Reg128 : RegisterClass<"AMDGPU", [v4f32, v4i32], 128, (add
105 for ($i = 0; $i <= $#creg_list; $i++) {
106 push(@{$index_map{get_hw_index($i)}}, $creg_list[$i]);
107 push(@{$chan_map{get_chan_str($i)}}, $creg_list[$i]);
110 for ($i = 0; $i <= $#treg_list; $i++) {
111 push(@{$index_map{get_hw_index($i)}}, $treg_list[$i]);
112 push(@{$chan_map{get_chan_str($i)}}, $treg_list[$i]);
115 for ($i = 0; $i <= $#t128reg; $i++) {
116 push(@{$index_map{$i}}, $t128reg[$i]);
117 push(@{$chan_map{'X'}}, $t128reg[$i]);
120 open(OUTFILE, ">", "R600HwRegInfo.include");
122 print OUTFILE <<STRING;
124 unsigned R600RegisterInfo::getHWRegChanGen(unsigned reg) const
127 default: assert(!"Unknown register"); return 0;
130 foreach my $key (keys(%chan_map)) {
131 foreach my $reg (@{$chan_map{$key}}) {
133 print OUTFILE " case AMDGPU::$reg:\n";
138 } elsif ($key eq 'Y') {
140 } elsif ($key eq 'Z') {
142 } elsif ($key eq 'W') {
145 die("Unknown chan value; $key");
147 print OUTFILE " return $val;\n\n";
150 print OUTFILE " }\n}\n\n";
153 my ($count, $prefix) = @_;
157 for ($i = 0; $i < $count; $i++) {
158 my $hw_index = get_hw_index($i);
159 my $chan= get_chan_str($i);
160 my $name = "$prefix$hw_index\_$chan";
161 print qq{def $name : R600Reg <"$prefix$hw_index.$chan", $hw_index>;\n};
162 $reg_list[$i] = $name;
164 $reg_list[$i] .= "\n";
173 return int($index / 4);
178 my $chan = $index % 4;
181 } elsif ($chan == 1) {
183 } elsif ($chan == 2) {
185 } elsif ($chan == 3) {
188 die("Unknown chan value: $chan");