lib/Target/AMDGPU/CMakeLists.txt

   1 set(LLVM_TARGET_DEFINITIONS AMDGPU.td)
   2
   3 tablegen(LLVM AMDGPUGenRegisterInfo.inc -gen-register-info)
   4 tablegen(LLVM AMDGPUGenInstrInfo.inc -gen-instr-info)
   5 tablegen(LLVM AMDGPUGenDAGISel.inc -gen-dag-isel)
   6 tablegen(LLVM AMDGPUGenCallingConv.inc -gen-callingconv)
   7 tablegen(LLVM AMDGPUGenSubtargetInfo.inc -gen-subtarget)
   8 tablegen(LLVM AMDGPUGenIntrinsics.inc -gen-tgt-intrinsic)
   9 tablegen(LLVM AMDGPUGenCodeEmitter.inc -gen-emitter)
  10 tablegen(LLVM AMDGPUGenDFAPacketizer.inc -gen-dfa-packetizer)
  11 add_public_tablegen_target(AMDGPUCommonTableGen)
  12
  13 add_llvm_target(AMDGPUCodeGen
  14   AMDIL7XXDevice.cpp
  15   AMDILCFGStructurizer.cpp
  16   AMDILDevice.cpp
  17   AMDILDeviceInfo.cpp
  18   AMDILEvergreenDevice.cpp
  19   AMDILFrameLowering.cpp
  20   AMDILInstrInfo.cpp
  21   AMDILIntrinsicInfo.cpp
  22   AMDILISelDAGToDAG.cpp
  23   AMDILISelLowering.cpp
  24   AMDILNIDevice.cpp
  25   AMDILPeepholeOptimizer.cpp
  26   AMDILRegisterInfo.cpp
  27   AMDILSIDevice.cpp
  28   AMDILSubtarget.cpp
  29   AMDGPUTargetMachine.cpp
  30   AMDGPUISelLowering.cpp
  31   AMDGPUConvertToISA.cpp
  32   AMDGPUInstrInfo.cpp
  33   AMDGPURegisterInfo.cpp
  34   AMDGPUUtil.cpp
  35   R600CodeEmitter.cpp
  36   R600InstrInfo.cpp
  37   R600ISelLowering.cpp
  38   R600KernelParameters.cpp
  39   R600MachineFunctionInfo.cpp
  40   R600RegisterInfo.cpp
  41   SIAssignInterpRegs.cpp
  42   SICodeEmitter.cpp
  43   SIInstrInfo.cpp
  44   SIISelLowering.cpp
  45   SIMachineFunctionInfo.cpp
  46   SIRegisterInfo.cpp
  47   )
  48
  49 add_subdirectory(TargetInfo)
  50 add_subdirectory(MCTargetDesc)