1 //===--- AArch64Subtarget.h - Define Subtarget for the AArch64 -*- C++ -*--===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the AArch64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef AArch64SUBTARGET_H
15 #define AArch64SUBTARGET_H
17 #include "AArch64FrameLowering.h"
18 #include "AArch64RegisterInfo.h"
19 #include "AArch64SelectionDAGInfo.h"
20 #include "llvm/IR/DataLayout.h"
21 #include "llvm/Target/TargetSubtargetInfo.h"
24 #define GET_SUBTARGETINFO_HEADER
25 #include "AArch64GenSubtargetInfo.inc"
31 class AArch64Subtarget : public AArch64GenSubtargetInfo {
33 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
35 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
36 ARMProcFamilyEnum ARMProcFamily;
43 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
44 bool HasZeroCycleRegMove;
46 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
47 bool HasZeroCycleZeroing;
49 /// CPUString - String name of used CPU.
50 std::string CPUString;
52 /// TargetTriple - What processor and OS we're targeting.
56 AArch64FrameLowering FrameLowering;
57 AArch64SelectionDAGInfo TSInfo;
60 /// This constructor initializes the data members to match that
61 /// of the specified triple.
62 AArch64Subtarget(const std::string &TT, const std::string &CPU,
63 const std::string &FS, bool LittleEndian);
65 const AArch64SelectionDAGInfo *getSelectionDAGInfo() const { return &TSInfo; }
66 const AArch64FrameLowering *getFrameLowering() const {
67 return &FrameLowering;
69 const DataLayout *getDataLayout() const { return &DL; }
70 bool enableMachineScheduler() const override { return true; }
72 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
74 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
76 bool hasFPARMv8() const { return HasFPARMv8; }
77 bool hasNEON() const { return HasNEON; }
78 bool hasCrypto() const { return HasCrypto; }
79 bool hasCRC() const { return HasCRC; }
81 bool isLittleEndian() const { return DL.isLittleEndian(); }
83 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
85 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
87 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
89 bool isCyclone() const { return CPUString == "cyclone"; }
91 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
92 /// that still makes it profitable to inline the call.
93 unsigned getMaxInlineSizeThreshold() const { return 64; }
95 /// ParseSubtargetFeatures - Parses features string setting specified
96 /// subtarget options. Definition of function is auto generated by tblgen.
97 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
99 /// ClassifyGlobalReference - Find the target operand flags that describe
100 /// how a global value should be referenced for the current subtarget.
101 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
102 const TargetMachine &TM) const;
104 /// This function returns the name of a function which has an interface
105 /// like the non-standard bzero function, if such a function exists on
106 /// the current subtarget and it is considered prefereable over
107 /// memset with zero passed as the second argument. Otherwise it
109 const char *getBZeroEntry() const;
111 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
113 unsigned NumRegionInstrs) const override;
115 bool enableEarlyIfConversion() const override;
117 } // End llvm namespace
119 #endif // AArch64SUBTARGET_H