1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
19 #include "llvm/ADT/Twine.h"
27 // List of canonical FPU names (use getFPUSynonym) and which architectural
28 // features they correspond to (use getFPUFeatures).
29 // FIXME: TableGen this.
30 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
35 ARM::FPUVersion FPUVersion;
36 ARM::NeonSupportLevel NeonSupport;
37 ARM::FPURestriction Restriction;
39 StringRef getName() const { return StringRef(NameCStr, NameLength); }
41 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
42 { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
43 #include "llvm/Support/ARMTargetParser.def"
46 // List of canonical arch names (use getArchSynonym).
47 // This table also provides the build attribute fields for CPU arch
48 // and Arch ID, according to the Addenda to the ARM ABI, chapters
49 // 2.4 and 2.3.5.2 respectively.
50 // FIXME: SubArch values were simplified to fit into the expectations
51 // of the triples and are not conforming with their official names.
52 // Check to see if the expectation should be changed.
53 // FIXME: TableGen this.
58 const char *CPUAttrCStr;
60 const char *SubArchCStr;
62 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
64 unsigned ArchBaseExtensions;
66 StringRef getName() const { return StringRef(NameCStr, NameLength); }
68 // CPU class in build attributes.
69 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
72 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
74 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
75 {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
76 sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT},
77 #include "llvm/Support/ARMTargetParser.def"
80 // List of Arch Extension names.
81 // FIXME: TableGen this.
87 const char *NegFeature;
89 StringRef getName() const { return StringRef(NameCStr, NameLength); }
90 StringRef getNegName() const { return (Twine("no") + getName()).str(); }
92 #define ARM_ARCH_EXT_NAME(NAME, ID, FEATURE, NEGFEATURE) \
93 { NAME, sizeof(NAME) - 1, ID, FEATURE, NEGFEATURE },
94 #include "llvm/Support/ARMTargetParser.def"
97 // List of HWDiv names (use getHWDivSynonym) and which architectural
98 // features they correspond to (use getHWDivFeatures).
99 // FIXME: TableGen this.
100 static const struct {
101 const char *NameCStr;
105 StringRef getName() const { return StringRef(NameCStr, NameLength); }
107 #define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
108 #include "llvm/Support/ARMTargetParser.def"
111 // List of CPU names and their arches.
112 // The same CPU can have multiple arches and can be default on multiple arches.
113 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
114 // When this becomes table-generated, we'd probably need two tables.
115 // FIXME: TableGen this.
116 static const struct {
117 const char *NameCStr;
119 ARM::ArchKind ArchID;
120 bool Default; // is $Name the default CPU for $ArchID ?
121 unsigned DefaultExtensions;
123 StringRef getName() const { return StringRef(NameCStr, NameLength); }
125 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
126 { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
127 #include "llvm/Support/ARMTargetParser.def"
132 // ======================================================= //
134 // ======================================================= //
136 StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
137 if (FPUKind >= ARM::FK_LAST)
139 return FPUNames[FPUKind].getName();
142 unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
143 if (FPUKind >= ARM::FK_LAST)
145 return FPUNames[FPUKind].FPUVersion;
148 unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
149 if (FPUKind >= ARM::FK_LAST)
151 return FPUNames[FPUKind].NeonSupport;
154 unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
155 if (FPUKind >= ARM::FK_LAST)
157 return FPUNames[FPUKind].Restriction;
160 unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
161 if (CPU == "generic")
162 return ARCHNames[ArchKind].DefaultFPU;
164 return StringSwitch<unsigned>(CPU)
165 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
166 .Case(NAME, DEFAULT_FPU)
167 #include "llvm/Support/ARMTargetParser.def"
168 .Default(ARM::FK_INVALID);
171 unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
172 if (CPU == "generic")
173 return ARCHNames[ArchKind].ArchBaseExtensions;
175 return StringSwitch<unsigned>(CPU)
176 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
177 .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
178 #include "llvm/Support/ARMTargetParser.def"
179 .Default(ARM::AEK_INVALID);
182 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
183 std::vector<const char *> &Features) {
185 if (HWDivKind == ARM::AEK_INVALID)
188 if (HWDivKind & ARM::AEK_HWDIVARM)
189 Features.push_back("+hwdiv-arm");
191 Features.push_back("-hwdiv-arm");
193 if (HWDivKind & ARM::AEK_HWDIV)
194 Features.push_back("+hwdiv");
196 Features.push_back("-hwdiv");
201 bool llvm::ARM::getExtensionFeatures(unsigned Extensions,
202 std::vector<const char *> &Features) {
204 if (Extensions == ARM::AEK_INVALID)
207 if (Extensions & ARM::AEK_CRC)
208 Features.push_back("+crc");
210 Features.push_back("-crc");
212 if (Extensions & ARM::AEK_DSP)
213 Features.push_back("+dsp");
215 Features.push_back("-dsp");
217 return getHWDivFeatures(Extensions, Features);
220 bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
221 std::vector<const char *> &Features) {
223 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
226 // fp-only-sp and d16 subtarget features are independent of each other, so we
227 // must enable/disable both.
228 switch (FPUNames[FPUKind].Restriction) {
230 Features.push_back("+fp-only-sp");
231 Features.push_back("+d16");
234 Features.push_back("-fp-only-sp");
235 Features.push_back("+d16");
238 Features.push_back("-fp-only-sp");
239 Features.push_back("-d16");
243 // FPU version subtarget features are inclusive of lower-numbered ones, so
244 // enable the one corresponding to this version and disable all that are
245 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
246 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
247 switch (FPUNames[FPUKind].FPUVersion) {
249 Features.push_back("+fp-armv8");
252 Features.push_back("+vfp4");
253 Features.push_back("-fp-armv8");
255 case ARM::FV_VFPV3_FP16:
256 Features.push_back("+vfp3");
257 Features.push_back("+fp16");
258 Features.push_back("-vfp4");
259 Features.push_back("-fp-armv8");
262 Features.push_back("+vfp3");
263 Features.push_back("-fp16");
264 Features.push_back("-vfp4");
265 Features.push_back("-fp-armv8");
268 Features.push_back("+vfp2");
269 Features.push_back("-vfp3");
270 Features.push_back("-fp16");
271 Features.push_back("-vfp4");
272 Features.push_back("-fp-armv8");
275 Features.push_back("-vfp2");
276 Features.push_back("-vfp3");
277 Features.push_back("-fp16");
278 Features.push_back("-vfp4");
279 Features.push_back("-fp-armv8");
283 // crypto includes neon, so we handle this similarly to FPU version.
284 switch (FPUNames[FPUKind].NeonSupport) {
286 Features.push_back("+neon");
287 Features.push_back("+crypto");
290 Features.push_back("+neon");
291 Features.push_back("-crypto");
294 Features.push_back("-neon");
295 Features.push_back("-crypto");
302 StringRef llvm::ARM::getArchName(unsigned ArchKind) {
303 if (ArchKind >= ARM::AK_LAST)
305 return ARCHNames[ArchKind].getName();
308 StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
309 if (ArchKind >= ARM::AK_LAST)
311 return ARCHNames[ArchKind].getCPUAttr();
314 StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
315 if (ArchKind >= ARM::AK_LAST)
317 return ARCHNames[ArchKind].getSubArch();
320 unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
321 if (ArchKind >= ARM::AK_LAST)
322 return ARMBuildAttrs::CPUArch::Pre_v4;
323 return ARCHNames[ArchKind].ArchAttr;
326 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
327 for (const auto AE : ARCHExtNames) {
328 if (ArchExtKind == AE.ID)
334 const char *llvm::ARM::getArchExtFeature(StringRef ArchExt) {
335 for (const auto AE : ARCHExtNames) {
336 if (AE.Feature && ArchExt == AE.getName())
338 else if (AE.NegFeature && ArchExt == AE.getNegName())
339 return AE.NegFeature;
345 StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
346 for (const auto D : HWDivNames) {
347 if (HWDivKind == D.ID)
353 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
354 unsigned AK = parseArch(Arch);
355 if (AK == ARM::AK_INVALID)
358 // Look for multiple AKs to find the default for pair AK+Name.
359 for (const auto CPU : CPUNames) {
360 if (CPU.ArchID == AK && CPU.Default)
361 return CPU.getName();
364 // If we can't find a default then target the architecture instead
368 // ======================================================= //
370 // ======================================================= //
372 static StringRef getHWDivSynonym(StringRef HWDiv) {
373 return StringSwitch<StringRef>(HWDiv)
374 .Case("thumb,arm", "arm,thumb")
378 static StringRef getFPUSynonym(StringRef FPU) {
379 return StringSwitch<StringRef>(FPU)
380 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
381 .Case("vfp2", "vfpv2")
382 .Case("vfp3", "vfpv3")
383 .Case("vfp4", "vfpv4")
384 .Case("vfp3-d16", "vfpv3-d16")
385 .Case("vfp4-d16", "vfpv4-d16")
386 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
387 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
388 .Case("fp5-sp-d16", "fpv5-sp-d16")
389 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
390 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
391 .Case("neon-vfpv3", "neon")
395 static StringRef getArchSynonym(StringRef Arch) {
396 return StringSwitch<StringRef>(Arch)
400 .Cases("v6m", "v6sm", "v6s-m", "v6-m")
401 .Cases("v6z", "v6zk", "v6kz")
402 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
405 .Case("v7em", "v7e-m")
406 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
407 .Case("v8.1a", "v8.1-a")
411 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
412 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
413 // "v.+", if the latter, return unmodified string, minus 'eb'.
414 // If invalid, return empty string.
415 StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
416 size_t offset = StringRef::npos;
418 StringRef Error = "";
420 // Begins with "arm" / "thumb", move past it.
421 if (A.startswith("arm64"))
423 else if (A.startswith("arm"))
425 else if (A.startswith("thumb"))
427 else if (A.startswith("aarch64")) {
429 // AArch64 uses "_be", not "eb" suffix.
430 if (A.find("eb") != StringRef::npos)
432 if (A.substr(offset, 3) == "_be")
436 // Ex. "armebv7", move past the "eb".
437 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
439 // Or, if it ends with eb ("armv7eb"), chop it off.
440 else if (A.endswith("eb"))
441 A = A.substr(0, A.size() - 2);
443 if (offset != StringRef::npos)
444 A = A.substr(offset);
446 // Empty string means offset reached the end, which means it's valid.
450 // Only match non-marketing names
451 if (offset != StringRef::npos) {
452 // Must start with 'vN'.
453 if (A[0] != 'v' || !std::isdigit(A[1]))
455 // Can't have an extra 'eb'.
456 if (A.find("eb") != StringRef::npos)
460 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
464 unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
465 StringRef Syn = getHWDivSynonym(HWDiv);
466 for (const auto D : HWDivNames) {
467 if (Syn == D.getName())
470 return ARM::AEK_INVALID;
473 unsigned llvm::ARM::parseFPU(StringRef FPU) {
474 StringRef Syn = getFPUSynonym(FPU);
475 for (const auto F : FPUNames) {
476 if (Syn == F.getName())
479 return ARM::FK_INVALID;
482 // Allows partial match, ex. "v7a" matches "armv7a".
483 unsigned llvm::ARM::parseArch(StringRef Arch) {
484 Arch = getCanonicalArchName(Arch);
485 StringRef Syn = getArchSynonym(Arch);
486 for (const auto A : ARCHNames) {
487 if (A.getName().endswith(Syn))
490 return ARM::AK_INVALID;
493 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
494 for (const auto A : ARCHExtNames) {
495 if (ArchExt == A.getName())
498 return ARM::AEK_INVALID;
501 unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
502 for (const auto C : CPUNames) {
503 if (CPU == C.getName())
506 return ARM::AK_INVALID;
509 // ARM, Thumb, AArch64
510 unsigned llvm::ARM::parseArchISA(StringRef Arch) {
511 return StringSwitch<unsigned>(Arch)
512 .StartsWith("aarch64", ARM::IK_AARCH64)
513 .StartsWith("arm64", ARM::IK_AARCH64)
514 .StartsWith("thumb", ARM::IK_THUMB)
515 .StartsWith("arm", ARM::IK_ARM)
516 .Default(ARM::EK_INVALID);
520 unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
521 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
522 Arch.startswith("aarch64_be"))
525 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
526 if (Arch.endswith("eb"))
529 return ARM::EK_LITTLE;
532 if (Arch.startswith("aarch64"))
533 return ARM::EK_LITTLE;
535 return ARM::EK_INVALID;
539 unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
540 Arch = getCanonicalArchName(Arch);
541 switch (parseArch(Arch)) {
544 case ARM::AK_ARMV7EM:
551 case ARM::AK_ARMV8_1A:
554 return ARM::PK_INVALID;
557 // Version number (ex. v7 = 7).
558 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
559 Arch = getCanonicalArchName(Arch);
560 switch (parseArch(Arch)) {
571 case ARM::AK_ARMV5TE:
573 case ARM::AK_IWMMXT2:
575 case ARM::AK_ARMV5TEJ:
580 case ARM::AK_ARMV6T2:
581 case ARM::AK_ARMV6KZ:
588 case ARM::AK_ARMV7EM:
592 case ARM::AK_ARMV8_1A: