1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
26 // List of canonical FPU names (use getFPUSynonym) and which architectural
27 // features they correspond to (use getFPUFeatures).
28 // FIXME: TableGen this.
29 // The entries must appear in the order listed in ARM::FPUKind for correct indexing
34 ARM::FPUVersion FPUVersion;
35 ARM::NeonSupportLevel NeonSupport;
36 ARM::FPURestriction Restriction;
38 StringRef getName() const { return StringRef(NameCStr, NameLength); }
40 #define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) \
41 { NAME, sizeof(NAME) - 1, KIND, VERSION, NEON_SUPPORT, RESTRICTION },
42 #include "llvm/Support/ARMTargetParser.def"
45 // List of canonical arch names (use getArchSynonym).
46 // This table also provides the build attribute fields for CPU arch
47 // and Arch ID, according to the Addenda to the ARM ABI, chapters
48 // 2.4 and 2.3.5.2 respectively.
49 // FIXME: SubArch values were simplified to fit into the expectations
50 // of the triples and are not conforming with their official names.
51 // Check to see if the expectation should be changed.
52 // FIXME: TableGen this.
57 const char *CPUAttrCStr;
59 const char *SubArchCStr;
61 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
62 unsigned ArchBaseExtensions;
64 StringRef getName() const { return StringRef(NameCStr, NameLength); }
66 // CPU class in build attributes.
67 StringRef getCPUAttr() const { return StringRef(CPUAttrCStr, CPUAttrLength); }
70 StringRef getSubArch() const { return StringRef(SubArchCStr, SubArchLength); }
72 #define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_BASE_EXT) \
73 {NAME, sizeof(NAME) - 1, ID, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
74 sizeof(SUB_ARCH) - 1, ARCH_ATTR, ARCH_BASE_EXT},
75 #include "llvm/Support/ARMTargetParser.def"
78 // List of Arch Extension names.
79 // FIXME: TableGen this.
85 StringRef getName() const { return StringRef(NameCStr, NameLength); }
87 #define ARM_ARCH_EXT_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
88 #include "llvm/Support/ARMTargetParser.def"
91 // List of HWDiv names (use getHWDivSynonym) and which architectural
92 // features they correspond to (use getHWDivFeatures).
93 // FIXME: TableGen this.
99 StringRef getName() const { return StringRef(NameCStr, NameLength); }
101 #define ARM_HW_DIV_NAME(NAME, ID) { NAME, sizeof(NAME) - 1, ID },
102 #include "llvm/Support/ARMTargetParser.def"
105 // List of CPU names and their arches.
106 // The same CPU can have multiple arches and can be default on multiple arches.
107 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
108 // When this becomes table-generated, we'd probably need two tables.
109 // FIXME: TableGen this.
111 const char *NameCStr;
113 ARM::ArchKind ArchID;
114 bool Default; // is $Name the default CPU for $ArchID ?
115 unsigned DefaultExtensions;
117 StringRef getName() const { return StringRef(NameCStr, NameLength); }
119 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
120 { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
121 #include "llvm/Support/ARMTargetParser.def"
126 // ======================================================= //
128 // ======================================================= //
130 StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
131 if (FPUKind >= ARM::FK_LAST)
133 return FPUNames[FPUKind].getName();
136 unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
137 if (FPUKind >= ARM::FK_LAST)
139 return FPUNames[FPUKind].FPUVersion;
142 unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
143 if (FPUKind >= ARM::FK_LAST)
145 return FPUNames[FPUKind].NeonSupport;
148 unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
149 if (FPUKind >= ARM::FK_LAST)
151 return FPUNames[FPUKind].Restriction;
154 unsigned llvm::ARM::getDefaultFPU(StringRef CPU) {
155 return StringSwitch<unsigned>(CPU)
156 #define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
157 .Case(NAME, DEFAULT_FPU)
158 #include "llvm/Support/ARMTargetParser.def"
159 .Default(ARM::FK_INVALID);
162 bool llvm::ARM::getHWDivFeatures(unsigned HWDivKind,
163 std::vector<const char *> &Features) {
165 if (HWDivKind == ARM::AEK_INVALID)
168 if (HWDivKind & ARM::AEK_HWDIVARM)
169 Features.push_back("+hwdiv-arm");
171 Features.push_back("-hwdiv-arm");
173 if (HWDivKind & ARM::AEK_HWDIV)
174 Features.push_back("+hwdiv");
176 Features.push_back("-hwdiv");
181 bool llvm::ARM::getExtensionFeatures(unsigned Extensions,
182 std::vector<const char *> &Features) {
184 if (Extensions == ARM::AEK_INVALID)
187 if (Extensions & ARM::AEK_CRC)
188 Features.push_back("+crc");
190 Features.push_back("-crc");
192 if (Extensions & ARM::AEK_DSP)
193 Features.push_back("+dsp");
195 Features.push_back("-dsp");
197 return getHWDivFeatures(Extensions, Features);
200 bool llvm::ARM::getFPUFeatures(unsigned FPUKind,
201 std::vector<const char *> &Features) {
203 if (FPUKind >= ARM::FK_LAST || FPUKind == ARM::FK_INVALID)
206 // fp-only-sp and d16 subtarget features are independent of each other, so we
207 // must enable/disable both.
208 switch (FPUNames[FPUKind].Restriction) {
210 Features.push_back("+fp-only-sp");
211 Features.push_back("+d16");
214 Features.push_back("-fp-only-sp");
215 Features.push_back("+d16");
218 Features.push_back("-fp-only-sp");
219 Features.push_back("-d16");
223 // FPU version subtarget features are inclusive of lower-numbered ones, so
224 // enable the one corresponding to this version and disable all that are
225 // higher. We also have to make sure to disable fp16 when vfp4 is disabled,
226 // as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
227 switch (FPUNames[FPUKind].FPUVersion) {
229 Features.push_back("+fp-armv8");
232 Features.push_back("+vfp4");
233 Features.push_back("-fp-armv8");
235 case ARM::FV_VFPV3_FP16:
236 Features.push_back("+vfp3");
237 Features.push_back("+fp16");
238 Features.push_back("-vfp4");
239 Features.push_back("-fp-armv8");
242 Features.push_back("+vfp3");
243 Features.push_back("-fp16");
244 Features.push_back("-vfp4");
245 Features.push_back("-fp-armv8");
248 Features.push_back("+vfp2");
249 Features.push_back("-vfp3");
250 Features.push_back("-fp16");
251 Features.push_back("-vfp4");
252 Features.push_back("-fp-armv8");
255 Features.push_back("-vfp2");
256 Features.push_back("-vfp3");
257 Features.push_back("-fp16");
258 Features.push_back("-vfp4");
259 Features.push_back("-fp-armv8");
263 // crypto includes neon, so we handle this similarly to FPU version.
264 switch (FPUNames[FPUKind].NeonSupport) {
266 Features.push_back("+neon");
267 Features.push_back("+crypto");
270 Features.push_back("+neon");
271 Features.push_back("-crypto");
274 Features.push_back("-neon");
275 Features.push_back("-crypto");
282 StringRef llvm::ARM::getArchName(unsigned ArchKind) {
283 if (ArchKind >= ARM::AK_LAST)
285 return ARCHNames[ArchKind].getName();
288 StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
289 if (ArchKind >= ARM::AK_LAST)
291 return ARCHNames[ArchKind].getCPUAttr();
294 StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
295 if (ArchKind >= ARM::AK_LAST)
297 return ARCHNames[ArchKind].getSubArch();
300 unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
301 if (ArchKind >= ARM::AK_LAST)
302 return ARMBuildAttrs::CPUArch::Pre_v4;
303 return ARCHNames[ArchKind].ArchAttr;
306 StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
307 for (const auto AE : ARCHExtNames) {
308 if (ArchExtKind == AE.ID)
314 StringRef llvm::ARM::getHWDivName(unsigned HWDivKind) {
315 for (const auto D : HWDivNames) {
316 if (HWDivKind == D.ID)
322 unsigned llvm::ARM::getDefaultExtensions(StringRef CPU) {
323 for (const auto C : CPUNames) {
324 if (CPU == C.getName())
325 return (ARCHNames[C.ArchID].ArchBaseExtensions | C.DefaultExtensions);
327 return ARM::AEK_INVALID;
330 StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
331 unsigned AK = parseArch(Arch);
332 if (AK == ARM::AK_INVALID)
335 // Look for multiple AKs to find the default for pair AK+Name.
336 for (const auto CPU : CPUNames) {
337 if (CPU.ArchID == AK && CPU.Default)
338 return CPU.getName();
343 // ======================================================= //
345 // ======================================================= //
347 static StringRef getHWDivSynonym(StringRef HWDiv) {
348 return StringSwitch<StringRef>(HWDiv)
349 .Case("thumb,arm", "arm,thumb")
353 static StringRef getFPUSynonym(StringRef FPU) {
354 return StringSwitch<StringRef>(FPU)
355 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
356 .Case("vfp2", "vfpv2")
357 .Case("vfp3", "vfpv3")
358 .Case("vfp4", "vfpv4")
359 .Case("vfp3-d16", "vfpv3-d16")
360 .Case("vfp4-d16", "vfpv4-d16")
361 .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
362 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
363 .Case("fp5-sp-d16", "fpv5-sp-d16")
364 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
365 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
366 .Case("neon-vfpv3", "neon")
370 static StringRef getArchSynonym(StringRef Arch) {
371 return StringSwitch<StringRef>(Arch)
375 .Cases("v6m", "v6sm", "v6s-m", "v6-m")
376 .Cases("v7", "v7a", "v7hl", "v7l", "v7-a")
379 .Case("v7em", "v7e-m")
380 .Cases("v8", "v8a", "aarch64", "arm64", "v8-a")
381 .Case("v8.1a", "v8.1-a")
385 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
386 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
387 // "v.+", if the latter, return unmodified string, minus 'eb'.
388 // If invalid, return empty string.
389 StringRef llvm::ARM::getCanonicalArchName(StringRef Arch) {
390 size_t offset = StringRef::npos;
392 StringRef Error = "";
394 // Begins with "arm" / "thumb", move past it.
395 if (A.startswith("arm64"))
397 else if (A.startswith("arm"))
399 else if (A.startswith("thumb"))
401 else if (A.startswith("aarch64")) {
403 // AArch64 uses "_be", not "eb" suffix.
404 if (A.find("eb") != StringRef::npos)
406 if (A.substr(offset, 3) == "_be")
410 // Ex. "armebv7", move past the "eb".
411 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
413 // Or, if it ends with eb ("armv7eb"), chop it off.
414 else if (A.endswith("eb"))
415 A = A.substr(0, A.size() - 2);
417 if (offset != StringRef::npos)
418 A = A.substr(offset);
420 // Empty string means offset reached the end, which means it's valid.
424 // Only match non-marketing names
425 if (offset != StringRef::npos) {
426 // Must start with 'vN'.
427 if (A[0] != 'v' || !std::isdigit(A[1]))
429 // Can't have an extra 'eb'.
430 if (A.find("eb") != StringRef::npos)
434 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
438 unsigned llvm::ARM::parseHWDiv(StringRef HWDiv) {
439 StringRef Syn = getHWDivSynonym(HWDiv);
440 for (const auto D : HWDivNames) {
441 if (Syn == D.getName())
444 return ARM::AEK_INVALID;
447 unsigned llvm::ARM::parseFPU(StringRef FPU) {
448 StringRef Syn = getFPUSynonym(FPU);
449 for (const auto F : FPUNames) {
450 if (Syn == F.getName())
453 return ARM::FK_INVALID;
456 // Allows partial match, ex. "v7a" matches "armv7a".
457 unsigned llvm::ARM::parseArch(StringRef Arch) {
458 Arch = getCanonicalArchName(Arch);
459 StringRef Syn = getArchSynonym(Arch);
460 for (const auto A : ARCHNames) {
461 if (A.getName().endswith(Syn))
464 return ARM::AK_INVALID;
467 unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
468 for (const auto A : ARCHExtNames) {
469 if (ArchExt == A.getName())
472 return ARM::AEK_INVALID;
475 unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
476 for (const auto C : CPUNames) {
477 if (CPU == C.getName())
480 return ARM::AK_INVALID;
483 // ARM, Thumb, AArch64
484 unsigned llvm::ARM::parseArchISA(StringRef Arch) {
485 return StringSwitch<unsigned>(Arch)
486 .StartsWith("aarch64", ARM::IK_AARCH64)
487 .StartsWith("arm64", ARM::IK_AARCH64)
488 .StartsWith("thumb", ARM::IK_THUMB)
489 .StartsWith("arm", ARM::IK_ARM)
490 .Default(ARM::EK_INVALID);
494 unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
495 if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
496 Arch.startswith("aarch64_be"))
499 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
500 if (Arch.endswith("eb"))
503 return ARM::EK_LITTLE;
506 if (Arch.startswith("aarch64"))
507 return ARM::EK_LITTLE;
509 return ARM::EK_INVALID;
513 unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
514 Arch = getCanonicalArchName(Arch);
515 switch (parseArch(Arch)) {
518 case ARM::AK_ARMV7EM:
525 case ARM::AK_ARMV8_1A:
528 return ARM::PK_INVALID;
531 // Version number (ex. v7 = 7).
532 unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
533 Arch = getCanonicalArchName(Arch);
534 switch (parseArch(Arch)) {
545 case ARM::AK_ARMV5TE:
547 case ARM::AK_IWMMXT2:
549 case ARM::AK_ARMV5TEJ:
554 case ARM::AK_ARMV6T2:
556 case ARM::AK_ARMV6ZK:
563 case ARM::AK_ARMV7EM:
567 case ARM::AK_ARMV8_1A: