1 //===-- TargetParser - Parser for target features ---------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements a target parser to recognise hardware features such as
11 // FPU/CPU/ARCH names as well as specific support such as HDIV, etc.
13 //===----------------------------------------------------------------------===//
15 #include "llvm/Support/ARMBuildAttributes.h"
16 #include "llvm/Support/TargetParser.h"
17 #include "llvm/ADT/StringExtras.h"
18 #include "llvm/ADT/StringSwitch.h"
25 // List of canonical FPU names (use getFPUSynonym).
26 // FIXME: TableGen this.
31 { "invalid", ARM::FK_INVALID },
32 { "vfp", ARM::FK_VFP },
33 { "vfpv2", ARM::FK_VFPV2 },
34 { "vfpv3", ARM::FK_VFPV3 },
35 { "vfpv3-d16", ARM::FK_VFPV3_D16 },
36 { "vfpv4", ARM::FK_VFPV4 },
37 { "vfpv4-d16", ARM::FK_VFPV4_D16 },
38 { "fpv5-d16", ARM::FK_FPV5_D16 },
39 { "fp-armv8", ARM::FK_FP_ARMV8 },
40 { "neon", ARM::FK_NEON },
41 { "neon-vfpv4", ARM::FK_NEON_VFPV4 },
42 { "neon-fp-armv8", ARM::FK_NEON_FP_ARMV8 },
43 { "crypto-neon-fp-armv8", ARM::FK_CRYPTO_NEON_FP_ARMV8 },
44 { "softvfp", ARM::FK_SOFTVFP }
46 // List of canonical arch names (use getArchSynonym).
47 // This table also provides the build attribute fields for CPU arch
48 // and Arch ID, according to the Addenda to the ARM ABI, chapters
49 // 2.4 and 2.3.5.2 respectively.
50 // FIXME: SubArch values were simplified to fit into the expectations
51 // of the triples and are not conforming with their official names.
52 // Check to see if the expectation should be changed.
53 // FIXME: TableGen this.
57 const char *CPUAttr; // CPU class in build attributes.
58 const char *SubArch; // Sub-Arch name.
59 ARMBuildAttrs::CPUArch ArchAttr; // Arch ID in build attributes.
61 { "invalid", ARM::AK_INVALID, nullptr, nullptr, ARMBuildAttrs::CPUArch::Pre_v4 },
62 { "armv2", ARM::AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4 },
63 { "armv2a", ARM::AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4 },
64 { "armv3", ARM::AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4 },
65 { "armv3m", ARM::AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4 },
66 { "armv4", ARM::AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4 },
67 { "armv4t", ARM::AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T },
68 { "armv5t", ARM::AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T },
69 { "armv5te", ARM::AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE },
70 { "armv5tej", ARM::AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ },
71 { "armv6", ARM::AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6 },
72 { "armv6k", ARM::AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K },
73 { "armv6t2", ARM::AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2 },
74 { "armv6z", ARM::AK_ARMV6Z, "6Z", "v6z", ARMBuildAttrs::CPUArch::v6KZ },
75 { "armv6zk", ARM::AK_ARMV6ZK, "6ZK", "v6zk", ARMBuildAttrs::CPUArch::v6KZ },
76 { "armv6-m", ARM::AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M },
77 { "armv6s-m", ARM::AK_ARMV6SM, "6S-M", "v6sm", ARMBuildAttrs::CPUArch::v6S_M },
78 { "armv7-a", ARM::AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7 },
79 { "armv7-r", ARM::AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7 },
80 { "armv7-m", ARM::AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7 },
81 { "armv7e-m", ARM::AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M },
82 { "armv8-a", ARM::AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8 },
83 { "armv8.1-a", ARM::AK_ARMV8_1A, "8.1-A", "v8.1a", ARMBuildAttrs::CPUArch::v8 },
84 // Non-standard Arch names.
85 { "iwmmxt", ARM::AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE },
86 { "iwmmxt2", ARM::AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE },
87 { "xscale", ARM::AK_XSCALE, "xscale", "", ARMBuildAttrs::CPUArch::v5TE },
88 { "armv5", ARM::AK_ARMV5, "5T", "v5", ARMBuildAttrs::CPUArch::v5T },
89 { "armv5e", ARM::AK_ARMV5E, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE },
90 { "armv6j", ARM::AK_ARMV6J, "6J", "v6", ARMBuildAttrs::CPUArch::v6 },
91 { "armv6hl", ARM::AK_ARMV6HL, "6-M", "v6hl", ARMBuildAttrs::CPUArch::v6_M },
92 { "armv7", ARM::AK_ARMV7, "7", "v7", ARMBuildAttrs::CPUArch::v7 },
93 { "armv7l", ARM::AK_ARMV7L, "7-L", "v7l", ARMBuildAttrs::CPUArch::v7 },
94 { "armv7hl", ARM::AK_ARMV7HL, "7-L", "v7hl", ARMBuildAttrs::CPUArch::v7 },
95 { "armv7s", ARM::AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7 }
97 // List of Arch Extension names.
98 // FIXME: TableGen this.
103 { "invalid", ARM::AEK_INVALID },
104 { "crc", ARM::AEK_CRC },
105 { "crypto", ARM::AEK_CRYPTO },
106 { "fp", ARM::AEK_FP },
107 { "idiv", ARM::AEK_HWDIV },
108 { "mp", ARM::AEK_MP },
109 { "sec", ARM::AEK_SEC },
110 { "virt", ARM::AEK_VIRT }
112 // List of CPU names and their arches.
113 // The same CPU can have multiple arches and can be default on multiple arches.
114 // When finding the Arch for a CPU, first-found prevails. Sort them accordingly.
115 // When this becomes table-generated, we'd probably need two tables.
116 // FIXME: TableGen this.
119 ARM::ArchKind ArchID;
122 { "arm2", ARM::AK_ARMV2, true },
123 { "arm3", ARM::AK_ARMV2A, true },
124 { "arm6", ARM::AK_ARMV3, true },
125 { "arm7m", ARM::AK_ARMV3M, true },
126 { "arm8", ARM::AK_ARMV4, false },
127 { "arm810", ARM::AK_ARMV4, false },
128 { "strongarm", ARM::AK_ARMV4, true },
129 { "strongarm110", ARM::AK_ARMV4, false },
130 { "strongarm1100", ARM::AK_ARMV4, false },
131 { "strongarm1110", ARM::AK_ARMV4, false },
132 { "arm7tdmi", ARM::AK_ARMV4T, true },
133 { "arm7tdmi-s", ARM::AK_ARMV4T, false },
134 { "arm710t", ARM::AK_ARMV4T, false },
135 { "arm720t", ARM::AK_ARMV4T, false },
136 { "arm9", ARM::AK_ARMV4T, false },
137 { "arm9tdmi", ARM::AK_ARMV4T, false },
138 { "arm920", ARM::AK_ARMV4T, false },
139 { "arm920t", ARM::AK_ARMV4T, false },
140 { "arm922t", ARM::AK_ARMV4T, false },
141 { "arm9312", ARM::AK_ARMV4T, false },
142 { "arm940t", ARM::AK_ARMV4T, false },
143 { "ep9312", ARM::AK_ARMV4T, false },
144 { "arm10tdmi", ARM::AK_ARMV5T, true },
145 { "arm1020t", ARM::AK_ARMV5T, false },
146 { "arm9e", ARM::AK_ARMV5TE, false },
147 { "arm946e-s", ARM::AK_ARMV5TE, false },
148 { "arm966e-s", ARM::AK_ARMV5TE, false },
149 { "arm968e-s", ARM::AK_ARMV5TE, false },
150 { "arm10e", ARM::AK_ARMV5TE, false },
151 { "arm1020e", ARM::AK_ARMV5TE, false },
152 { "arm1022e", ARM::AK_ARMV5TE, true },
153 { "iwmmxt", ARM::AK_ARMV5TE, false },
154 { "xscale", ARM::AK_ARMV5TE, false },
155 { "arm926ej-s", ARM::AK_ARMV5TEJ, true },
156 { "arm1136jf-s", ARM::AK_ARMV6, true },
157 { "arm1176j-s", ARM::AK_ARMV6K, false },
158 { "arm1176jz-s", ARM::AK_ARMV6K, false },
159 { "mpcore", ARM::AK_ARMV6K, false },
160 { "mpcorenovfp", ARM::AK_ARMV6K, false },
161 { "arm1176jzf-s", ARM::AK_ARMV6K, true },
162 { "arm1176jzf-s", ARM::AK_ARMV6Z, true },
163 { "arm1176jzf-s", ARM::AK_ARMV6ZK, true },
164 { "arm1156t2-s", ARM::AK_ARMV6T2, true },
165 { "arm1156t2f-s", ARM::AK_ARMV6T2, false },
166 { "cortex-m0", ARM::AK_ARMV6M, true },
167 { "cortex-m0plus", ARM::AK_ARMV6M, false },
168 { "cortex-m1", ARM::AK_ARMV6M, false },
169 { "sc000", ARM::AK_ARMV6M, false },
170 { "cortex-a5", ARM::AK_ARMV7A, false },
171 { "cortex-a7", ARM::AK_ARMV7A, false },
172 { "cortex-a8", ARM::AK_ARMV7A, true },
173 { "cortex-a9", ARM::AK_ARMV7A, false },
174 { "cortex-a12", ARM::AK_ARMV7A, false },
175 { "cortex-a15", ARM::AK_ARMV7A, false },
176 { "cortex-a17", ARM::AK_ARMV7A, false },
177 { "krait", ARM::AK_ARMV7A, false },
178 { "cortex-r4", ARM::AK_ARMV7R, true },
179 { "cortex-r4f", ARM::AK_ARMV7R, false },
180 { "cortex-r5", ARM::AK_ARMV7R, false },
181 { "cortex-r7", ARM::AK_ARMV7R, false },
182 { "sc300", ARM::AK_ARMV7M, false },
183 { "cortex-m3", ARM::AK_ARMV7M, true },
184 { "cortex-m4", ARM::AK_ARMV7EM, true },
185 { "cortex-m7", ARM::AK_ARMV7EM, false },
186 { "cortex-a53", ARM::AK_ARMV8A, true },
187 { "cortex-a57", ARM::AK_ARMV8A, false },
188 { "cortex-a72", ARM::AK_ARMV8A, false },
189 { "cyclone", ARM::AK_ARMV8A, false },
190 { "generic", ARM::AK_ARMV8_1A, true },
191 // Non-standard Arch names.
192 { "iwmmxt", ARM::AK_IWMMXT, true },
193 { "xscale", ARM::AK_XSCALE, true },
194 { "arm10tdmi", ARM::AK_ARMV5, true },
195 { "arm1022e", ARM::AK_ARMV5E, true },
196 { "arm1136j-s", ARM::AK_ARMV6J, true },
197 { "arm1136jz-s", ARM::AK_ARMV6J, false },
198 { "cortex-m0", ARM::AK_ARMV6SM, true },
199 { "arm1176jzf-s", ARM::AK_ARMV6HL, true },
200 { "cortex-a8", ARM::AK_ARMV7, true },
201 { "cortex-a8", ARM::AK_ARMV7L, true },
202 { "cortex-a8", ARM::AK_ARMV7HL, true },
203 { "cortex-m4", ARM::AK_ARMV7EM, true },
204 { "swift", ARM::AK_ARMV7S, true },
206 { "invalid", ARM::AK_INVALID, true }
213 // ======================================================= //
215 // ======================================================= //
217 const char *ARMTargetParser::getFPUName(unsigned FPUKind) {
218 if (FPUKind >= ARM::FK_LAST)
220 return FPUNames[FPUKind].Name;
223 const char *ARMTargetParser::getArchName(unsigned ArchKind) {
224 if (ArchKind >= ARM::AK_LAST)
226 return ARCHNames[ArchKind].Name;
229 const char *ARMTargetParser::getCPUAttr(unsigned ArchKind) {
230 if (ArchKind >= ARM::AK_LAST)
232 return ARCHNames[ArchKind].CPUAttr;
235 const char *ARMTargetParser::getSubArch(unsigned ArchKind) {
236 if (ArchKind >= ARM::AK_LAST)
238 return ARCHNames[ArchKind].SubArch;
241 unsigned ARMTargetParser::getArchAttr(unsigned ArchKind) {
242 if (ArchKind >= ARM::AK_LAST)
243 return ARMBuildAttrs::CPUArch::Pre_v4;
244 return ARCHNames[ArchKind].ArchAttr;
247 const char *ARMTargetParser::getArchExtName(unsigned ArchExtKind) {
248 if (ArchExtKind >= ARM::AEK_LAST)
250 return ARCHExtNames[ArchExtKind].Name;
253 const char *ARMTargetParser::getDefaultCPU(StringRef Arch) {
254 unsigned AK = parseArch(Arch);
255 if (AK == ARM::AK_INVALID)
258 // Look for multiple AKs to find the default for pair AK+Name.
259 for (const auto CPU : CPUNames) {
260 if (CPU.ArchID == AK && CPU.Default)
266 // ======================================================= //
268 // ======================================================= //
270 StringRef ARMTargetParser::getFPUSynonym(StringRef FPU) {
271 return StringSwitch<StringRef>(FPU)
272 .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
273 .Case("vfp2", "vfpv2")
274 .Case("vfp3", "vfpv3")
275 .Case("vfp4", "vfpv4")
276 .Case("vfp3-d16", "vfpv3-d16")
277 .Case("vfp4-d16", "vfpv4-d16")
278 // FIXME: sp-16 is NOT the same as d16
279 .Cases("fp4-sp-d16", "fpv4-sp-d16", "vfpv4-d16")
280 .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
281 .Cases("fp5-sp-d16", "fpv5-sp-d16", "fpv5-d16")
282 .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
283 // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
284 .Case("neon-vfpv3", "neon")
288 StringRef ARMTargetParser::getArchSynonym(StringRef Arch) {
289 return StringSwitch<StringRef>(Arch)
290 .Cases("armv6sm", "v6sm", "armv6s-m")
291 .Cases("armv6m", "v6m", "armv6-m")
292 .Cases("armv7a", "v7a", "armv7-a")
293 .Cases("armv7r", "v7r", "armv7-r")
294 .Cases("armv7m", "v7m", "armv7-m")
295 .Cases("armv7em", "v7em", "armv7e-m")
296 .Cases("armv8", "v8", "armv8-a")
297 .Cases("armv8a", "v8a", "armv8-a")
298 .Cases("armv8.1a", "v8.1a", "armv8.1-a")
299 .Cases("aarch64", "arm64", "armv8-a")
303 // MArch is expected to be of the form (arm|thumb)?(eb)?(v.+)?(eb)?, but
304 // (iwmmxt|xscale)(eb)? is also permitted. If the former, return
305 // "v.+", if the latter, return unmodified string, minus 'eb'.
306 // If invalid, return empty string.
307 StringRef ARMTargetParser::getCanonicalArchName(StringRef Arch) {
308 size_t offset = StringRef::npos;
310 StringRef Error = "";
312 // Begins with "arm" / "thumb", move past it.
313 if (A.startswith("arm64"))
315 else if (A.startswith("arm"))
317 else if (A.startswith("thumb"))
319 else if (A.startswith("aarch64")) {
321 // AArch64 uses "_be", not "eb" suffix.
322 if (A.find("eb") != StringRef::npos)
324 if (A.substr(offset,3) == "_be")
328 // Ex. "armebv7", move past the "eb".
329 if (offset != StringRef::npos && A.substr(offset, 2) == "eb")
331 // Or, if it ends with eb ("armv7eb"), chop it off.
332 else if (A.endswith("eb"))
333 A = A.substr(0, A.size() - 2);
335 if (offset != StringRef::npos)
336 A = A.substr(offset);
338 // Empty string means offset reached the end, which means it's valid.
342 // Only match non-marketing names
343 if (offset != StringRef::npos) {
344 // Must start with 'vN'.
345 if (A[0] != 'v' || !std::isdigit(A[1]))
347 // Can't have an extra 'eb'.
348 if (A.find("eb") != StringRef::npos)
352 // Arch will either be a 'v' name (v7a) or a marketing name (xscale).
356 unsigned ARMTargetParser::parseFPU(StringRef FPU) {
357 StringRef Syn = getFPUSynonym(FPU);
358 for (const auto F : FPUNames) {
362 return ARM::FK_INVALID;
365 // Allows partial match, ex. "v7a" matches "armv7a".
366 unsigned ARMTargetParser::parseArch(StringRef Arch) {
367 StringRef Syn = getArchSynonym(Arch);
368 for (const auto A : ARCHNames) {
369 if (StringRef(A.Name).endswith(Syn))
372 return ARM::AK_INVALID;
375 unsigned ARMTargetParser::parseArchExt(StringRef ArchExt) {
376 for (const auto A : ARCHExtNames) {
377 if (ArchExt == A.Name)
380 return ARM::AEK_INVALID;
383 unsigned ARMTargetParser::parseCPUArch(StringRef CPU) {
384 for (const auto C : CPUNames) {
388 return ARM::AK_INVALID;
391 // ARM, Thumb, AArch64
392 unsigned ARMTargetParser::parseArchISA(StringRef Arch) {
393 return StringSwitch<unsigned>(Arch)
394 .StartsWith("aarch64", ARM::IK_AARCH64)
395 .StartsWith("arm64", ARM::IK_AARCH64)
396 .StartsWith("thumb", ARM::IK_THUMB)
397 .StartsWith("arm", ARM::IK_ARM)
398 .Default(ARM::EK_INVALID);
402 unsigned ARMTargetParser::parseArchEndian(StringRef Arch) {
403 if (Arch.startswith("armeb") ||
404 Arch.startswith("thumbeb") ||
405 Arch.startswith("aarch64_be"))
408 if (Arch.startswith("arm") || Arch.startswith("thumb")) {
409 if (Arch.endswith("eb"))
412 return ARM::EK_LITTLE;
415 if (Arch.startswith("aarch64"))
416 return ARM::EK_LITTLE;
418 return ARM::EK_INVALID;
422 unsigned ARMTargetParser::parseArchProfile(StringRef Arch) {
423 Arch = getCanonicalArchName(Arch);
424 switch(parseArch(Arch)) {
427 case ARM::AK_ARMV6SM:
428 case ARM::AK_ARMV7EM:
435 case ARM::AK_ARMV8_1A:
438 return ARM::PK_INVALID;
441 // Version number (ex. v7 = 7).
442 unsigned ARMTargetParser::parseArchVersion(StringRef Arch) {
443 Arch = getCanonicalArchName(Arch);
444 switch(parseArch(Arch)) {
456 case ARM::AK_ARMV5TE:
458 case ARM::AK_IWMMXT2:
461 case ARM::AK_ARMV5TEJ:
466 case ARM::AK_ARMV6T2:
468 case ARM::AK_ARMV6ZK:
470 case ARM::AK_ARMV6SM:
471 case ARM::AK_ARMV6HL:
478 case ARM::AK_ARMV7HL:
480 case ARM::AK_ARMV7EM:
483 case ARM::AK_ARMV8_1A: