1 //===-- SelectionDAG.cpp - Implement the SelectionDAG data structures -----===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This implements the SelectionDAG class.
12 //===----------------------------------------------------------------------===//
14 #include "llvm/CodeGen/SelectionDAG.h"
15 #include "SDNodeDbgValue.h"
16 #include "llvm/ADT/APSInt.h"
17 #include "llvm/ADT/SetVector.h"
18 #include "llvm/ADT/SmallPtrSet.h"
19 #include "llvm/ADT/SmallSet.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Analysis/ValueTracking.h"
23 #include "llvm/CodeGen/MachineBasicBlock.h"
24 #include "llvm/CodeGen/MachineConstantPool.h"
25 #include "llvm/CodeGen/MachineFrameInfo.h"
26 #include "llvm/CodeGen/MachineModuleInfo.h"
27 #include "llvm/IR/CallingConv.h"
28 #include "llvm/IR/Constants.h"
29 #include "llvm/IR/DataLayout.h"
30 #include "llvm/IR/DebugInfo.h"
31 #include "llvm/IR/DerivedTypes.h"
32 #include "llvm/IR/Function.h"
33 #include "llvm/IR/GlobalAlias.h"
34 #include "llvm/IR/GlobalVariable.h"
35 #include "llvm/IR/Intrinsics.h"
36 #include "llvm/Support/CommandLine.h"
37 #include "llvm/Support/Debug.h"
38 #include "llvm/Support/ErrorHandling.h"
39 #include "llvm/Support/ManagedStatic.h"
40 #include "llvm/Support/MathExtras.h"
41 #include "llvm/Support/Mutex.h"
42 #include "llvm/Support/raw_ostream.h"
43 #include "llvm/Target/TargetInstrInfo.h"
44 #include "llvm/Target/TargetIntrinsicInfo.h"
45 #include "llvm/Target/TargetLowering.h"
46 #include "llvm/Target/TargetMachine.h"
47 #include "llvm/Target/TargetOptions.h"
48 #include "llvm/Target/TargetRegisterInfo.h"
49 #include "llvm/Target/TargetSelectionDAGInfo.h"
50 #include "llvm/Target/TargetSubtargetInfo.h"
57 /// makeVTList - Return an instance of the SDVTList struct initialized with the
58 /// specified members.
59 static SDVTList makeVTList(const EVT *VTs, unsigned NumVTs) {
60 SDVTList Res = {VTs, NumVTs};
64 // Default null implementations of the callbacks.
65 void SelectionDAG::DAGUpdateListener::NodeDeleted(SDNode*, SDNode*) {}
66 void SelectionDAG::DAGUpdateListener::NodeUpdated(SDNode*) {}
68 //===----------------------------------------------------------------------===//
69 // ConstantFPSDNode Class
70 //===----------------------------------------------------------------------===//
72 /// isExactlyValue - We don't rely on operator== working on double values, as
73 /// it returns true for things that are clearly not equal, like -0.0 and 0.0.
74 /// As such, this method can be used to do an exact bit-for-bit comparison of
75 /// two floating point values.
76 bool ConstantFPSDNode::isExactlyValue(const APFloat& V) const {
77 return getValueAPF().bitwiseIsEqual(V);
80 bool ConstantFPSDNode::isValueValidForType(EVT VT,
82 assert(VT.isFloatingPoint() && "Can only convert between FP types");
84 // convert modifies in place, so make a copy.
85 APFloat Val2 = APFloat(Val);
87 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
88 APFloat::rmNearestTiesToEven,
93 //===----------------------------------------------------------------------===//
95 //===----------------------------------------------------------------------===//
97 /// isBuildVectorAllOnes - Return true if the specified node is a
98 /// BUILD_VECTOR where all of the elements are ~0 or undef.
99 bool ISD::isBuildVectorAllOnes(const SDNode *N) {
100 // Look through a bit convert.
101 while (N->getOpcode() == ISD::BITCAST)
102 N = N->getOperand(0).getNode();
104 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
106 unsigned i = 0, e = N->getNumOperands();
108 // Skip over all of the undef values.
109 while (i != e && N->getOperand(i).getOpcode() == ISD::UNDEF)
112 // Do not accept an all-undef vector.
113 if (i == e) return false;
115 // Do not accept build_vectors that aren't all constants or which have non-~0
116 // elements. We have to be a bit careful here, as the type of the constant
117 // may not be the same as the type of the vector elements due to type
118 // legalization (the elements are promoted to a legal type for the target and
119 // a vector of a type may be legal when the base element type is not).
120 // We only want to check enough bits to cover the vector elements, because
121 // we care if the resultant vector is all ones, not whether the individual
123 SDValue NotZero = N->getOperand(i);
124 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
125 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(NotZero)) {
126 if (CN->getAPIntValue().countTrailingOnes() < EltSize)
128 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(NotZero)) {
129 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingOnes() < EltSize)
134 // Okay, we have at least one ~0 value, check to see if the rest match or are
135 // undefs. Even with the above element type twiddling, this should be OK, as
136 // the same type legalization should have applied to all the elements.
137 for (++i; i != e; ++i)
138 if (N->getOperand(i) != NotZero &&
139 N->getOperand(i).getOpcode() != ISD::UNDEF)
145 /// isBuildVectorAllZeros - Return true if the specified node is a
146 /// BUILD_VECTOR where all of the elements are 0 or undef.
147 bool ISD::isBuildVectorAllZeros(const SDNode *N) {
148 // Look through a bit convert.
149 while (N->getOpcode() == ISD::BITCAST)
150 N = N->getOperand(0).getNode();
152 if (N->getOpcode() != ISD::BUILD_VECTOR) return false;
154 bool IsAllUndef = true;
155 for (const SDValue &Op : N->op_values()) {
156 if (Op.getOpcode() == ISD::UNDEF)
159 // Do not accept build_vectors that aren't all constants or which have non-0
160 // elements. We have to be a bit careful here, as the type of the constant
161 // may not be the same as the type of the vector elements due to type
162 // legalization (the elements are promoted to a legal type for the target
163 // and a vector of a type may be legal when the base element type is not).
164 // We only want to check enough bits to cover the vector elements, because
165 // we care if the resultant vector is all zeros, not whether the individual
167 unsigned EltSize = N->getValueType(0).getVectorElementType().getSizeInBits();
168 if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(Op)) {
169 if (CN->getAPIntValue().countTrailingZeros() < EltSize)
171 } else if (ConstantFPSDNode *CFPN = dyn_cast<ConstantFPSDNode>(Op)) {
172 if (CFPN->getValueAPF().bitcastToAPInt().countTrailingZeros() < EltSize)
178 // Do not accept an all-undef vector.
184 /// \brief Return true if the specified node is a BUILD_VECTOR node of
185 /// all ConstantSDNode or undef.
186 bool ISD::isBuildVectorOfConstantSDNodes(const SDNode *N) {
187 if (N->getOpcode() != ISD::BUILD_VECTOR)
190 for (const SDValue &Op : N->op_values()) {
191 if (Op.getOpcode() == ISD::UNDEF)
193 if (!isa<ConstantSDNode>(Op))
199 /// \brief Return true if the specified node is a BUILD_VECTOR node of
200 /// all ConstantFPSDNode or undef.
201 bool ISD::isBuildVectorOfConstantFPSDNodes(const SDNode *N) {
202 if (N->getOpcode() != ISD::BUILD_VECTOR)
205 for (const SDValue &Op : N->op_values()) {
206 if (Op.getOpcode() == ISD::UNDEF)
208 if (!isa<ConstantFPSDNode>(Op))
214 /// allOperandsUndef - Return true if the node has at least one operand
215 /// and all operands of the specified node are ISD::UNDEF.
216 bool ISD::allOperandsUndef(const SDNode *N) {
217 // Return false if the node has no operands.
218 // This is "logically inconsistent" with the definition of "all" but
219 // is probably the desired behavior.
220 if (N->getNumOperands() == 0)
223 for (const SDValue &Op : N->op_values())
224 if (Op.getOpcode() != ISD::UNDEF)
230 ISD::NodeType ISD::getExtForLoadExtType(bool IsFP, ISD::LoadExtType ExtType) {
233 return IsFP ? ISD::FP_EXTEND : ISD::ANY_EXTEND;
235 return ISD::SIGN_EXTEND;
237 return ISD::ZERO_EXTEND;
242 llvm_unreachable("Invalid LoadExtType");
245 /// getSetCCSwappedOperands - Return the operation corresponding to (Y op X)
246 /// when given the operation for (X op Y).
247 ISD::CondCode ISD::getSetCCSwappedOperands(ISD::CondCode Operation) {
248 // To perform this operation, we just need to swap the L and G bits of the
250 unsigned OldL = (Operation >> 2) & 1;
251 unsigned OldG = (Operation >> 1) & 1;
252 return ISD::CondCode((Operation & ~6) | // Keep the N, U, E bits
253 (OldL << 1) | // New G bit
254 (OldG << 2)); // New L bit.
257 /// getSetCCInverse - Return the operation corresponding to !(X op Y), where
258 /// 'op' is a valid SetCC operation.
259 ISD::CondCode ISD::getSetCCInverse(ISD::CondCode Op, bool isInteger) {
260 unsigned Operation = Op;
262 Operation ^= 7; // Flip L, G, E bits, but not U.
264 Operation ^= 15; // Flip all of the condition bits.
266 if (Operation > ISD::SETTRUE2)
267 Operation &= ~8; // Don't let N and U bits get set.
269 return ISD::CondCode(Operation);
273 /// isSignedOp - For an integer comparison, return 1 if the comparison is a
274 /// signed operation and 2 if the result is an unsigned comparison. Return zero
275 /// if the operation does not depend on the sign of the input (setne and seteq).
276 static int isSignedOp(ISD::CondCode Opcode) {
278 default: llvm_unreachable("Illegal integer setcc operation!");
280 case ISD::SETNE: return 0;
284 case ISD::SETGE: return 1;
288 case ISD::SETUGE: return 2;
292 /// getSetCCOrOperation - Return the result of a logical OR between different
293 /// comparisons of identical values: ((X op1 Y) | (X op2 Y)). This function
294 /// returns SETCC_INVALID if it is not possible to represent the resultant
296 ISD::CondCode ISD::getSetCCOrOperation(ISD::CondCode Op1, ISD::CondCode Op2,
298 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
299 // Cannot fold a signed integer setcc with an unsigned integer setcc.
300 return ISD::SETCC_INVALID;
302 unsigned Op = Op1 | Op2; // Combine all of the condition bits.
304 // If the N and U bits get set then the resultant comparison DOES suddenly
305 // care about orderedness, and is true when ordered.
306 if (Op > ISD::SETTRUE2)
307 Op &= ~16; // Clear the U bit if the N bit is set.
309 // Canonicalize illegal integer setcc's.
310 if (isInteger && Op == ISD::SETUNE) // e.g. SETUGT | SETULT
313 return ISD::CondCode(Op);
316 /// getSetCCAndOperation - Return the result of a logical AND between different
317 /// comparisons of identical values: ((X op1 Y) & (X op2 Y)). This
318 /// function returns zero if it is not possible to represent the resultant
320 ISD::CondCode ISD::getSetCCAndOperation(ISD::CondCode Op1, ISD::CondCode Op2,
322 if (isInteger && (isSignedOp(Op1) | isSignedOp(Op2)) == 3)
323 // Cannot fold a signed setcc with an unsigned setcc.
324 return ISD::SETCC_INVALID;
326 // Combine all of the condition bits.
327 ISD::CondCode Result = ISD::CondCode(Op1 & Op2);
329 // Canonicalize illegal integer setcc's.
333 case ISD::SETUO : Result = ISD::SETFALSE; break; // SETUGT & SETULT
334 case ISD::SETOEQ: // SETEQ & SETU[LG]E
335 case ISD::SETUEQ: Result = ISD::SETEQ ; break; // SETUGE & SETULE
336 case ISD::SETOLT: Result = ISD::SETULT ; break; // SETULT & SETNE
337 case ISD::SETOGT: Result = ISD::SETUGT ; break; // SETUGT & SETNE
344 //===----------------------------------------------------------------------===//
345 // SDNode Profile Support
346 //===----------------------------------------------------------------------===//
348 /// AddNodeIDOpcode - Add the node opcode to the NodeID data.
350 static void AddNodeIDOpcode(FoldingSetNodeID &ID, unsigned OpC) {
354 /// AddNodeIDValueTypes - Value type lists are intern'd so we can represent them
355 /// solely with their pointer.
356 static void AddNodeIDValueTypes(FoldingSetNodeID &ID, SDVTList VTList) {
357 ID.AddPointer(VTList.VTs);
360 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
362 static void AddNodeIDOperands(FoldingSetNodeID &ID,
363 ArrayRef<SDValue> Ops) {
364 for (auto& Op : Ops) {
365 ID.AddPointer(Op.getNode());
366 ID.AddInteger(Op.getResNo());
370 /// AddNodeIDOperands - Various routines for adding operands to the NodeID data.
372 static void AddNodeIDOperands(FoldingSetNodeID &ID,
373 ArrayRef<SDUse> Ops) {
374 for (auto& Op : Ops) {
375 ID.AddPointer(Op.getNode());
376 ID.AddInteger(Op.getResNo());
380 /// Add logical or fast math flag values to FoldingSetNodeID value.
381 static void AddNodeIDFlags(FoldingSetNodeID &ID, unsigned Opcode,
382 const SDNodeFlags *Flags) {
383 if (!isBinOpWithFlags(Opcode))
386 unsigned RawFlags = 0;
388 RawFlags = Flags->getRawFlags();
389 ID.AddInteger(RawFlags);
392 static void AddNodeIDFlags(FoldingSetNodeID &ID, const SDNode *N) {
393 AddNodeIDFlags(ID, N->getOpcode(), N->getFlags());
396 static void AddNodeIDNode(FoldingSetNodeID &ID, unsigned short OpC,
397 SDVTList VTList, ArrayRef<SDValue> OpList) {
398 AddNodeIDOpcode(ID, OpC);
399 AddNodeIDValueTypes(ID, VTList);
400 AddNodeIDOperands(ID, OpList);
403 /// If this is an SDNode with special info, add this info to the NodeID data.
404 static void AddNodeIDCustom(FoldingSetNodeID &ID, const SDNode *N) {
405 switch (N->getOpcode()) {
406 case ISD::TargetExternalSymbol:
407 case ISD::ExternalSymbol:
409 llvm_unreachable("Should only be used on nodes with operands");
410 default: break; // Normal nodes don't need extra info.
411 case ISD::TargetConstant:
412 case ISD::Constant: {
413 const ConstantSDNode *C = cast<ConstantSDNode>(N);
414 ID.AddPointer(C->getConstantIntValue());
415 ID.AddBoolean(C->isOpaque());
418 case ISD::TargetConstantFP:
419 case ISD::ConstantFP: {
420 ID.AddPointer(cast<ConstantFPSDNode>(N)->getConstantFPValue());
423 case ISD::TargetGlobalAddress:
424 case ISD::GlobalAddress:
425 case ISD::TargetGlobalTLSAddress:
426 case ISD::GlobalTLSAddress: {
427 const GlobalAddressSDNode *GA = cast<GlobalAddressSDNode>(N);
428 ID.AddPointer(GA->getGlobal());
429 ID.AddInteger(GA->getOffset());
430 ID.AddInteger(GA->getTargetFlags());
431 ID.AddInteger(GA->getAddressSpace());
434 case ISD::BasicBlock:
435 ID.AddPointer(cast<BasicBlockSDNode>(N)->getBasicBlock());
438 ID.AddInteger(cast<RegisterSDNode>(N)->getReg());
440 case ISD::RegisterMask:
441 ID.AddPointer(cast<RegisterMaskSDNode>(N)->getRegMask());
444 ID.AddPointer(cast<SrcValueSDNode>(N)->getValue());
446 case ISD::FrameIndex:
447 case ISD::TargetFrameIndex:
448 ID.AddInteger(cast<FrameIndexSDNode>(N)->getIndex());
451 case ISD::TargetJumpTable:
452 ID.AddInteger(cast<JumpTableSDNode>(N)->getIndex());
453 ID.AddInteger(cast<JumpTableSDNode>(N)->getTargetFlags());
455 case ISD::ConstantPool:
456 case ISD::TargetConstantPool: {
457 const ConstantPoolSDNode *CP = cast<ConstantPoolSDNode>(N);
458 ID.AddInteger(CP->getAlignment());
459 ID.AddInteger(CP->getOffset());
460 if (CP->isMachineConstantPoolEntry())
461 CP->getMachineCPVal()->addSelectionDAGCSEId(ID);
463 ID.AddPointer(CP->getConstVal());
464 ID.AddInteger(CP->getTargetFlags());
467 case ISD::TargetIndex: {
468 const TargetIndexSDNode *TI = cast<TargetIndexSDNode>(N);
469 ID.AddInteger(TI->getIndex());
470 ID.AddInteger(TI->getOffset());
471 ID.AddInteger(TI->getTargetFlags());
475 const LoadSDNode *LD = cast<LoadSDNode>(N);
476 ID.AddInteger(LD->getMemoryVT().getRawBits());
477 ID.AddInteger(LD->getRawSubclassData());
478 ID.AddInteger(LD->getPointerInfo().getAddrSpace());
482 const StoreSDNode *ST = cast<StoreSDNode>(N);
483 ID.AddInteger(ST->getMemoryVT().getRawBits());
484 ID.AddInteger(ST->getRawSubclassData());
485 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
488 case ISD::ATOMIC_CMP_SWAP:
489 case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
490 case ISD::ATOMIC_SWAP:
491 case ISD::ATOMIC_LOAD_ADD:
492 case ISD::ATOMIC_LOAD_SUB:
493 case ISD::ATOMIC_LOAD_AND:
494 case ISD::ATOMIC_LOAD_OR:
495 case ISD::ATOMIC_LOAD_XOR:
496 case ISD::ATOMIC_LOAD_NAND:
497 case ISD::ATOMIC_LOAD_MIN:
498 case ISD::ATOMIC_LOAD_MAX:
499 case ISD::ATOMIC_LOAD_UMIN:
500 case ISD::ATOMIC_LOAD_UMAX:
501 case ISD::ATOMIC_LOAD:
502 case ISD::ATOMIC_STORE: {
503 const AtomicSDNode *AT = cast<AtomicSDNode>(N);
504 ID.AddInteger(AT->getMemoryVT().getRawBits());
505 ID.AddInteger(AT->getRawSubclassData());
506 ID.AddInteger(AT->getPointerInfo().getAddrSpace());
509 case ISD::PREFETCH: {
510 const MemSDNode *PF = cast<MemSDNode>(N);
511 ID.AddInteger(PF->getPointerInfo().getAddrSpace());
514 case ISD::VECTOR_SHUFFLE: {
515 const ShuffleVectorSDNode *SVN = cast<ShuffleVectorSDNode>(N);
516 for (unsigned i = 0, e = N->getValueType(0).getVectorNumElements();
518 ID.AddInteger(SVN->getMaskElt(i));
521 case ISD::TargetBlockAddress:
522 case ISD::BlockAddress: {
523 const BlockAddressSDNode *BA = cast<BlockAddressSDNode>(N);
524 ID.AddPointer(BA->getBlockAddress());
525 ID.AddInteger(BA->getOffset());
526 ID.AddInteger(BA->getTargetFlags());
529 } // end switch (N->getOpcode())
531 AddNodeIDFlags(ID, N);
533 // Target specific memory nodes could also have address spaces to check.
534 if (N->isTargetMemoryOpcode())
535 ID.AddInteger(cast<MemSDNode>(N)->getPointerInfo().getAddrSpace());
538 /// AddNodeIDNode - Generic routine for adding a nodes info to the NodeID
540 static void AddNodeIDNode(FoldingSetNodeID &ID, const SDNode *N) {
541 AddNodeIDOpcode(ID, N->getOpcode());
542 // Add the return value info.
543 AddNodeIDValueTypes(ID, N->getVTList());
544 // Add the operand info.
545 AddNodeIDOperands(ID, N->ops());
547 // Handle SDNode leafs with special info.
548 AddNodeIDCustom(ID, N);
551 /// encodeMemSDNodeFlags - Generic routine for computing a value for use in
552 /// the CSE map that carries volatility, temporalness, indexing mode, and
553 /// extension/truncation information.
555 static inline unsigned
556 encodeMemSDNodeFlags(int ConvType, ISD::MemIndexedMode AM, bool isVolatile,
557 bool isNonTemporal, bool isInvariant) {
558 assert((ConvType & 3) == ConvType &&
559 "ConvType may not require more than 2 bits!");
560 assert((AM & 7) == AM &&
561 "AM may not require more than 3 bits!");
565 (isNonTemporal << 6) |
569 //===----------------------------------------------------------------------===//
570 // SelectionDAG Class
571 //===----------------------------------------------------------------------===//
573 /// doNotCSE - Return true if CSE should not be performed for this node.
574 static bool doNotCSE(SDNode *N) {
575 if (N->getValueType(0) == MVT::Glue)
576 return true; // Never CSE anything that produces a flag.
578 switch (N->getOpcode()) {
580 case ISD::HANDLENODE:
582 return true; // Never CSE these nodes.
585 // Check that remaining values produced are not flags.
586 for (unsigned i = 1, e = N->getNumValues(); i != e; ++i)
587 if (N->getValueType(i) == MVT::Glue)
588 return true; // Never CSE anything that produces a flag.
593 /// RemoveDeadNodes - This method deletes all unreachable nodes in the
595 void SelectionDAG::RemoveDeadNodes() {
596 // Create a dummy node (which is not added to allnodes), that adds a reference
597 // to the root node, preventing it from being deleted.
598 HandleSDNode Dummy(getRoot());
600 SmallVector<SDNode*, 128> DeadNodes;
602 // Add all obviously-dead nodes to the DeadNodes worklist.
603 for (SDNode &Node : allnodes())
604 if (Node.use_empty())
605 DeadNodes.push_back(&Node);
607 RemoveDeadNodes(DeadNodes);
609 // If the root changed (e.g. it was a dead load, update the root).
610 setRoot(Dummy.getValue());
613 /// RemoveDeadNodes - This method deletes the unreachable nodes in the
614 /// given list, and any nodes that become unreachable as a result.
615 void SelectionDAG::RemoveDeadNodes(SmallVectorImpl<SDNode *> &DeadNodes) {
617 // Process the worklist, deleting the nodes and adding their uses to the
619 while (!DeadNodes.empty()) {
620 SDNode *N = DeadNodes.pop_back_val();
622 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
623 DUL->NodeDeleted(N, nullptr);
625 // Take the node out of the appropriate CSE map.
626 RemoveNodeFromCSEMaps(N);
628 // Next, brutally remove the operand list. This is safe to do, as there are
629 // no cycles in the graph.
630 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
632 SDNode *Operand = Use.getNode();
635 // Now that we removed this operand, see if there are no uses of it left.
636 if (Operand->use_empty())
637 DeadNodes.push_back(Operand);
644 void SelectionDAG::RemoveDeadNode(SDNode *N){
645 SmallVector<SDNode*, 16> DeadNodes(1, N);
647 // Create a dummy node that adds a reference to the root node, preventing
648 // it from being deleted. (This matters if the root is an operand of the
650 HandleSDNode Dummy(getRoot());
652 RemoveDeadNodes(DeadNodes);
655 void SelectionDAG::DeleteNode(SDNode *N) {
656 // First take this out of the appropriate CSE map.
657 RemoveNodeFromCSEMaps(N);
659 // Finally, remove uses due to operands of this node, remove from the
660 // AllNodes list, and delete the node.
661 DeleteNodeNotInCSEMaps(N);
664 void SelectionDAG::DeleteNodeNotInCSEMaps(SDNode *N) {
665 assert(N != AllNodes.begin() && "Cannot delete the entry node!");
666 assert(N->use_empty() && "Cannot delete a node that is not dead!");
668 // Drop all of the operands and decrement used node's use counts.
674 void SDDbgInfo::erase(const SDNode *Node) {
675 DbgValMapType::iterator I = DbgValMap.find(Node);
676 if (I == DbgValMap.end())
678 for (auto &Val: I->second)
679 Val->setIsInvalidated();
683 void SelectionDAG::DeallocateNode(SDNode *N) {
684 if (N->OperandsNeedDelete)
685 delete[] N->OperandList;
687 // Set the opcode to DELETED_NODE to help catch bugs when node
688 // memory is reallocated.
689 N->NodeType = ISD::DELETED_NODE;
691 NodeAllocator.Deallocate(AllNodes.remove(N));
693 // If any of the SDDbgValue nodes refer to this SDNode, invalidate
694 // them and forget about that node.
699 /// VerifySDNode - Sanity check the given SDNode. Aborts if it is invalid.
700 static void VerifySDNode(SDNode *N) {
701 switch (N->getOpcode()) {
704 case ISD::BUILD_PAIR: {
705 EVT VT = N->getValueType(0);
706 assert(N->getNumValues() == 1 && "Too many results!");
707 assert(!VT.isVector() && (VT.isInteger() || VT.isFloatingPoint()) &&
708 "Wrong return type!");
709 assert(N->getNumOperands() == 2 && "Wrong number of operands!");
710 assert(N->getOperand(0).getValueType() == N->getOperand(1).getValueType() &&
711 "Mismatched operand types!");
712 assert(N->getOperand(0).getValueType().isInteger() == VT.isInteger() &&
713 "Wrong operand type!");
714 assert(VT.getSizeInBits() == 2 * N->getOperand(0).getValueSizeInBits() &&
715 "Wrong return type size");
718 case ISD::BUILD_VECTOR: {
719 assert(N->getNumValues() == 1 && "Too many results!");
720 assert(N->getValueType(0).isVector() && "Wrong return type!");
721 assert(N->getNumOperands() == N->getValueType(0).getVectorNumElements() &&
722 "Wrong number of operands!");
723 EVT EltVT = N->getValueType(0).getVectorElementType();
724 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ++I) {
725 assert((I->getValueType() == EltVT ||
726 (EltVT.isInteger() && I->getValueType().isInteger() &&
727 EltVT.bitsLE(I->getValueType()))) &&
728 "Wrong operand type!");
729 assert(I->getValueType() == N->getOperand(0).getValueType() &&
730 "Operands must all have the same type");
738 /// \brief Insert a newly allocated node into the DAG.
740 /// Handles insertion into the all nodes list and CSE map, as well as
741 /// verification and other common operations when a new node is allocated.
742 void SelectionDAG::InsertNode(SDNode *N) {
743 AllNodes.push_back(N);
745 N->PersistentId = NextPersistentId++;
750 /// RemoveNodeFromCSEMaps - Take the specified node out of the CSE map that
751 /// correspond to it. This is useful when we're about to delete or repurpose
752 /// the node. We don't want future request for structurally identical nodes
753 /// to return N anymore.
754 bool SelectionDAG::RemoveNodeFromCSEMaps(SDNode *N) {
756 switch (N->getOpcode()) {
757 case ISD::HANDLENODE: return false; // noop.
759 assert(CondCodeNodes[cast<CondCodeSDNode>(N)->get()] &&
760 "Cond code doesn't exist!");
761 Erased = CondCodeNodes[cast<CondCodeSDNode>(N)->get()] != nullptr;
762 CondCodeNodes[cast<CondCodeSDNode>(N)->get()] = nullptr;
764 case ISD::ExternalSymbol:
765 Erased = ExternalSymbols.erase(cast<ExternalSymbolSDNode>(N)->getSymbol());
767 case ISD::TargetExternalSymbol: {
768 ExternalSymbolSDNode *ESN = cast<ExternalSymbolSDNode>(N);
769 Erased = TargetExternalSymbols.erase(
770 std::pair<std::string,unsigned char>(ESN->getSymbol(),
771 ESN->getTargetFlags()));
774 case ISD::MCSymbol: {
775 auto *MCSN = cast<MCSymbolSDNode>(N);
776 Erased = MCSymbols.erase(MCSN->getMCSymbol());
779 case ISD::VALUETYPE: {
780 EVT VT = cast<VTSDNode>(N)->getVT();
781 if (VT.isExtended()) {
782 Erased = ExtendedValueTypeNodes.erase(VT);
784 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != nullptr;
785 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = nullptr;
790 // Remove it from the CSE Map.
791 assert(N->getOpcode() != ISD::DELETED_NODE && "DELETED_NODE in CSEMap!");
792 assert(N->getOpcode() != ISD::EntryToken && "EntryToken in CSEMap!");
793 Erased = CSEMap.RemoveNode(N);
797 // Verify that the node was actually in one of the CSE maps, unless it has a
798 // flag result (which cannot be CSE'd) or is one of the special cases that are
799 // not subject to CSE.
800 if (!Erased && N->getValueType(N->getNumValues()-1) != MVT::Glue &&
801 !N->isMachineOpcode() && !doNotCSE(N)) {
804 llvm_unreachable("Node is not in map!");
810 /// AddModifiedNodeToCSEMaps - The specified node has been removed from the CSE
811 /// maps and modified in place. Add it back to the CSE maps, unless an identical
812 /// node already exists, in which case transfer all its users to the existing
813 /// node. This transfer can potentially trigger recursive merging.
816 SelectionDAG::AddModifiedNodeToCSEMaps(SDNode *N) {
817 // For node types that aren't CSE'd, just act as if no identical node
820 SDNode *Existing = CSEMap.GetOrInsertNode(N);
822 // If there was already an existing matching node, use ReplaceAllUsesWith
823 // to replace the dead one with the existing one. This can cause
824 // recursive merging of other unrelated nodes down the line.
825 ReplaceAllUsesWith(N, Existing);
827 // N is now dead. Inform the listeners and delete it.
828 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
829 DUL->NodeDeleted(N, Existing);
830 DeleteNodeNotInCSEMaps(N);
835 // If the node doesn't already exist, we updated it. Inform listeners.
836 for (DAGUpdateListener *DUL = UpdateListeners; DUL; DUL = DUL->Next)
840 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
841 /// were replaced with those specified. If this node is never memoized,
842 /// return null, otherwise return a pointer to the slot it would take. If a
843 /// node already exists with these operands, the slot will be non-null.
844 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, SDValue Op,
849 SDValue Ops[] = { Op };
851 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
852 AddNodeIDCustom(ID, N);
853 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
857 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
858 /// were replaced with those specified. If this node is never memoized,
859 /// return null, otherwise return a pointer to the slot it would take. If a
860 /// node already exists with these operands, the slot will be non-null.
861 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N,
862 SDValue Op1, SDValue Op2,
867 SDValue Ops[] = { Op1, Op2 };
869 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
870 AddNodeIDCustom(ID, N);
871 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
876 /// FindModifiedNodeSlot - Find a slot for the specified node if its operands
877 /// were replaced with those specified. If this node is never memoized,
878 /// return null, otherwise return a pointer to the slot it would take. If a
879 /// node already exists with these operands, the slot will be non-null.
880 SDNode *SelectionDAG::FindModifiedNodeSlot(SDNode *N, ArrayRef<SDValue> Ops,
886 AddNodeIDNode(ID, N->getOpcode(), N->getVTList(), Ops);
887 AddNodeIDCustom(ID, N);
888 SDNode *Node = FindNodeOrInsertPos(ID, N->getDebugLoc(), InsertPos);
892 /// getEVTAlignment - Compute the default alignment value for the
895 unsigned SelectionDAG::getEVTAlignment(EVT VT) const {
896 Type *Ty = VT == MVT::iPTR ?
897 PointerType::get(Type::getInt8Ty(*getContext()), 0) :
898 VT.getTypeForEVT(*getContext());
900 return getDataLayout().getABITypeAlignment(Ty);
903 // EntryNode could meaningfully have debug info if we can find it...
904 SelectionDAG::SelectionDAG(const TargetMachine &tm, CodeGenOpt::Level OL)
905 : TM(tm), TSI(nullptr), TLI(nullptr), OptLevel(OL),
906 EntryNode(ISD::EntryToken, 0, DebugLoc(), getVTList(MVT::Other)),
907 Root(getEntryNode()), NewNodesMustHaveLegalTypes(false),
908 UpdateListeners(nullptr) {
909 InsertNode(&EntryNode);
910 DbgInfo = new SDDbgInfo();
913 void SelectionDAG::init(MachineFunction &mf) {
915 TLI = getSubtarget().getTargetLowering();
916 TSI = getSubtarget().getSelectionDAGInfo();
917 Context = &mf.getFunction()->getContext();
920 SelectionDAG::~SelectionDAG() {
921 assert(!UpdateListeners && "Dangling registered DAGUpdateListeners");
926 void SelectionDAG::allnodes_clear() {
927 assert(&*AllNodes.begin() == &EntryNode);
928 AllNodes.remove(AllNodes.begin());
929 while (!AllNodes.empty())
930 DeallocateNode(&AllNodes.front());
932 NextPersistentId = 0;
936 BinarySDNode *SelectionDAG::GetBinarySDNode(unsigned Opcode, SDLoc DL,
937 SDVTList VTs, SDValue N1,
939 const SDNodeFlags *Flags) {
940 if (isBinOpWithFlags(Opcode)) {
941 // If no flags were passed in, use a default flags object.
943 if (Flags == nullptr)
946 BinaryWithFlagsSDNode *FN = new (NodeAllocator) BinaryWithFlagsSDNode(
947 Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2, *Flags);
952 BinarySDNode *N = new (NodeAllocator)
953 BinarySDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(), VTs, N1, N2);
957 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
959 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
961 switch (N->getOpcode()) {
964 case ISD::ConstantFP:
965 llvm_unreachable("Querying for Constant and ConstantFP nodes requires "
966 "debug location. Use another overload.");
972 SDNode *SelectionDAG::FindNodeOrInsertPos(const FoldingSetNodeID &ID,
973 DebugLoc DL, void *&InsertPos) {
974 SDNode *N = CSEMap.FindNodeOrInsertPos(ID, InsertPos);
976 switch (N->getOpcode()) {
977 default: break; // Process only regular (non-target) constant nodes.
979 case ISD::ConstantFP:
980 // Erase debug location from the node if the node is used at several
981 // different places to do not propagate one location to all uses as it
982 // leads to incorrect debug info.
983 if (N->getDebugLoc() != DL)
984 N->setDebugLoc(DebugLoc());
991 void SelectionDAG::clear() {
993 OperandAllocator.Reset();
996 ExtendedValueTypeNodes.clear();
997 ExternalSymbols.clear();
998 TargetExternalSymbols.clear();
1000 std::fill(CondCodeNodes.begin(), CondCodeNodes.end(),
1001 static_cast<CondCodeSDNode*>(nullptr));
1002 std::fill(ValueTypeNodes.begin(), ValueTypeNodes.end(),
1003 static_cast<SDNode*>(nullptr));
1005 EntryNode.UseList = nullptr;
1006 InsertNode(&EntryNode);
1007 Root = getEntryNode();
1011 SDValue SelectionDAG::getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1012 return VT.bitsGT(Op.getValueType()) ?
1013 getNode(ISD::ANY_EXTEND, DL, VT, Op) :
1014 getNode(ISD::TRUNCATE, DL, VT, Op);
1017 SDValue SelectionDAG::getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1018 return VT.bitsGT(Op.getValueType()) ?
1019 getNode(ISD::SIGN_EXTEND, DL, VT, Op) :
1020 getNode(ISD::TRUNCATE, DL, VT, Op);
1023 SDValue SelectionDAG::getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) {
1024 return VT.bitsGT(Op.getValueType()) ?
1025 getNode(ISD::ZERO_EXTEND, DL, VT, Op) :
1026 getNode(ISD::TRUNCATE, DL, VT, Op);
1029 SDValue SelectionDAG::getBoolExtOrTrunc(SDValue Op, SDLoc SL, EVT VT,
1031 if (VT.bitsLE(Op.getValueType()))
1032 return getNode(ISD::TRUNCATE, SL, VT, Op);
1034 TargetLowering::BooleanContent BType = TLI->getBooleanContents(OpVT);
1035 return getNode(TLI->getExtendForContent(BType), SL, VT, Op);
1038 SDValue SelectionDAG::getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) {
1039 assert(!VT.isVector() &&
1040 "getZeroExtendInReg should use the vector element type instead of "
1041 "the vector type!");
1042 if (Op.getValueType() == VT) return Op;
1043 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
1044 APInt Imm = APInt::getLowBitsSet(BitWidth,
1045 VT.getSizeInBits());
1046 return getNode(ISD::AND, DL, Op.getValueType(), Op,
1047 getConstant(Imm, DL, Op.getValueType()));
1050 SDValue SelectionDAG::getAnyExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1051 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1052 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1053 "The sizes of the input and result must match in order to perform the "
1054 "extend in-register.");
1055 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1056 "The destination vector type must have fewer lanes than the input.");
1057 return getNode(ISD::ANY_EXTEND_VECTOR_INREG, DL, VT, Op);
1060 SDValue SelectionDAG::getSignExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1061 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1062 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1063 "The sizes of the input and result must match in order to perform the "
1064 "extend in-register.");
1065 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1066 "The destination vector type must have fewer lanes than the input.");
1067 return getNode(ISD::SIGN_EXTEND_VECTOR_INREG, DL, VT, Op);
1070 SDValue SelectionDAG::getZeroExtendVectorInReg(SDValue Op, SDLoc DL, EVT VT) {
1071 assert(VT.isVector() && "This DAG node is restricted to vector types.");
1072 assert(VT.getSizeInBits() == Op.getValueType().getSizeInBits() &&
1073 "The sizes of the input and result must match in order to perform the "
1074 "extend in-register.");
1075 assert(VT.getVectorNumElements() < Op.getValueType().getVectorNumElements() &&
1076 "The destination vector type must have fewer lanes than the input.");
1077 return getNode(ISD::ZERO_EXTEND_VECTOR_INREG, DL, VT, Op);
1080 /// getNOT - Create a bitwise NOT operation as (XOR Val, -1).
1082 SDValue SelectionDAG::getNOT(SDLoc DL, SDValue Val, EVT VT) {
1083 EVT EltVT = VT.getScalarType();
1085 getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL, VT);
1086 return getNode(ISD::XOR, DL, VT, Val, NegOne);
1089 SDValue SelectionDAG::getLogicalNOT(SDLoc DL, SDValue Val, EVT VT) {
1090 EVT EltVT = VT.getScalarType();
1092 switch (TLI->getBooleanContents(VT)) {
1093 case TargetLowering::ZeroOrOneBooleanContent:
1094 case TargetLowering::UndefinedBooleanContent:
1095 TrueValue = getConstant(1, DL, VT);
1097 case TargetLowering::ZeroOrNegativeOneBooleanContent:
1098 TrueValue = getConstant(APInt::getAllOnesValue(EltVT.getSizeInBits()), DL,
1102 return getNode(ISD::XOR, DL, VT, Val, TrueValue);
1105 SDValue SelectionDAG::getConstant(uint64_t Val, SDLoc DL, EVT VT, bool isT,
1107 EVT EltVT = VT.getScalarType();
1108 assert((EltVT.getSizeInBits() >= 64 ||
1109 (uint64_t)((int64_t)Val >> EltVT.getSizeInBits()) + 1 < 2) &&
1110 "getConstant with a uint64_t value that doesn't fit in the type!");
1111 return getConstant(APInt(EltVT.getSizeInBits(), Val), DL, VT, isT, isO);
1114 SDValue SelectionDAG::getConstant(const APInt &Val, SDLoc DL, EVT VT, bool isT,
1117 return getConstant(*ConstantInt::get(*Context, Val), DL, VT, isT, isO);
1120 SDValue SelectionDAG::getConstant(const ConstantInt &Val, SDLoc DL, EVT VT,
1121 bool isT, bool isO) {
1122 assert(VT.isInteger() && "Cannot create FP integer constant!");
1124 EVT EltVT = VT.getScalarType();
1125 const ConstantInt *Elt = &Val;
1127 // In some cases the vector type is legal but the element type is illegal and
1128 // needs to be promoted, for example v8i8 on ARM. In this case, promote the
1129 // inserted value (the type does not need to match the vector element type).
1130 // Any extra bits introduced will be truncated away.
1131 if (VT.isVector() && TLI->getTypeAction(*getContext(), EltVT) ==
1132 TargetLowering::TypePromoteInteger) {
1133 EltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1134 APInt NewVal = Elt->getValue().zext(EltVT.getSizeInBits());
1135 Elt = ConstantInt::get(*getContext(), NewVal);
1137 // In other cases the element type is illegal and needs to be expanded, for
1138 // example v2i64 on MIPS32. In this case, find the nearest legal type, split
1139 // the value into n parts and use a vector type with n-times the elements.
1140 // Then bitcast to the type requested.
1141 // Legalizing constants too early makes the DAGCombiner's job harder so we
1142 // only legalize if the DAG tells us we must produce legal types.
1143 else if (NewNodesMustHaveLegalTypes && VT.isVector() &&
1144 TLI->getTypeAction(*getContext(), EltVT) ==
1145 TargetLowering::TypeExpandInteger) {
1146 APInt NewVal = Elt->getValue();
1147 EVT ViaEltVT = TLI->getTypeToTransformTo(*getContext(), EltVT);
1148 unsigned ViaEltSizeInBits = ViaEltVT.getSizeInBits();
1149 unsigned ViaVecNumElts = VT.getSizeInBits() / ViaEltSizeInBits;
1150 EVT ViaVecVT = EVT::getVectorVT(*getContext(), ViaEltVT, ViaVecNumElts);
1152 // Check the temporary vector is the correct size. If this fails then
1153 // getTypeToTransformTo() probably returned a type whose size (in bits)
1154 // isn't a power-of-2 factor of the requested type size.
1155 assert(ViaVecVT.getSizeInBits() == VT.getSizeInBits());
1157 SmallVector<SDValue, 2> EltParts;
1158 for (unsigned i = 0; i < ViaVecNumElts / VT.getVectorNumElements(); ++i) {
1159 EltParts.push_back(getConstant(NewVal.lshr(i * ViaEltSizeInBits)
1160 .trunc(ViaEltSizeInBits), DL,
1161 ViaEltVT, isT, isO));
1164 // EltParts is currently in little endian order. If we actually want
1165 // big-endian order then reverse it now.
1166 if (getDataLayout().isBigEndian())
1167 std::reverse(EltParts.begin(), EltParts.end());
1169 // The elements must be reversed when the element order is different
1170 // to the endianness of the elements (because the BITCAST is itself a
1171 // vector shuffle in this situation). However, we do not need any code to
1172 // perform this reversal because getConstant() is producing a vector
1174 // This situation occurs in MIPS MSA.
1176 SmallVector<SDValue, 8> Ops;
1177 for (unsigned i = 0; i < VT.getVectorNumElements(); ++i)
1178 Ops.insert(Ops.end(), EltParts.begin(), EltParts.end());
1180 SDValue Result = getNode(ISD::BITCAST, SDLoc(), VT,
1181 getNode(ISD::BUILD_VECTOR, SDLoc(), ViaVecVT,
1186 assert(Elt->getBitWidth() == EltVT.getSizeInBits() &&
1187 "APInt size does not match type size!");
1188 unsigned Opc = isT ? ISD::TargetConstant : ISD::Constant;
1189 FoldingSetNodeID ID;
1190 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1194 SDNode *N = nullptr;
1195 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1197 return SDValue(N, 0);
1200 N = new (NodeAllocator) ConstantSDNode(isT, isO, Elt, DL.getDebugLoc(),
1202 CSEMap.InsertNode(N, IP);
1206 SDValue Result(N, 0);
1207 if (VT.isVector()) {
1208 SmallVector<SDValue, 8> Ops;
1209 Ops.assign(VT.getVectorNumElements(), Result);
1210 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1215 SDValue SelectionDAG::getIntPtrConstant(uint64_t Val, SDLoc DL, bool isTarget) {
1216 return getConstant(Val, DL, TLI->getPointerTy(getDataLayout()), isTarget);
1219 SDValue SelectionDAG::getConstantFP(const APFloat& V, SDLoc DL, EVT VT,
1221 return getConstantFP(*ConstantFP::get(*getContext(), V), DL, VT, isTarget);
1224 SDValue SelectionDAG::getConstantFP(const ConstantFP& V, SDLoc DL, EVT VT,
1226 assert(VT.isFloatingPoint() && "Cannot create integer FP constant!");
1228 EVT EltVT = VT.getScalarType();
1230 // Do the map lookup using the actual bit pattern for the floating point
1231 // value, so that we don't have problems with 0.0 comparing equal to -0.0, and
1232 // we don't have issues with SNANs.
1233 unsigned Opc = isTarget ? ISD::TargetConstantFP : ISD::ConstantFP;
1234 FoldingSetNodeID ID;
1235 AddNodeIDNode(ID, Opc, getVTList(EltVT), None);
1238 SDNode *N = nullptr;
1239 if ((N = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)))
1241 return SDValue(N, 0);
1244 N = new (NodeAllocator) ConstantFPSDNode(isTarget, &V, DL.getDebugLoc(),
1246 CSEMap.InsertNode(N, IP);
1250 SDValue Result(N, 0);
1251 if (VT.isVector()) {
1252 SmallVector<SDValue, 8> Ops;
1253 Ops.assign(VT.getVectorNumElements(), Result);
1254 Result = getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Ops);
1259 SDValue SelectionDAG::getConstantFP(double Val, SDLoc DL, EVT VT,
1261 EVT EltVT = VT.getScalarType();
1262 if (EltVT==MVT::f32)
1263 return getConstantFP(APFloat((float)Val), DL, VT, isTarget);
1264 else if (EltVT==MVT::f64)
1265 return getConstantFP(APFloat(Val), DL, VT, isTarget);
1266 else if (EltVT==MVT::f80 || EltVT==MVT::f128 || EltVT==MVT::ppcf128 ||
1269 APFloat apf = APFloat(Val);
1270 apf.convert(EVTToAPFloatSemantics(EltVT), APFloat::rmNearestTiesToEven,
1272 return getConstantFP(apf, DL, VT, isTarget);
1274 llvm_unreachable("Unsupported type in getConstantFP");
1277 SDValue SelectionDAG::getGlobalAddress(const GlobalValue *GV, SDLoc DL,
1278 EVT VT, int64_t Offset,
1280 unsigned char TargetFlags) {
1281 assert((TargetFlags == 0 || isTargetGA) &&
1282 "Cannot set target flags on target-independent globals");
1284 // Truncate (with sign-extension) the offset value to the pointer size.
1285 unsigned BitWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
1287 Offset = SignExtend64(Offset, BitWidth);
1290 if (GV->isThreadLocal())
1291 Opc = isTargetGA ? ISD::TargetGlobalTLSAddress : ISD::GlobalTLSAddress;
1293 Opc = isTargetGA ? ISD::TargetGlobalAddress : ISD::GlobalAddress;
1295 FoldingSetNodeID ID;
1296 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1298 ID.AddInteger(Offset);
1299 ID.AddInteger(TargetFlags);
1300 ID.AddInteger(GV->getType()->getAddressSpace());
1302 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
1303 return SDValue(E, 0);
1305 SDNode *N = new (NodeAllocator) GlobalAddressSDNode(Opc, DL.getIROrder(),
1306 DL.getDebugLoc(), GV, VT,
1307 Offset, TargetFlags);
1308 CSEMap.InsertNode(N, IP);
1310 return SDValue(N, 0);
1313 SDValue SelectionDAG::getFrameIndex(int FI, EVT VT, bool isTarget) {
1314 unsigned Opc = isTarget ? ISD::TargetFrameIndex : ISD::FrameIndex;
1315 FoldingSetNodeID ID;
1316 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1319 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1320 return SDValue(E, 0);
1322 SDNode *N = new (NodeAllocator) FrameIndexSDNode(FI, VT, isTarget);
1323 CSEMap.InsertNode(N, IP);
1325 return SDValue(N, 0);
1328 SDValue SelectionDAG::getJumpTable(int JTI, EVT VT, bool isTarget,
1329 unsigned char TargetFlags) {
1330 assert((TargetFlags == 0 || isTarget) &&
1331 "Cannot set target flags on target-independent jump tables");
1332 unsigned Opc = isTarget ? ISD::TargetJumpTable : ISD::JumpTable;
1333 FoldingSetNodeID ID;
1334 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1336 ID.AddInteger(TargetFlags);
1338 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1339 return SDValue(E, 0);
1341 SDNode *N = new (NodeAllocator) JumpTableSDNode(JTI, VT, isTarget,
1343 CSEMap.InsertNode(N, IP);
1345 return SDValue(N, 0);
1348 SDValue SelectionDAG::getConstantPool(const Constant *C, EVT VT,
1349 unsigned Alignment, int Offset,
1351 unsigned char TargetFlags) {
1352 assert((TargetFlags == 0 || isTarget) &&
1353 "Cannot set target flags on target-independent globals");
1355 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1356 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1357 FoldingSetNodeID ID;
1358 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1359 ID.AddInteger(Alignment);
1360 ID.AddInteger(Offset);
1362 ID.AddInteger(TargetFlags);
1364 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1365 return SDValue(E, 0);
1367 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1368 Alignment, TargetFlags);
1369 CSEMap.InsertNode(N, IP);
1371 return SDValue(N, 0);
1375 SDValue SelectionDAG::getConstantPool(MachineConstantPoolValue *C, EVT VT,
1376 unsigned Alignment, int Offset,
1378 unsigned char TargetFlags) {
1379 assert((TargetFlags == 0 || isTarget) &&
1380 "Cannot set target flags on target-independent globals");
1382 Alignment = getDataLayout().getPrefTypeAlignment(C->getType());
1383 unsigned Opc = isTarget ? ISD::TargetConstantPool : ISD::ConstantPool;
1384 FoldingSetNodeID ID;
1385 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1386 ID.AddInteger(Alignment);
1387 ID.AddInteger(Offset);
1388 C->addSelectionDAGCSEId(ID);
1389 ID.AddInteger(TargetFlags);
1391 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1392 return SDValue(E, 0);
1394 SDNode *N = new (NodeAllocator) ConstantPoolSDNode(isTarget, C, VT, Offset,
1395 Alignment, TargetFlags);
1396 CSEMap.InsertNode(N, IP);
1398 return SDValue(N, 0);
1401 SDValue SelectionDAG::getTargetIndex(int Index, EVT VT, int64_t Offset,
1402 unsigned char TargetFlags) {
1403 FoldingSetNodeID ID;
1404 AddNodeIDNode(ID, ISD::TargetIndex, getVTList(VT), None);
1405 ID.AddInteger(Index);
1406 ID.AddInteger(Offset);
1407 ID.AddInteger(TargetFlags);
1409 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1410 return SDValue(E, 0);
1413 new (NodeAllocator) TargetIndexSDNode(Index, VT, Offset, TargetFlags);
1414 CSEMap.InsertNode(N, IP);
1416 return SDValue(N, 0);
1419 SDValue SelectionDAG::getBasicBlock(MachineBasicBlock *MBB) {
1420 FoldingSetNodeID ID;
1421 AddNodeIDNode(ID, ISD::BasicBlock, getVTList(MVT::Other), None);
1424 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1425 return SDValue(E, 0);
1427 SDNode *N = new (NodeAllocator) BasicBlockSDNode(MBB);
1428 CSEMap.InsertNode(N, IP);
1430 return SDValue(N, 0);
1433 SDValue SelectionDAG::getValueType(EVT VT) {
1434 if (VT.isSimple() && (unsigned)VT.getSimpleVT().SimpleTy >=
1435 ValueTypeNodes.size())
1436 ValueTypeNodes.resize(VT.getSimpleVT().SimpleTy+1);
1438 SDNode *&N = VT.isExtended() ?
1439 ExtendedValueTypeNodes[VT] : ValueTypeNodes[VT.getSimpleVT().SimpleTy];
1441 if (N) return SDValue(N, 0);
1442 N = new (NodeAllocator) VTSDNode(VT);
1444 return SDValue(N, 0);
1447 SDValue SelectionDAG::getExternalSymbol(const char *Sym, EVT VT) {
1448 SDNode *&N = ExternalSymbols[Sym];
1449 if (N) return SDValue(N, 0);
1450 N = new (NodeAllocator) ExternalSymbolSDNode(false, Sym, 0, VT);
1452 return SDValue(N, 0);
1455 SDValue SelectionDAG::getMCSymbol(MCSymbol *Sym, EVT VT) {
1456 SDNode *&N = MCSymbols[Sym];
1458 return SDValue(N, 0);
1459 N = new (NodeAllocator) MCSymbolSDNode(Sym, VT);
1461 return SDValue(N, 0);
1464 SDValue SelectionDAG::getTargetExternalSymbol(const char *Sym, EVT VT,
1465 unsigned char TargetFlags) {
1467 TargetExternalSymbols[std::pair<std::string,unsigned char>(Sym,
1469 if (N) return SDValue(N, 0);
1470 N = new (NodeAllocator) ExternalSymbolSDNode(true, Sym, TargetFlags, VT);
1472 return SDValue(N, 0);
1475 SDValue SelectionDAG::getCondCode(ISD::CondCode Cond) {
1476 if ((unsigned)Cond >= CondCodeNodes.size())
1477 CondCodeNodes.resize(Cond+1);
1479 if (!CondCodeNodes[Cond]) {
1480 CondCodeSDNode *N = new (NodeAllocator) CondCodeSDNode(Cond);
1481 CondCodeNodes[Cond] = N;
1485 return SDValue(CondCodeNodes[Cond], 0);
1488 // commuteShuffle - swaps the values of N1 and N2, and swaps all indices in
1489 // the shuffle mask M that point at N1 to point at N2, and indices that point
1490 // N2 to point at N1.
1491 static void commuteShuffle(SDValue &N1, SDValue &N2, SmallVectorImpl<int> &M) {
1493 ShuffleVectorSDNode::commuteMask(M);
1496 SDValue SelectionDAG::getVectorShuffle(EVT VT, SDLoc dl, SDValue N1,
1497 SDValue N2, const int *Mask) {
1498 assert(VT == N1.getValueType() && VT == N2.getValueType() &&
1499 "Invalid VECTOR_SHUFFLE");
1501 // Canonicalize shuffle undef, undef -> undef
1502 if (N1.getOpcode() == ISD::UNDEF && N2.getOpcode() == ISD::UNDEF)
1503 return getUNDEF(VT);
1505 // Validate that all indices in Mask are within the range of the elements
1506 // input to the shuffle.
1507 unsigned NElts = VT.getVectorNumElements();
1508 SmallVector<int, 8> MaskVec;
1509 for (unsigned i = 0; i != NElts; ++i) {
1510 assert(Mask[i] < (int)(NElts * 2) && "Index out of range");
1511 MaskVec.push_back(Mask[i]);
1514 // Canonicalize shuffle v, v -> v, undef
1517 for (unsigned i = 0; i != NElts; ++i)
1518 if (MaskVec[i] >= (int)NElts) MaskVec[i] -= NElts;
1521 // Canonicalize shuffle undef, v -> v, undef. Commute the shuffle mask.
1522 if (N1.getOpcode() == ISD::UNDEF)
1523 commuteShuffle(N1, N2, MaskVec);
1525 // If shuffling a splat, try to blend the splat instead. We do this here so
1526 // that even when this arises during lowering we don't have to re-handle it.
1527 auto BlendSplat = [&](BuildVectorSDNode *BV, int Offset) {
1528 BitVector UndefElements;
1529 SDValue Splat = BV->getSplatValue(&UndefElements);
1533 for (int i = 0; i < (int)NElts; ++i) {
1534 if (MaskVec[i] < Offset || MaskVec[i] >= (Offset + (int)NElts))
1537 // If this input comes from undef, mark it as such.
1538 if (UndefElements[MaskVec[i] - Offset]) {
1543 // If we can blend a non-undef lane, use that instead.
1544 if (!UndefElements[i])
1545 MaskVec[i] = i + Offset;
1548 if (auto *N1BV = dyn_cast<BuildVectorSDNode>(N1))
1549 BlendSplat(N1BV, 0);
1550 if (auto *N2BV = dyn_cast<BuildVectorSDNode>(N2))
1551 BlendSplat(N2BV, NElts);
1553 // Canonicalize all index into lhs, -> shuffle lhs, undef
1554 // Canonicalize all index into rhs, -> shuffle rhs, undef
1555 bool AllLHS = true, AllRHS = true;
1556 bool N2Undef = N2.getOpcode() == ISD::UNDEF;
1557 for (unsigned i = 0; i != NElts; ++i) {
1558 if (MaskVec[i] >= (int)NElts) {
1563 } else if (MaskVec[i] >= 0) {
1567 if (AllLHS && AllRHS)
1568 return getUNDEF(VT);
1569 if (AllLHS && !N2Undef)
1573 commuteShuffle(N1, N2, MaskVec);
1575 // Reset our undef status after accounting for the mask.
1576 N2Undef = N2.getOpcode() == ISD::UNDEF;
1577 // Re-check whether both sides ended up undef.
1578 if (N1.getOpcode() == ISD::UNDEF && N2Undef)
1579 return getUNDEF(VT);
1581 // If Identity shuffle return that node.
1582 bool Identity = true, AllSame = true;
1583 for (unsigned i = 0; i != NElts; ++i) {
1584 if (MaskVec[i] >= 0 && MaskVec[i] != (int)i) Identity = false;
1585 if (MaskVec[i] != MaskVec[0]) AllSame = false;
1587 if (Identity && NElts)
1590 // Shuffling a constant splat doesn't change the result.
1594 // Look through any bitcasts. We check that these don't change the number
1595 // (and size) of elements and just changes their types.
1596 while (V.getOpcode() == ISD::BITCAST)
1597 V = V->getOperand(0);
1599 // A splat should always show up as a build vector node.
1600 if (auto *BV = dyn_cast<BuildVectorSDNode>(V)) {
1601 BitVector UndefElements;
1602 SDValue Splat = BV->getSplatValue(&UndefElements);
1603 // If this is a splat of an undef, shuffling it is also undef.
1604 if (Splat && Splat.getOpcode() == ISD::UNDEF)
1605 return getUNDEF(VT);
1608 V.getValueType().getVectorNumElements() == VT.getVectorNumElements();
1610 // We only have a splat which can skip shuffles if there is a splatted
1611 // value and no undef lanes rearranged by the shuffle.
1612 if (Splat && UndefElements.none()) {
1613 // Splat of <x, x, ..., x>, return <x, x, ..., x>, provided that the
1614 // number of elements match or the value splatted is a zero constant.
1617 if (auto *C = dyn_cast<ConstantSDNode>(Splat))
1618 if (C->isNullValue())
1622 // If the shuffle itself creates a splat, build the vector directly.
1623 if (AllSame && SameNumElts) {
1624 const SDValue &Splatted = BV->getOperand(MaskVec[0]);
1625 SmallVector<SDValue, 8> Ops(NElts, Splatted);
1627 EVT BuildVT = BV->getValueType(0);
1628 SDValue NewBV = getNode(ISD::BUILD_VECTOR, dl, BuildVT, Ops);
1630 // We may have jumped through bitcasts, so the type of the
1631 // BUILD_VECTOR may not match the type of the shuffle.
1633 NewBV = getNode(ISD::BITCAST, dl, VT, NewBV);
1639 FoldingSetNodeID ID;
1640 SDValue Ops[2] = { N1, N2 };
1641 AddNodeIDNode(ID, ISD::VECTOR_SHUFFLE, getVTList(VT), Ops);
1642 for (unsigned i = 0; i != NElts; ++i)
1643 ID.AddInteger(MaskVec[i]);
1646 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1647 return SDValue(E, 0);
1649 // Allocate the mask array for the node out of the BumpPtrAllocator, since
1650 // SDNode doesn't have access to it. This memory will be "leaked" when
1651 // the node is deallocated, but recovered when the NodeAllocator is released.
1652 int *MaskAlloc = OperandAllocator.Allocate<int>(NElts);
1653 memcpy(MaskAlloc, &MaskVec[0], NElts * sizeof(int));
1655 ShuffleVectorSDNode *N =
1656 new (NodeAllocator) ShuffleVectorSDNode(VT, dl.getIROrder(),
1657 dl.getDebugLoc(), N1, N2,
1659 CSEMap.InsertNode(N, IP);
1661 return SDValue(N, 0);
1664 SDValue SelectionDAG::getCommutedVectorShuffle(const ShuffleVectorSDNode &SV) {
1665 MVT VT = SV.getSimpleValueType(0);
1666 SmallVector<int, 8> MaskVec(SV.getMask().begin(), SV.getMask().end());
1667 ShuffleVectorSDNode::commuteMask(MaskVec);
1669 SDValue Op0 = SV.getOperand(0);
1670 SDValue Op1 = SV.getOperand(1);
1671 return getVectorShuffle(VT, SDLoc(&SV), Op1, Op0, &MaskVec[0]);
1674 SDValue SelectionDAG::getConvertRndSat(EVT VT, SDLoc dl,
1675 SDValue Val, SDValue DTy,
1676 SDValue STy, SDValue Rnd, SDValue Sat,
1677 ISD::CvtCode Code) {
1678 // If the src and dest types are the same and the conversion is between
1679 // integer types of the same sign or two floats, no conversion is necessary.
1681 (Code == ISD::CVT_UU || Code == ISD::CVT_SS || Code == ISD::CVT_FF))
1684 FoldingSetNodeID ID;
1685 SDValue Ops[] = { Val, DTy, STy, Rnd, Sat };
1686 AddNodeIDNode(ID, ISD::CONVERT_RNDSAT, getVTList(VT), Ops);
1688 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1689 return SDValue(E, 0);
1691 CvtRndSatSDNode *N = new (NodeAllocator) CvtRndSatSDNode(VT, dl.getIROrder(),
1694 CSEMap.InsertNode(N, IP);
1696 return SDValue(N, 0);
1699 SDValue SelectionDAG::getRegister(unsigned RegNo, EVT VT) {
1700 FoldingSetNodeID ID;
1701 AddNodeIDNode(ID, ISD::Register, getVTList(VT), None);
1702 ID.AddInteger(RegNo);
1704 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1705 return SDValue(E, 0);
1707 SDNode *N = new (NodeAllocator) RegisterSDNode(RegNo, VT);
1708 CSEMap.InsertNode(N, IP);
1710 return SDValue(N, 0);
1713 SDValue SelectionDAG::getRegisterMask(const uint32_t *RegMask) {
1714 FoldingSetNodeID ID;
1715 AddNodeIDNode(ID, ISD::RegisterMask, getVTList(MVT::Untyped), None);
1716 ID.AddPointer(RegMask);
1718 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1719 return SDValue(E, 0);
1721 SDNode *N = new (NodeAllocator) RegisterMaskSDNode(RegMask);
1722 CSEMap.InsertNode(N, IP);
1724 return SDValue(N, 0);
1727 SDValue SelectionDAG::getEHLabel(SDLoc dl, SDValue Root, MCSymbol *Label) {
1728 FoldingSetNodeID ID;
1729 SDValue Ops[] = { Root };
1730 AddNodeIDNode(ID, ISD::EH_LABEL, getVTList(MVT::Other), Ops);
1731 ID.AddPointer(Label);
1733 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1734 return SDValue(E, 0);
1736 SDNode *N = new (NodeAllocator) EHLabelSDNode(dl.getIROrder(),
1737 dl.getDebugLoc(), Root, Label);
1738 CSEMap.InsertNode(N, IP);
1740 return SDValue(N, 0);
1744 SDValue SelectionDAG::getBlockAddress(const BlockAddress *BA, EVT VT,
1747 unsigned char TargetFlags) {
1748 unsigned Opc = isTarget ? ISD::TargetBlockAddress : ISD::BlockAddress;
1750 FoldingSetNodeID ID;
1751 AddNodeIDNode(ID, Opc, getVTList(VT), None);
1753 ID.AddInteger(Offset);
1754 ID.AddInteger(TargetFlags);
1756 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1757 return SDValue(E, 0);
1759 SDNode *N = new (NodeAllocator) BlockAddressSDNode(Opc, VT, BA, Offset,
1761 CSEMap.InsertNode(N, IP);
1763 return SDValue(N, 0);
1766 SDValue SelectionDAG::getSrcValue(const Value *V) {
1767 assert((!V || V->getType()->isPointerTy()) &&
1768 "SrcValue is not a pointer?");
1770 FoldingSetNodeID ID;
1771 AddNodeIDNode(ID, ISD::SRCVALUE, getVTList(MVT::Other), None);
1775 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1776 return SDValue(E, 0);
1778 SDNode *N = new (NodeAllocator) SrcValueSDNode(V);
1779 CSEMap.InsertNode(N, IP);
1781 return SDValue(N, 0);
1784 /// getMDNode - Return an MDNodeSDNode which holds an MDNode.
1785 SDValue SelectionDAG::getMDNode(const MDNode *MD) {
1786 FoldingSetNodeID ID;
1787 AddNodeIDNode(ID, ISD::MDNODE_SDNODE, getVTList(MVT::Other), None);
1791 if (SDNode *E = FindNodeOrInsertPos(ID, IP))
1792 return SDValue(E, 0);
1794 SDNode *N = new (NodeAllocator) MDNodeSDNode(MD);
1795 CSEMap.InsertNode(N, IP);
1797 return SDValue(N, 0);
1800 SDValue SelectionDAG::getBitcast(EVT VT, SDValue V) {
1801 if (VT == V.getValueType())
1804 return getNode(ISD::BITCAST, SDLoc(V), VT, V);
1807 /// getAddrSpaceCast - Return an AddrSpaceCastSDNode.
1808 SDValue SelectionDAG::getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr,
1809 unsigned SrcAS, unsigned DestAS) {
1810 SDValue Ops[] = {Ptr};
1811 FoldingSetNodeID ID;
1812 AddNodeIDNode(ID, ISD::ADDRSPACECAST, getVTList(VT), Ops);
1813 ID.AddInteger(SrcAS);
1814 ID.AddInteger(DestAS);
1817 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
1818 return SDValue(E, 0);
1820 SDNode *N = new (NodeAllocator) AddrSpaceCastSDNode(dl.getIROrder(),
1822 VT, Ptr, SrcAS, DestAS);
1823 CSEMap.InsertNode(N, IP);
1825 return SDValue(N, 0);
1828 /// getShiftAmountOperand - Return the specified value casted to
1829 /// the target's desired shift amount type.
1830 SDValue SelectionDAG::getShiftAmountOperand(EVT LHSTy, SDValue Op) {
1831 EVT OpTy = Op.getValueType();
1832 EVT ShTy = TLI->getShiftAmountTy(LHSTy, getDataLayout());
1833 if (OpTy == ShTy || OpTy.isVector()) return Op;
1835 return getZExtOrTrunc(Op, SDLoc(Op), ShTy);
1838 SDValue SelectionDAG::expandVAArg(SDNode *Node) {
1840 const TargetLowering &TLI = getTargetLoweringInfo();
1841 const Value *V = cast<SrcValueSDNode>(Node->getOperand(2))->getValue();
1842 EVT VT = Node->getValueType(0);
1843 SDValue Tmp1 = Node->getOperand(0);
1844 SDValue Tmp2 = Node->getOperand(1);
1845 unsigned Align = Node->getConstantOperandVal(3);
1847 SDValue VAListLoad =
1848 getLoad(TLI.getPointerTy(getDataLayout()), dl, Tmp1, Tmp2,
1849 MachinePointerInfo(V), false, false, false, 0);
1850 SDValue VAList = VAListLoad;
1852 if (Align > TLI.getMinStackArgumentAlignment()) {
1853 assert(((Align & (Align-1)) == 0) && "Expected Align to be a power of 2");
1855 VAList = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1856 getConstant(Align - 1, dl, VAList.getValueType()));
1858 VAList = getNode(ISD::AND, dl, VAList.getValueType(), VAList,
1859 getConstant(-(int64_t)Align, dl, VAList.getValueType()));
1862 // Increment the pointer, VAList, to the next vaarg
1863 Tmp1 = getNode(ISD::ADD, dl, VAList.getValueType(), VAList,
1864 getConstant(getDataLayout().getTypeAllocSize(
1865 VT.getTypeForEVT(*getContext())),
1866 dl, VAList.getValueType()));
1867 // Store the incremented VAList to the legalized pointer
1868 Tmp1 = getStore(VAListLoad.getValue(1), dl, Tmp1, Tmp2,
1869 MachinePointerInfo(V), false, false, 0);
1870 // Load the actual argument out of the pointer VAList
1871 return getLoad(VT, dl, Tmp1, VAList, MachinePointerInfo(),
1872 false, false, false, 0);
1875 SDValue SelectionDAG::expandVACopy(SDNode *Node) {
1877 const TargetLowering &TLI = getTargetLoweringInfo();
1878 // This defaults to loading a pointer from the input and storing it to the
1879 // output, returning the chain.
1880 const Value *VD = cast<SrcValueSDNode>(Node->getOperand(3))->getValue();
1881 const Value *VS = cast<SrcValueSDNode>(Node->getOperand(4))->getValue();
1882 SDValue Tmp1 = getLoad(TLI.getPointerTy(getDataLayout()), dl,
1883 Node->getOperand(0), Node->getOperand(2),
1884 MachinePointerInfo(VS), false, false, false, 0);
1885 return getStore(Tmp1.getValue(1), dl, Tmp1, Node->getOperand(1),
1886 MachinePointerInfo(VD), false, false, 0);
1889 /// CreateStackTemporary - Create a stack temporary, suitable for holding the
1890 /// specified value type.
1891 SDValue SelectionDAG::CreateStackTemporary(EVT VT, unsigned minAlign) {
1892 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1893 unsigned ByteSize = VT.getStoreSize();
1894 Type *Ty = VT.getTypeForEVT(*getContext());
1895 unsigned StackAlign =
1896 std::max((unsigned)getDataLayout().getPrefTypeAlignment(Ty), minAlign);
1898 int FrameIdx = FrameInfo->CreateStackObject(ByteSize, StackAlign, false);
1899 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1902 /// CreateStackTemporary - Create a stack temporary suitable for holding
1903 /// either of the specified value types.
1904 SDValue SelectionDAG::CreateStackTemporary(EVT VT1, EVT VT2) {
1905 unsigned Bytes = std::max(VT1.getStoreSize(), VT2.getStoreSize());
1906 Type *Ty1 = VT1.getTypeForEVT(*getContext());
1907 Type *Ty2 = VT2.getTypeForEVT(*getContext());
1908 const DataLayout &DL = getDataLayout();
1910 std::max(DL.getPrefTypeAlignment(Ty1), DL.getPrefTypeAlignment(Ty2));
1912 MachineFrameInfo *FrameInfo = getMachineFunction().getFrameInfo();
1913 int FrameIdx = FrameInfo->CreateStackObject(Bytes, Align, false);
1914 return getFrameIndex(FrameIdx, TLI->getPointerTy(getDataLayout()));
1917 SDValue SelectionDAG::FoldSetCC(EVT VT, SDValue N1,
1918 SDValue N2, ISD::CondCode Cond, SDLoc dl) {
1919 // These setcc operations always fold.
1923 case ISD::SETFALSE2: return getConstant(0, dl, VT);
1925 case ISD::SETTRUE2: {
1926 TargetLowering::BooleanContent Cnt =
1927 TLI->getBooleanContents(N1->getValueType(0));
1929 Cnt == TargetLowering::ZeroOrNegativeOneBooleanContent ? -1ULL : 1, dl,
1943 assert(!N1.getValueType().isInteger() && "Illegal setcc for integer!");
1947 if (ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2)) {
1948 const APInt &C2 = N2C->getAPIntValue();
1949 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
1950 const APInt &C1 = N1C->getAPIntValue();
1953 default: llvm_unreachable("Unknown integer setcc!");
1954 case ISD::SETEQ: return getConstant(C1 == C2, dl, VT);
1955 case ISD::SETNE: return getConstant(C1 != C2, dl, VT);
1956 case ISD::SETULT: return getConstant(C1.ult(C2), dl, VT);
1957 case ISD::SETUGT: return getConstant(C1.ugt(C2), dl, VT);
1958 case ISD::SETULE: return getConstant(C1.ule(C2), dl, VT);
1959 case ISD::SETUGE: return getConstant(C1.uge(C2), dl, VT);
1960 case ISD::SETLT: return getConstant(C1.slt(C2), dl, VT);
1961 case ISD::SETGT: return getConstant(C1.sgt(C2), dl, VT);
1962 case ISD::SETLE: return getConstant(C1.sle(C2), dl, VT);
1963 case ISD::SETGE: return getConstant(C1.sge(C2), dl, VT);
1967 if (ConstantFPSDNode *N1C = dyn_cast<ConstantFPSDNode>(N1)) {
1968 if (ConstantFPSDNode *N2C = dyn_cast<ConstantFPSDNode>(N2)) {
1969 APFloat::cmpResult R = N1C->getValueAPF().compare(N2C->getValueAPF());
1972 case ISD::SETEQ: if (R==APFloat::cmpUnordered)
1973 return getUNDEF(VT);
1975 case ISD::SETOEQ: return getConstant(R==APFloat::cmpEqual, dl, VT);
1976 case ISD::SETNE: if (R==APFloat::cmpUnordered)
1977 return getUNDEF(VT);
1979 case ISD::SETONE: return getConstant(R==APFloat::cmpGreaterThan ||
1980 R==APFloat::cmpLessThan, dl, VT);
1981 case ISD::SETLT: if (R==APFloat::cmpUnordered)
1982 return getUNDEF(VT);
1984 case ISD::SETOLT: return getConstant(R==APFloat::cmpLessThan, dl, VT);
1985 case ISD::SETGT: if (R==APFloat::cmpUnordered)
1986 return getUNDEF(VT);
1988 case ISD::SETOGT: return getConstant(R==APFloat::cmpGreaterThan, dl, VT);
1989 case ISD::SETLE: if (R==APFloat::cmpUnordered)
1990 return getUNDEF(VT);
1992 case ISD::SETOLE: return getConstant(R==APFloat::cmpLessThan ||
1993 R==APFloat::cmpEqual, dl, VT);
1994 case ISD::SETGE: if (R==APFloat::cmpUnordered)
1995 return getUNDEF(VT);
1997 case ISD::SETOGE: return getConstant(R==APFloat::cmpGreaterThan ||
1998 R==APFloat::cmpEqual, dl, VT);
1999 case ISD::SETO: return getConstant(R!=APFloat::cmpUnordered, dl, VT);
2000 case ISD::SETUO: return getConstant(R==APFloat::cmpUnordered, dl, VT);
2001 case ISD::SETUEQ: return getConstant(R==APFloat::cmpUnordered ||
2002 R==APFloat::cmpEqual, dl, VT);
2003 case ISD::SETUNE: return getConstant(R!=APFloat::cmpEqual, dl, VT);
2004 case ISD::SETULT: return getConstant(R==APFloat::cmpUnordered ||
2005 R==APFloat::cmpLessThan, dl, VT);
2006 case ISD::SETUGT: return getConstant(R==APFloat::cmpGreaterThan ||
2007 R==APFloat::cmpUnordered, dl, VT);
2008 case ISD::SETULE: return getConstant(R!=APFloat::cmpGreaterThan, dl, VT);
2009 case ISD::SETUGE: return getConstant(R!=APFloat::cmpLessThan, dl, VT);
2012 // Ensure that the constant occurs on the RHS.
2013 ISD::CondCode SwappedCond = ISD::getSetCCSwappedOperands(Cond);
2014 MVT CompVT = N1.getValueType().getSimpleVT();
2015 if (!TLI->isCondCodeLegal(SwappedCond, CompVT))
2018 return getSetCC(dl, VT, N2, N1, SwappedCond);
2022 // Could not fold it.
2026 /// SignBitIsZero - Return true if the sign bit of Op is known to be zero. We
2027 /// use this predicate to simplify operations downstream.
2028 bool SelectionDAG::SignBitIsZero(SDValue Op, unsigned Depth) const {
2029 // This predicate is not safe for vector operations.
2030 if (Op.getValueType().isVector())
2033 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2034 return MaskedValueIsZero(Op, APInt::getSignBit(BitWidth), Depth);
2037 /// MaskedValueIsZero - Return true if 'V & Mask' is known to be zero. We use
2038 /// this predicate to simplify operations downstream. Mask is known to be zero
2039 /// for bits that V cannot have.
2040 bool SelectionDAG::MaskedValueIsZero(SDValue Op, const APInt &Mask,
2041 unsigned Depth) const {
2042 APInt KnownZero, KnownOne;
2043 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2044 return (KnownZero & Mask) == Mask;
2047 /// Determine which bits of Op are known to be either zero or one and return
2048 /// them in the KnownZero/KnownOne bitsets.
2049 void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
2050 APInt &KnownOne, unsigned Depth) const {
2051 unsigned BitWidth = Op.getValueType().getScalarType().getSizeInBits();
2053 KnownZero = KnownOne = APInt(BitWidth, 0); // Don't know anything.
2055 return; // Limit search depth.
2057 APInt KnownZero2, KnownOne2;
2059 switch (Op.getOpcode()) {
2061 // We know all of the bits for a constant!
2062 KnownOne = cast<ConstantSDNode>(Op)->getAPIntValue();
2063 KnownZero = ~KnownOne;
2066 // If either the LHS or the RHS are Zero, the result is zero.
2067 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2068 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2070 // Output known-1 bits are only known if set in both the LHS & RHS.
2071 KnownOne &= KnownOne2;
2072 // Output known-0 are known to be clear if zero in either the LHS | RHS.
2073 KnownZero |= KnownZero2;
2076 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2077 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2079 // Output known-0 bits are only known if clear in both the LHS & RHS.
2080 KnownZero &= KnownZero2;
2081 // Output known-1 are known to be set if set in either the LHS | RHS.
2082 KnownOne |= KnownOne2;
2085 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2086 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2088 // Output known-0 bits are known if clear or set in both the LHS & RHS.
2089 APInt KnownZeroOut = (KnownZero & KnownZero2) | (KnownOne & KnownOne2);
2090 // Output known-1 are known to be set if set in only one of the LHS, RHS.
2091 KnownOne = (KnownZero & KnownOne2) | (KnownOne & KnownZero2);
2092 KnownZero = KnownZeroOut;
2096 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2097 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2099 // If low bits are zero in either operand, output low known-0 bits.
2100 // Also compute a conserative estimate for high known-0 bits.
2101 // More trickiness is possible, but this is sufficient for the
2102 // interesting case of alignment computation.
2103 KnownOne.clearAllBits();
2104 unsigned TrailZ = KnownZero.countTrailingOnes() +
2105 KnownZero2.countTrailingOnes();
2106 unsigned LeadZ = std::max(KnownZero.countLeadingOnes() +
2107 KnownZero2.countLeadingOnes(),
2108 BitWidth) - BitWidth;
2110 TrailZ = std::min(TrailZ, BitWidth);
2111 LeadZ = std::min(LeadZ, BitWidth);
2112 KnownZero = APInt::getLowBitsSet(BitWidth, TrailZ) |
2113 APInt::getHighBitsSet(BitWidth, LeadZ);
2117 // For the purposes of computing leading zeros we can conservatively
2118 // treat a udiv as a logical right shift by the power of 2 known to
2119 // be less than the denominator.
2120 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2121 unsigned LeadZ = KnownZero2.countLeadingOnes();
2123 KnownOne2.clearAllBits();
2124 KnownZero2.clearAllBits();
2125 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2126 unsigned RHSUnknownLeadingOnes = KnownOne2.countLeadingZeros();
2127 if (RHSUnknownLeadingOnes != BitWidth)
2128 LeadZ = std::min(BitWidth,
2129 LeadZ + BitWidth - RHSUnknownLeadingOnes - 1);
2131 KnownZero = APInt::getHighBitsSet(BitWidth, LeadZ);
2135 computeKnownBits(Op.getOperand(2), KnownZero, KnownOne, Depth+1);
2136 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2138 // Only known if known in both the LHS and RHS.
2139 KnownOne &= KnownOne2;
2140 KnownZero &= KnownZero2;
2142 case ISD::SELECT_CC:
2143 computeKnownBits(Op.getOperand(3), KnownZero, KnownOne, Depth+1);
2144 computeKnownBits(Op.getOperand(2), KnownZero2, KnownOne2, Depth+1);
2146 // Only known if known in both the LHS and RHS.
2147 KnownOne &= KnownOne2;
2148 KnownZero &= KnownZero2;
2156 if (Op.getResNo() != 1)
2158 // The boolean result conforms to getBooleanContents.
2159 // If we know the result of a setcc has the top bits zero, use this info.
2160 // We know that we have an integer-based boolean since these operations
2161 // are only available for integer.
2162 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2163 TargetLowering::ZeroOrOneBooleanContent &&
2165 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2168 // If we know the result of a setcc has the top bits zero, use this info.
2169 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2170 TargetLowering::ZeroOrOneBooleanContent &&
2172 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2175 // (shl X, C1) & C2 == 0 iff (X & C2 >>u C1) == 0
2176 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2177 unsigned ShAmt = SA->getZExtValue();
2179 // If the shift count is an invalid immediate, don't do anything.
2180 if (ShAmt >= BitWidth)
2183 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2184 KnownZero <<= ShAmt;
2186 // low bits known zero.
2187 KnownZero |= APInt::getLowBitsSet(BitWidth, ShAmt);
2191 // (ushr X, C1) & C2 == 0 iff (-1 >> C1) & C2 == 0
2192 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2193 unsigned ShAmt = SA->getZExtValue();
2195 // If the shift count is an invalid immediate, don't do anything.
2196 if (ShAmt >= BitWidth)
2199 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2200 KnownZero = KnownZero.lshr(ShAmt);
2201 KnownOne = KnownOne.lshr(ShAmt);
2203 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2204 KnownZero |= HighBits; // High bits known zero.
2208 if (ConstantSDNode *SA = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2209 unsigned ShAmt = SA->getZExtValue();
2211 // If the shift count is an invalid immediate, don't do anything.
2212 if (ShAmt >= BitWidth)
2215 // If any of the demanded bits are produced by the sign extension, we also
2216 // demand the input sign bit.
2217 APInt HighBits = APInt::getHighBitsSet(BitWidth, ShAmt);
2219 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2220 KnownZero = KnownZero.lshr(ShAmt);
2221 KnownOne = KnownOne.lshr(ShAmt);
2223 // Handle the sign bits.
2224 APInt SignBit = APInt::getSignBit(BitWidth);
2225 SignBit = SignBit.lshr(ShAmt); // Adjust to where it is now in the mask.
2227 if (KnownZero.intersects(SignBit)) {
2228 KnownZero |= HighBits; // New bits are known zero.
2229 } else if (KnownOne.intersects(SignBit)) {
2230 KnownOne |= HighBits; // New bits are known one.
2234 case ISD::SIGN_EXTEND_INREG: {
2235 EVT EVT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2236 unsigned EBits = EVT.getScalarType().getSizeInBits();
2238 // Sign extension. Compute the demanded bits in the result that are not
2239 // present in the input.
2240 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - EBits);
2242 APInt InSignBit = APInt::getSignBit(EBits);
2243 APInt InputDemandedBits = APInt::getLowBitsSet(BitWidth, EBits);
2245 // If the sign extended bits are demanded, we know that the sign
2247 InSignBit = InSignBit.zext(BitWidth);
2248 if (NewBits.getBoolValue())
2249 InputDemandedBits |= InSignBit;
2251 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2252 KnownOne &= InputDemandedBits;
2253 KnownZero &= InputDemandedBits;
2255 // If the sign bit of the input is known set or clear, then we know the
2256 // top bits of the result.
2257 if (KnownZero.intersects(InSignBit)) { // Input sign bit known clear
2258 KnownZero |= NewBits;
2259 KnownOne &= ~NewBits;
2260 } else if (KnownOne.intersects(InSignBit)) { // Input sign bit known set
2261 KnownOne |= NewBits;
2262 KnownZero &= ~NewBits;
2263 } else { // Input sign bit unknown
2264 KnownZero &= ~NewBits;
2265 KnownOne &= ~NewBits;
2270 case ISD::CTTZ_ZERO_UNDEF:
2272 case ISD::CTLZ_ZERO_UNDEF:
2274 unsigned LowBits = Log2_32(BitWidth)+1;
2275 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - LowBits);
2276 KnownOne.clearAllBits();
2280 LoadSDNode *LD = cast<LoadSDNode>(Op);
2281 // If this is a ZEXTLoad and we are looking at the loaded value.
2282 if (ISD::isZEXTLoad(Op.getNode()) && Op.getResNo() == 0) {
2283 EVT VT = LD->getMemoryVT();
2284 unsigned MemBits = VT.getScalarType().getSizeInBits();
2285 KnownZero |= APInt::getHighBitsSet(BitWidth, BitWidth - MemBits);
2286 } else if (const MDNode *Ranges = LD->getRanges()) {
2287 if (LD->getExtensionType() == ISD::NON_EXTLOAD)
2288 computeKnownBitsFromRangeMetadata(*Ranges, KnownZero, KnownOne);
2292 case ISD::ZERO_EXTEND: {
2293 EVT InVT = Op.getOperand(0).getValueType();
2294 unsigned InBits = InVT.getScalarType().getSizeInBits();
2295 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2296 KnownZero = KnownZero.trunc(InBits);
2297 KnownOne = KnownOne.trunc(InBits);
2298 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2299 KnownZero = KnownZero.zext(BitWidth);
2300 KnownOne = KnownOne.zext(BitWidth);
2301 KnownZero |= NewBits;
2304 case ISD::SIGN_EXTEND: {
2305 EVT InVT = Op.getOperand(0).getValueType();
2306 unsigned InBits = InVT.getScalarType().getSizeInBits();
2307 APInt NewBits = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
2309 KnownZero = KnownZero.trunc(InBits);
2310 KnownOne = KnownOne.trunc(InBits);
2311 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2313 // Note if the sign bit is known to be zero or one.
2314 bool SignBitKnownZero = KnownZero.isNegative();
2315 bool SignBitKnownOne = KnownOne.isNegative();
2317 KnownZero = KnownZero.zext(BitWidth);
2318 KnownOne = KnownOne.zext(BitWidth);
2320 // If the sign bit is known zero or one, the top bits match.
2321 if (SignBitKnownZero)
2322 KnownZero |= NewBits;
2323 else if (SignBitKnownOne)
2324 KnownOne |= NewBits;
2327 case ISD::ANY_EXTEND: {
2328 EVT InVT = Op.getOperand(0).getValueType();
2329 unsigned InBits = InVT.getScalarType().getSizeInBits();
2330 KnownZero = KnownZero.trunc(InBits);
2331 KnownOne = KnownOne.trunc(InBits);
2332 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2333 KnownZero = KnownZero.zext(BitWidth);
2334 KnownOne = KnownOne.zext(BitWidth);
2337 case ISD::TRUNCATE: {
2338 EVT InVT = Op.getOperand(0).getValueType();
2339 unsigned InBits = InVT.getScalarType().getSizeInBits();
2340 KnownZero = KnownZero.zext(InBits);
2341 KnownOne = KnownOne.zext(InBits);
2342 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2343 KnownZero = KnownZero.trunc(BitWidth);
2344 KnownOne = KnownOne.trunc(BitWidth);
2347 case ISD::AssertZext: {
2348 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT();
2349 APInt InMask = APInt::getLowBitsSet(BitWidth, VT.getSizeInBits());
2350 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2351 KnownZero |= (~InMask);
2352 KnownOne &= (~KnownZero);
2356 // All bits are zero except the low bit.
2357 KnownZero = APInt::getHighBitsSet(BitWidth, BitWidth - 1);
2361 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0))) {
2362 // We know that the top bits of C-X are clear if X contains less bits
2363 // than C (i.e. no wrap-around can happen). For example, 20-X is
2364 // positive if we can prove that X is >= 0 and < 16.
2365 if (CLHS->getAPIntValue().isNonNegative()) {
2366 unsigned NLZ = (CLHS->getAPIntValue()+1).countLeadingZeros();
2367 // NLZ can't be BitWidth with no sign bit
2368 APInt MaskV = APInt::getHighBitsSet(BitWidth, NLZ+1);
2369 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2371 // If all of the MaskV bits are known to be zero, then we know the
2372 // output top bits are zero, because we now know that the output is
2374 if ((KnownZero2 & MaskV) == MaskV) {
2375 unsigned NLZ2 = CLHS->getAPIntValue().countLeadingZeros();
2376 // Top bits known zero.
2377 KnownZero = APInt::getHighBitsSet(BitWidth, NLZ2);
2385 // Output known-0 bits are known if clear or set in both the low clear bits
2386 // common to both LHS & RHS. For example, 8+(X<<3) is known to have the
2387 // low 3 bits clear.
2388 // Output known-0 bits are also known if the top bits of each input are
2389 // known to be clear. For example, if one input has the top 10 bits clear
2390 // and the other has the top 8 bits clear, we know the top 7 bits of the
2391 // output must be clear.
2392 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth+1);
2393 unsigned KnownZeroHigh = KnownZero2.countLeadingOnes();
2394 unsigned KnownZeroLow = KnownZero2.countTrailingOnes();
2396 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2397 KnownZeroHigh = std::min(KnownZeroHigh,
2398 KnownZero2.countLeadingOnes());
2399 KnownZeroLow = std::min(KnownZeroLow,
2400 KnownZero2.countTrailingOnes());
2402 if (Op.getOpcode() == ISD::ADD) {
2403 KnownZero |= APInt::getLowBitsSet(BitWidth, KnownZeroLow);
2404 if (KnownZeroHigh > 1)
2405 KnownZero |= APInt::getHighBitsSet(BitWidth, KnownZeroHigh - 1);
2409 // With ADDE, a carry bit may be added in, so we can only use this
2410 // information if we know (at least) that the low two bits are clear. We
2411 // then return to the caller that the low bit is unknown but that other bits
2413 if (KnownZeroLow >= 2) // ADDE
2414 KnownZero |= APInt::getBitsSet(BitWidth, 1, KnownZeroLow);
2418 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2419 const APInt &RA = Rem->getAPIntValue().abs();
2420 if (RA.isPowerOf2()) {
2421 APInt LowBits = RA - 1;
2422 computeKnownBits(Op.getOperand(0), KnownZero2,KnownOne2,Depth+1);
2424 // The low bits of the first operand are unchanged by the srem.
2425 KnownZero = KnownZero2 & LowBits;
2426 KnownOne = KnownOne2 & LowBits;
2428 // If the first operand is non-negative or has all low bits zero, then
2429 // the upper bits are all zero.
2430 if (KnownZero2[BitWidth-1] || ((KnownZero2 & LowBits) == LowBits))
2431 KnownZero |= ~LowBits;
2433 // If the first operand is negative and not all low bits are zero, then
2434 // the upper bits are all one.
2435 if (KnownOne2[BitWidth-1] && ((KnownOne2 & LowBits) != 0))
2436 KnownOne |= ~LowBits;
2437 assert((KnownZero & KnownOne) == 0&&"Bits known to be one AND zero?");
2442 if (ConstantSDNode *Rem = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2443 const APInt &RA = Rem->getAPIntValue();
2444 if (RA.isPowerOf2()) {
2445 APInt LowBits = (RA - 1);
2446 computeKnownBits(Op.getOperand(0), KnownZero2, KnownOne2, Depth + 1);
2448 // The upper bits are all zero, the lower ones are unchanged.
2449 KnownZero = KnownZero2 | ~LowBits;
2450 KnownOne = KnownOne2 & LowBits;
2455 // Since the result is less than or equal to either operand, any leading
2456 // zero bits in either operand must also exist in the result.
2457 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2458 computeKnownBits(Op.getOperand(1), KnownZero2, KnownOne2, Depth+1);
2460 uint32_t Leaders = std::max(KnownZero.countLeadingOnes(),
2461 KnownZero2.countLeadingOnes());
2462 KnownOne.clearAllBits();
2463 KnownZero = APInt::getHighBitsSet(BitWidth, Leaders);
2466 case ISD::EXTRACT_ELEMENT: {
2467 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2468 const unsigned Index =
2469 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2470 const unsigned BitWidth = Op.getValueType().getSizeInBits();
2472 // Remove low part of known bits mask
2473 KnownZero = KnownZero.getHiBits(KnownZero.getBitWidth() - Index * BitWidth);
2474 KnownOne = KnownOne.getHiBits(KnownOne.getBitWidth() - Index * BitWidth);
2476 // Remove high part of known bit mask
2477 KnownZero = KnownZero.trunc(BitWidth);
2478 KnownOne = KnownOne.trunc(BitWidth);
2485 APInt Op0Zero, Op0One;
2486 APInt Op1Zero, Op1One;
2487 computeKnownBits(Op.getOperand(0), Op0Zero, Op0One, Depth);
2488 computeKnownBits(Op.getOperand(1), Op1Zero, Op1One, Depth);
2490 KnownZero = Op0Zero & Op1Zero;
2491 KnownOne = Op0One & Op1One;
2494 case ISD::FrameIndex:
2495 case ISD::TargetFrameIndex:
2496 if (unsigned Align = InferPtrAlignment(Op)) {
2497 // The low bits are known zero if the pointer is aligned.
2498 KnownZero = APInt::getLowBitsSet(BitWidth, Log2_32(Align));
2504 if (Op.getOpcode() < ISD::BUILTIN_OP_END)
2507 case ISD::INTRINSIC_WO_CHAIN:
2508 case ISD::INTRINSIC_W_CHAIN:
2509 case ISD::INTRINSIC_VOID:
2510 // Allow the target to implement this method for its nodes.
2511 TLI->computeKnownBitsForTargetNode(Op, KnownZero, KnownOne, *this, Depth);
2515 assert((KnownZero & KnownOne) == 0 && "Bits known to be one AND zero?");
2518 /// ComputeNumSignBits - Return the number of times the sign bit of the
2519 /// register is replicated into the other bits. We know that at least 1 bit
2520 /// is always equal to the sign bit (itself), but other cases can give us
2521 /// information. For example, immediately after an "SRA X, 2", we know that
2522 /// the top 3 bits are all equal to each other, so we return 3.
2523 unsigned SelectionDAG::ComputeNumSignBits(SDValue Op, unsigned Depth) const{
2524 EVT VT = Op.getValueType();
2525 assert(VT.isInteger() && "Invalid VT!");
2526 unsigned VTBits = VT.getScalarType().getSizeInBits();
2528 unsigned FirstAnswer = 1;
2531 return 1; // Limit search depth.
2533 switch (Op.getOpcode()) {
2535 case ISD::AssertSext:
2536 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2537 return VTBits-Tmp+1;
2538 case ISD::AssertZext:
2539 Tmp = cast<VTSDNode>(Op.getOperand(1))->getVT().getSizeInBits();
2542 case ISD::Constant: {
2543 const APInt &Val = cast<ConstantSDNode>(Op)->getAPIntValue();
2544 return Val.getNumSignBits();
2547 case ISD::SIGN_EXTEND:
2549 VTBits-Op.getOperand(0).getValueType().getScalarType().getSizeInBits();
2550 return ComputeNumSignBits(Op.getOperand(0), Depth+1) + Tmp;
2552 case ISD::SIGN_EXTEND_INREG:
2553 // Max of the input and what this extends.
2555 cast<VTSDNode>(Op.getOperand(1))->getVT().getScalarType().getSizeInBits();
2558 Tmp2 = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2559 return std::max(Tmp, Tmp2);
2562 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2563 // SRA X, C -> adds C sign bits.
2564 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2565 Tmp += C->getZExtValue();
2566 if (Tmp > VTBits) Tmp = VTBits;
2570 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2571 // shl destroys sign bits.
2572 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2573 if (C->getZExtValue() >= VTBits || // Bad shift.
2574 C->getZExtValue() >= Tmp) break; // Shifted all sign bits out.
2575 return Tmp - C->getZExtValue();
2580 case ISD::XOR: // NOT is handled here.
2581 // Logical binary ops preserve the number of sign bits at the worst.
2582 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2584 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2585 FirstAnswer = std::min(Tmp, Tmp2);
2586 // We computed what we know about the sign bits as our first
2587 // answer. Now proceed to the generic code that uses
2588 // computeKnownBits, and pick whichever answer is better.
2593 Tmp = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2594 if (Tmp == 1) return 1; // Early out.
2595 Tmp2 = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2596 return std::min(Tmp, Tmp2);
2597 case ISD::SELECT_CC:
2598 Tmp = ComputeNumSignBits(Op.getOperand(2), Depth+1);
2599 if (Tmp == 1) return 1; // Early out.
2600 Tmp2 = ComputeNumSignBits(Op.getOperand(3), Depth+1);
2601 return std::min(Tmp, Tmp2);
2606 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth + 1);
2608 return 1; // Early out.
2609 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth + 1);
2610 return std::min(Tmp, Tmp2);
2617 if (Op.getResNo() != 1)
2619 // The boolean result conforms to getBooleanContents. Fall through.
2620 // If setcc returns 0/-1, all bits are sign bits.
2621 // We know that we have an integer-based boolean since these operations
2622 // are only available for integer.
2623 if (TLI->getBooleanContents(Op.getValueType().isVector(), false) ==
2624 TargetLowering::ZeroOrNegativeOneBooleanContent)
2628 // If setcc returns 0/-1, all bits are sign bits.
2629 if (TLI->getBooleanContents(Op.getOperand(0).getValueType()) ==
2630 TargetLowering::ZeroOrNegativeOneBooleanContent)
2635 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1))) {
2636 unsigned RotAmt = C->getZExtValue() & (VTBits-1);
2638 // Handle rotate right by N like a rotate left by 32-N.
2639 if (Op.getOpcode() == ISD::ROTR)
2640 RotAmt = (VTBits-RotAmt) & (VTBits-1);
2642 // If we aren't rotating out all of the known-in sign bits, return the
2643 // number that are left. This handles rotl(sext(x), 1) for example.
2644 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2645 if (Tmp > RotAmt+1) return Tmp-RotAmt;
2649 // Add can have at most one carry bit. Thus we know that the output
2650 // is, at worst, one more bit than the inputs.
2651 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2652 if (Tmp == 1) return 1; // Early out.
2654 // Special case decrementing a value (ADD X, -1):
2655 if (ConstantSDNode *CRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2656 if (CRHS->isAllOnesValue()) {
2657 APInt KnownZero, KnownOne;
2658 computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, Depth+1);
2660 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2662 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2665 // If we are subtracting one from a positive number, there is no carry
2666 // out of the result.
2667 if (KnownZero.isNegative())
2671 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2672 if (Tmp2 == 1) return 1;
2673 return std::min(Tmp, Tmp2)-1;
2676 Tmp2 = ComputeNumSignBits(Op.getOperand(1), Depth+1);
2677 if (Tmp2 == 1) return 1;
2680 if (ConstantSDNode *CLHS = dyn_cast<ConstantSDNode>(Op.getOperand(0)))
2681 if (CLHS->isNullValue()) {
2682 APInt KnownZero, KnownOne;
2683 computeKnownBits(Op.getOperand(1), KnownZero, KnownOne, Depth+1);
2684 // If the input is known to be 0 or 1, the output is 0/-1, which is all
2686 if ((KnownZero | APInt(VTBits, 1)).isAllOnesValue())
2689 // If the input is known to be positive (the sign bit is known clear),
2690 // the output of the NEG has the same number of sign bits as the input.
2691 if (KnownZero.isNegative())
2694 // Otherwise, we treat this like a SUB.
2697 // Sub can have at most one carry bit. Thus we know that the output
2698 // is, at worst, one more bit than the inputs.
2699 Tmp = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2700 if (Tmp == 1) return 1; // Early out.
2701 return std::min(Tmp, Tmp2)-1;
2703 // FIXME: it's tricky to do anything useful for this, but it is an important
2704 // case for targets like X86.
2706 case ISD::EXTRACT_ELEMENT: {
2707 const int KnownSign = ComputeNumSignBits(Op.getOperand(0), Depth+1);
2708 const int BitWidth = Op.getValueType().getSizeInBits();
2710 Op.getOperand(0).getValueType().getSizeInBits() / BitWidth;
2712 // Get reverse index (starting from 1), Op1 value indexes elements from
2713 // little end. Sign starts at big end.
2714 const int rIndex = Items - 1 -
2715 cast<ConstantSDNode>(Op.getOperand(1))->getZExtValue();
2717 // If the sign portion ends in our element the subtraction gives correct
2718 // result. Otherwise it gives either negative or > bitwidth result
2719 return std::max(std::min(KnownSign - rIndex * BitWidth, BitWidth), 0);
2723 // If we are looking at the loaded value of the SDNode.
2724 if (Op.getResNo() == 0) {
2725 // Handle LOADX separately here. EXTLOAD case will fallthrough.
2726 if (LoadSDNode *LD = dyn_cast<LoadSDNode>(Op)) {
2727 unsigned ExtType = LD->getExtensionType();
2730 case ISD::SEXTLOAD: // '17' bits known
2731 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2732 return VTBits-Tmp+1;
2733 case ISD::ZEXTLOAD: // '16' bits known
2734 Tmp = LD->getMemoryVT().getScalarType().getSizeInBits();
2740 // Allow the target to implement this method for its nodes.
2741 if (Op.getOpcode() >= ISD::BUILTIN_OP_END ||
2742 Op.getOpcode() == ISD::INTRINSIC_WO_CHAIN ||
2743 Op.getOpcode() == ISD::INTRINSIC_W_CHAIN ||
2744 Op.getOpcode() == ISD::INTRINSIC_VOID) {
2745 unsigned NumBits = TLI->ComputeNumSignBitsForTargetNode(Op, *this, Depth);
2746 if (NumBits > 1) FirstAnswer = std::max(FirstAnswer, NumBits);
2749 // Finally, if we can prove that the top bits of the result are 0's or 1's,
2750 // use this information.
2751 APInt KnownZero, KnownOne;
2752 computeKnownBits(Op, KnownZero, KnownOne, Depth);
2755 if (KnownZero.isNegative()) { // sign bit is 0
2757 } else if (KnownOne.isNegative()) { // sign bit is 1;
2764 // Okay, we know that the sign bit in Mask is set. Use CLZ to determine
2765 // the number of identical bits in the top of the input value.
2767 Mask <<= Mask.getBitWidth()-VTBits;
2768 // Return # leading zeros. We use 'min' here in case Val was zero before
2769 // shifting. We don't want to return '64' as for an i32 "0".
2770 return std::max(FirstAnswer, std::min(VTBits, Mask.countLeadingZeros()));
2773 /// isBaseWithConstantOffset - Return true if the specified operand is an
2774 /// ISD::ADD with a ConstantSDNode on the right-hand side, or if it is an
2775 /// ISD::OR with a ConstantSDNode that is guaranteed to have the same
2776 /// semantics as an ADD. This handles the equivalence:
2777 /// X|Cst == X+Cst iff X&Cst = 0.
2778 bool SelectionDAG::isBaseWithConstantOffset(SDValue Op) const {
2779 if ((Op.getOpcode() != ISD::ADD && Op.getOpcode() != ISD::OR) ||
2780 !isa<ConstantSDNode>(Op.getOperand(1)))
2783 if (Op.getOpcode() == ISD::OR &&
2784 !MaskedValueIsZero(Op.getOperand(0),
2785 cast<ConstantSDNode>(Op.getOperand(1))->getAPIntValue()))
2792 bool SelectionDAG::isKnownNeverNaN(SDValue Op) const {
2793 // If we're told that NaNs won't happen, assume they won't.
2794 if (getTarget().Options.NoNaNsFPMath)
2797 // If the value is a constant, we can obviously see if it is a NaN or not.
2798 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2799 return !C->getValueAPF().isNaN();
2801 // TODO: Recognize more cases here.
2806 bool SelectionDAG::isKnownNeverZero(SDValue Op) const {
2807 // If the value is a constant, we can obviously see if it is a zero or not.
2808 if (const ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Op))
2809 return !C->isZero();
2811 // TODO: Recognize more cases here.
2812 switch (Op.getOpcode()) {
2815 if (const ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
2816 return !C->isNullValue();
2823 bool SelectionDAG::isEqualTo(SDValue A, SDValue B) const {
2824 // Check the obvious case.
2825 if (A == B) return true;
2827 // For for negative and positive zero.
2828 if (const ConstantFPSDNode *CA = dyn_cast<ConstantFPSDNode>(A))
2829 if (const ConstantFPSDNode *CB = dyn_cast<ConstantFPSDNode>(B))
2830 if (CA->isZero() && CB->isZero()) return true;
2832 // Otherwise they may not be equal.
2836 bool SelectionDAG::haveNoCommonBitsSet(SDValue A, SDValue B) const {
2837 assert(A.getValueType() == B.getValueType() &&
2838 "Values must have the same type");
2841 computeKnownBits(A, AZero, AOne);
2842 computeKnownBits(B, BZero, BOne);
2843 return (AZero | BZero).isAllOnesValue();
2846 /// getNode - Gets or creates the specified node.
2848 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT) {
2849 FoldingSetNodeID ID;
2850 AddNodeIDNode(ID, Opcode, getVTList(VT), None);
2852 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
2853 return SDValue(E, 0);
2855 SDNode *N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(),
2856 DL.getDebugLoc(), getVTList(VT));
2857 CSEMap.InsertNode(N, IP);
2860 return SDValue(N, 0);
2863 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
2864 EVT VT, SDValue Operand) {
2865 // Constant fold unary operations with an integer constant operand. Even
2866 // opaque constant will be folded, because the folding of unary operations
2867 // doesn't create new constants with different values. Nevertheless, the
2868 // opaque flag is preserved during folding to prevent future folding with
2870 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Operand)) {
2871 const APInt &Val = C->getAPIntValue();
2874 case ISD::SIGN_EXTEND:
2875 return getConstant(Val.sextOrTrunc(VT.getSizeInBits()), DL, VT,
2876 C->isTargetOpcode(), C->isOpaque());
2877 case ISD::ANY_EXTEND:
2878 case ISD::ZERO_EXTEND:
2880 return getConstant(Val.zextOrTrunc(VT.getSizeInBits()), DL, VT,
2881 C->isTargetOpcode(), C->isOpaque());
2882 case ISD::UINT_TO_FP:
2883 case ISD::SINT_TO_FP: {
2884 APFloat apf(EVTToAPFloatSemantics(VT),
2885 APInt::getNullValue(VT.getSizeInBits()));
2886 (void)apf.convertFromAPInt(Val,
2887 Opcode==ISD::SINT_TO_FP,
2888 APFloat::rmNearestTiesToEven);
2889 return getConstantFP(apf, DL, VT);
2892 if (VT == MVT::f16 && C->getValueType(0) == MVT::i16)
2893 return getConstantFP(APFloat(APFloat::IEEEhalf, Val), DL, VT);
2894 if (VT == MVT::f32 && C->getValueType(0) == MVT::i32)
2895 return getConstantFP(APFloat(APFloat::IEEEsingle, Val), DL, VT);
2896 else if (VT == MVT::f64 && C->getValueType(0) == MVT::i64)
2897 return getConstantFP(APFloat(APFloat::IEEEdouble, Val), DL, VT);
2900 return getConstant(Val.byteSwap(), DL, VT, C->isTargetOpcode(),
2903 return getConstant(Val.countPopulation(), DL, VT, C->isTargetOpcode(),
2906 case ISD::CTLZ_ZERO_UNDEF:
2907 return getConstant(Val.countLeadingZeros(), DL, VT, C->isTargetOpcode(),
2910 case ISD::CTTZ_ZERO_UNDEF:
2911 return getConstant(Val.countTrailingZeros(), DL, VT, C->isTargetOpcode(),
2916 // Constant fold unary operations with a floating point constant operand.
2917 if (ConstantFPSDNode *C = dyn_cast<ConstantFPSDNode>(Operand)) {
2918 APFloat V = C->getValueAPF(); // make copy
2922 return getConstantFP(V, DL, VT);
2925 return getConstantFP(V, DL, VT);
2927 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardPositive);
2928 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2929 return getConstantFP(V, DL, VT);
2933 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardZero);
2934 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2935 return getConstantFP(V, DL, VT);
2939 APFloat::opStatus fs = V.roundToIntegral(APFloat::rmTowardNegative);
2940 if (fs == APFloat::opOK || fs == APFloat::opInexact)
2941 return getConstantFP(V, DL, VT);
2944 case ISD::FP_EXTEND: {
2946 // This can return overflow, underflow, or inexact; we don't care.
2947 // FIXME need to be more flexible about rounding mode.
2948 (void)V.convert(EVTToAPFloatSemantics(VT),
2949 APFloat::rmNearestTiesToEven, &ignored);
2950 return getConstantFP(V, DL, VT);
2952 case ISD::FP_TO_SINT:
2953 case ISD::FP_TO_UINT: {
2956 static_assert(integerPartWidth >= 64, "APFloat parts too small!");
2957 // FIXME need to be more flexible about rounding mode.
2958 APFloat::opStatus s = V.convertToInteger(x, VT.getSizeInBits(),
2959 Opcode==ISD::FP_TO_SINT,
2960 APFloat::rmTowardZero, &ignored);
2961 if (s==APFloat::opInvalidOp) // inexact is OK, in fact usual
2963 APInt api(VT.getSizeInBits(), x);
2964 return getConstant(api, DL, VT);
2967 if (VT == MVT::i16 && C->getValueType(0) == MVT::f16)
2968 return getConstant((uint16_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2969 else if (VT == MVT::i32 && C->getValueType(0) == MVT::f32)
2970 return getConstant((uint32_t)V.bitcastToAPInt().getZExtValue(), DL, VT);
2971 else if (VT == MVT::i64 && C->getValueType(0) == MVT::f64)
2972 return getConstant(V.bitcastToAPInt().getZExtValue(), DL, VT);
2977 // Constant fold unary operations with a vector integer or float operand.
2978 if (BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Operand)) {
2979 if (BV->isConstant()) {
2982 // FIXME: Entirely reasonable to perform folding of other unary
2983 // operations here as the need arises.
2990 case ISD::FP_EXTEND:
2991 case ISD::FP_TO_SINT:
2992 case ISD::FP_TO_UINT:
2994 case ISD::UINT_TO_FP:
2995 case ISD::SINT_TO_FP:
2998 case ISD::CTLZ_ZERO_UNDEF:
3000 case ISD::CTTZ_ZERO_UNDEF:
3002 SDValue Ops = { Operand };
3003 if (SDValue Fold = FoldConstantVectorArithmetic(Opcode, DL, VT, Ops))
3010 unsigned OpOpcode = Operand.getNode()->getOpcode();
3012 case ISD::TokenFactor:
3013 case ISD::MERGE_VALUES:
3014 case ISD::CONCAT_VECTORS:
3015 return Operand; // Factor, merge or concat of one node? No need.
3016 case ISD::FP_ROUND: llvm_unreachable("Invalid method to make FP_ROUND node");
3017 case ISD::FP_EXTEND:
3018 assert(VT.isFloatingPoint() &&
3019 Operand.getValueType().isFloatingPoint() && "Invalid FP cast!");
3020 if (Operand.getValueType() == VT) return Operand; // noop conversion.
3021 assert((!VT.isVector() ||
3022 VT.getVectorNumElements() ==
3023 Operand.getValueType().getVectorNumElements()) &&
3024 "Vector element count mismatch!");
3025 assert(Operand.getValueType().bitsLT(VT) &&
3026 "Invalid fpext node, dst < src!");
3027 if (Operand.getOpcode() == ISD::UNDEF)
3028 return getUNDEF(VT);
3030 case ISD::SIGN_EXTEND:
3031 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3032 "Invalid SIGN_EXTEND!");
3033 if (Operand.getValueType() == VT) return Operand; // noop extension
3034 assert((!VT.isVector() ||
3035 VT.getVectorNumElements() ==
3036 Operand.getValueType().getVectorNumElements()) &&
3037 "Vector element count mismatch!");
3038 assert(Operand.getValueType().bitsLT(VT) &&
3039 "Invalid sext node, dst < src!");
3040 if (OpOpcode == ISD::SIGN_EXTEND || OpOpcode == ISD::ZERO_EXTEND)
3041 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3042 else if (OpOpcode == ISD::UNDEF)
3043 // sext(undef) = 0, because the top bits will all be the same.
3044 return getConstant(0, DL, VT);
3046 case ISD::ZERO_EXTEND:
3047 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3048 "Invalid ZERO_EXTEND!");
3049 if (Operand.getValueType() == VT) return Operand; // noop extension
3050 assert((!VT.isVector() ||
3051 VT.getVectorNumElements() ==
3052 Operand.getValueType().getVectorNumElements()) &&
3053 "Vector element count mismatch!");
3054 assert(Operand.getValueType().bitsLT(VT) &&
3055 "Invalid zext node, dst < src!");
3056 if (OpOpcode == ISD::ZERO_EXTEND) // (zext (zext x)) -> (zext x)
3057 return getNode(ISD::ZERO_EXTEND, DL, VT,
3058 Operand.getNode()->getOperand(0));
3059 else if (OpOpcode == ISD::UNDEF)
3060 // zext(undef) = 0, because the top bits will be zero.
3061 return getConstant(0, DL, VT);
3063 case ISD::ANY_EXTEND:
3064 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3065 "Invalid ANY_EXTEND!");
3066 if (Operand.getValueType() == VT) return Operand; // noop extension
3067 assert((!VT.isVector() ||
3068 VT.getVectorNumElements() ==
3069 Operand.getValueType().getVectorNumElements()) &&
3070 "Vector element count mismatch!");
3071 assert(Operand.getValueType().bitsLT(VT) &&
3072 "Invalid anyext node, dst < src!");
3074 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3075 OpOpcode == ISD::ANY_EXTEND)
3076 // (ext (zext x)) -> (zext x) and (ext (sext x)) -> (sext x)
3077 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3078 else if (OpOpcode == ISD::UNDEF)
3079 return getUNDEF(VT);
3081 // (ext (trunx x)) -> x
3082 if (OpOpcode == ISD::TRUNCATE) {
3083 SDValue OpOp = Operand.getNode()->getOperand(0);
3084 if (OpOp.getValueType() == VT)
3089 assert(VT.isInteger() && Operand.getValueType().isInteger() &&
3090 "Invalid TRUNCATE!");
3091 if (Operand.getValueType() == VT) return Operand; // noop truncate
3092 assert((!VT.isVector() ||
3093 VT.getVectorNumElements() ==
3094 Operand.getValueType().getVectorNumElements()) &&
3095 "Vector element count mismatch!");
3096 assert(Operand.getValueType().bitsGT(VT) &&
3097 "Invalid truncate node, src < dst!");
3098 if (OpOpcode == ISD::TRUNCATE)
3099 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3100 if (OpOpcode == ISD::ZERO_EXTEND || OpOpcode == ISD::SIGN_EXTEND ||
3101 OpOpcode == ISD::ANY_EXTEND) {
3102 // If the source is smaller than the dest, we still need an extend.
3103 if (Operand.getNode()->getOperand(0).getValueType().getScalarType()
3104 .bitsLT(VT.getScalarType()))
3105 return getNode(OpOpcode, DL, VT, Operand.getNode()->getOperand(0));
3106 if (Operand.getNode()->getOperand(0).getValueType().bitsGT(VT))
3107 return getNode(ISD::TRUNCATE, DL, VT, Operand.getNode()->getOperand(0));
3108 return Operand.getNode()->getOperand(0);
3110 if (OpOpcode == ISD::UNDEF)
3111 return getUNDEF(VT);
3114 assert(VT.isInteger() && VT == Operand.getValueType() &&
3116 assert((VT.getScalarSizeInBits() % 16 == 0) &&
3117 "BSWAP types must be a multiple of 16 bits!");
3118 if (OpOpcode == ISD::UNDEF)
3119 return getUNDEF(VT);
3122 // Basic sanity checking.
3123 assert(VT.getSizeInBits() == Operand.getValueType().getSizeInBits()
3124 && "Cannot BITCAST between types of different sizes!");
3125 if (VT == Operand.getValueType()) return Operand; // noop conversion.
3126 if (OpOpcode == ISD::BITCAST) // bitconv(bitconv(x)) -> bitconv(x)
3127 return getNode(ISD::BITCAST, DL, VT, Operand.getOperand(0));
3128 if (OpOpcode == ISD::UNDEF)
3129 return getUNDEF(VT);
3131 case ISD::SCALAR_TO_VECTOR:
3132 assert(VT.isVector() && !Operand.getValueType().isVector() &&
3133 (VT.getVectorElementType() == Operand.getValueType() ||
3134 (VT.getVectorElementType().isInteger() &&
3135 Operand.getValueType().isInteger() &&
3136 VT.getVectorElementType().bitsLE(Operand.getValueType()))) &&
3137 "Illegal SCALAR_TO_VECTOR node!");
3138 if (OpOpcode == ISD::UNDEF)
3139 return getUNDEF(VT);
3140 // scalar_to_vector(extract_vector_elt V, 0) -> V, top bits are undefined.
3141 if (OpOpcode == ISD::EXTRACT_VECTOR_ELT &&
3142 isa<ConstantSDNode>(Operand.getOperand(1)) &&
3143 Operand.getConstantOperandVal(1) == 0 &&
3144 Operand.getOperand(0).getValueType() == VT)
3145 return Operand.getOperand(0);
3148 // -(X-Y) -> (Y-X) is unsafe because when X==Y, -0.0 != +0.0
3149 if (getTarget().Options.UnsafeFPMath && OpOpcode == ISD::FSUB)
3150 // FIXME: FNEG has no fast-math-flags to propagate; use the FSUB's flags?
3151 return getNode(ISD::FSUB, DL, VT, Operand.getNode()->getOperand(1),
3152 Operand.getNode()->getOperand(0),
3153 &cast<BinaryWithFlagsSDNode>(Operand.getNode())->Flags);
3154 if (OpOpcode == ISD::FNEG) // --X -> X
3155 return Operand.getNode()->getOperand(0);
3158 if (OpOpcode == ISD::FNEG) // abs(-X) -> abs(X)
3159 return getNode(ISD::FABS, DL, VT, Operand.getNode()->getOperand(0));
3164 SDVTList VTs = getVTList(VT);
3165 if (VT != MVT::Glue) { // Don't CSE flag producing nodes
3166 FoldingSetNodeID ID;
3167 SDValue Ops[1] = { Operand };
3168 AddNodeIDNode(ID, Opcode, VTs, Ops);
3170 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3171 return SDValue(E, 0);
3173 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3174 DL.getDebugLoc(), VTs, Operand);
3175 CSEMap.InsertNode(N, IP);
3177 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
3178 DL.getDebugLoc(), VTs, Operand);
3182 return SDValue(N, 0);
3185 static std::pair<APInt, bool> FoldValue(unsigned Opcode, const APInt &C1,
3188 case ISD::ADD: return std::make_pair(C1 + C2, true);
3189 case ISD::SUB: return std::make_pair(C1 - C2, true);
3190 case ISD::MUL: return std::make_pair(C1 * C2, true);
3191 case ISD::AND: return std::make_pair(C1 & C2, true);
3192 case ISD::OR: return std::make_pair(C1 | C2, true);
3193 case ISD::XOR: return std::make_pair(C1 ^ C2, true);
3194 case ISD::SHL: return std::make_pair(C1 << C2, true);
3195 case ISD::SRL: return std::make_pair(C1.lshr(C2), true);
3196 case ISD::SRA: return std::make_pair(C1.ashr(C2), true);
3197 case ISD::ROTL: return std::make_pair(C1.rotl(C2), true);
3198 case ISD::ROTR: return std::make_pair(C1.rotr(C2), true);
3199 case ISD::SMIN: return std::make_pair(C1.sle(C2) ? C1 : C2, true);
3200 case ISD::SMAX: return std::make_pair(C1.sge(C2) ? C1 : C2, true);
3201 case ISD::UMIN: return std::make_pair(C1.ule(C2) ? C1 : C2, true);
3202 case ISD::UMAX: return std::make_pair(C1.uge(C2) ? C1 : C2, true);
3204 if (!C2.getBoolValue())
3206 return std::make_pair(C1.udiv(C2), true);
3208 if (!C2.getBoolValue())
3210 return std::make_pair(C1.urem(C2), true);
3212 if (!C2.getBoolValue())
3214 return std::make_pair(C1.sdiv(C2), true);
3216 if (!C2.getBoolValue())
3218 return std::make_pair(C1.srem(C2), true);
3220 return std::make_pair(APInt(1, 0), false);
3223 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3224 const ConstantSDNode *Cst1,
3225 const ConstantSDNode *Cst2) {
3226 if (Cst1->isOpaque() || Cst2->isOpaque())
3229 std::pair<APInt, bool> Folded = FoldValue(Opcode, Cst1->getAPIntValue(),
3230 Cst2->getAPIntValue());
3233 return getConstant(Folded.first, DL, VT);
3236 SDValue SelectionDAG::FoldConstantArithmetic(unsigned Opcode, SDLoc DL, EVT VT,
3237 SDNode *Cst1, SDNode *Cst2) {
3238 // If the opcode is a target-specific ISD node, there's nothing we can
3239 // do here and the operand rules may not line up with the below, so
3241 if (Opcode >= ISD::BUILTIN_OP_END)
3244 // Handle the case of two scalars.
3245 if (const ConstantSDNode *Scalar1 = dyn_cast<ConstantSDNode>(Cst1)) {
3246 if (const ConstantSDNode *Scalar2 = dyn_cast<ConstantSDNode>(Cst2)) {
3247 if (SDValue Folded =
3248 FoldConstantArithmetic(Opcode, DL, VT, Scalar1, Scalar2)) {
3251 SmallVector<SDValue, 4> Outputs;
3252 // We may have a vector type but a scalar result. Create a splat.
3253 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3254 // Build a big vector out of the scalar elements we generated.
3255 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3262 // For vectors extract each constant element into Inputs so we can constant
3263 // fold them individually.
3264 BuildVectorSDNode *BV1 = dyn_cast<BuildVectorSDNode>(Cst1);
3265 BuildVectorSDNode *BV2 = dyn_cast<BuildVectorSDNode>(Cst2);
3269 assert(BV1->getNumOperands() == BV2->getNumOperands() && "Out of sync!");
3271 EVT SVT = VT.getScalarType();
3272 SmallVector<SDValue, 4> Outputs;
3273 for (unsigned I = 0, E = BV1->getNumOperands(); I != E; ++I) {
3274 ConstantSDNode *V1 = dyn_cast<ConstantSDNode>(BV1->getOperand(I));
3275 ConstantSDNode *V2 = dyn_cast<ConstantSDNode>(BV2->getOperand(I));
3276 if (!V1 || !V2) // Not a constant, bail.
3279 if (V1->isOpaque() || V2->isOpaque())
3282 // Avoid BUILD_VECTOR nodes that perform implicit truncation.
3283 // FIXME: This is valid and could be handled by truncating the APInts.
3284 if (V1->getValueType(0) != SVT || V2->getValueType(0) != SVT)
3287 // Fold one vector element.
3288 std::pair<APInt, bool> Folded = FoldValue(Opcode, V1->getAPIntValue(),
3289 V2->getAPIntValue());
3292 Outputs.push_back(getConstant(Folded.first, DL, SVT));
3295 assert(VT.getVectorNumElements() == Outputs.size() &&
3296 "Vector size mismatch!");
3298 // We may have a vector type but a scalar result. Create a splat.
3299 Outputs.resize(VT.getVectorNumElements(), Outputs.back());
3301 // Build a big vector out of the scalar elements we generated.
3302 return getNode(ISD::BUILD_VECTOR, SDLoc(), VT, Outputs);
3305 SDValue SelectionDAG::FoldConstantVectorArithmetic(unsigned Opcode, SDLoc DL,
3307 ArrayRef<SDValue> Ops,
3308 const SDNodeFlags *Flags) {
3309 // If the opcode is a target-specific ISD node, there's nothing we can
3310 // do here and the operand rules may not line up with the below, so
3312 if (Opcode >= ISD::BUILTIN_OP_END)
3315 // We can only fold vectors - maybe merge with FoldConstantArithmetic someday?
3319 unsigned NumElts = VT.getVectorNumElements();
3321 auto IsSameVectorSize = [&](const SDValue &Op) {
3322 return Op.getValueType().isVector() &&
3323 Op.getValueType().getVectorNumElements() == NumElts;
3326 auto IsConstantBuildVectorOrUndef = [&](const SDValue &Op) {
3327 BuildVectorSDNode *BV = dyn_cast<BuildVectorSDNode>(Op);
3328 return (Op.getOpcode() == ISD::UNDEF) || (BV && BV->isConstant());
3331 // All operands must be vector types with the same number of elements as
3332 // the result type and must be either UNDEF or a build vector of constant
3333 // or UNDEF scalars.
3334 if (!std::all_of(Ops.begin(), Ops.end(), IsConstantBuildVectorOrUndef) ||
3335 !std::all_of(Ops.begin(), Ops.end(), IsSameVectorSize))
3338 // Find legal integer scalar type for constant promotion and
3339 // ensure that its scalar size is at least as large as source.
3340 EVT SVT = VT.getScalarType();
3342 if (SVT.isInteger()) {
3343 LegalSVT = TLI->getTypeToTransformTo(*getContext(), SVT);
3344 if (LegalSVT.bitsLT(SVT))
3348 // Constant fold each scalar lane separately.
3349 SmallVector<SDValue, 4> ScalarResults;
3350 for (unsigned i = 0; i != NumElts; i++) {
3351 SmallVector<SDValue, 4> ScalarOps;
3352 for (SDValue Op : Ops) {
3353 EVT InSVT = Op.getValueType().getScalarType();
3354 BuildVectorSDNode *InBV = dyn_cast<BuildVectorSDNode>(Op);
3356 // We've checked that this is UNDEF above.
3357 ScalarOps.push_back(getUNDEF(InSVT));
3361 SDValue ScalarOp = InBV->getOperand(i);
3362 EVT ScalarVT = ScalarOp.getValueType();
3364 // Build vector (integer) scalar operands may need implicit
3365 // truncation - do this before constant folding.
3366 if (ScalarVT.isInteger() && ScalarVT.bitsGT(InSVT))
3367 ScalarOp = getNode(ISD::TRUNCATE, DL, InSVT, ScalarOp);
3369 ScalarOps.push_back(ScalarOp);
3372 // Constant fold the scalar operands.
3373 SDValue ScalarResult = getNode(Opcode, DL, SVT, ScalarOps, Flags);
3375 // Legalize the (integer) scalar constant if necessary.
3376 if (LegalSVT != SVT)
3377 ScalarResult = getNode(ISD::ANY_EXTEND, DL, LegalSVT, ScalarResult);
3379 // Scalar folding only succeeded if the result is a constant or UNDEF.
3380 if (ScalarResult.getOpcode() != ISD::UNDEF &&
3381 ScalarResult.getOpcode() != ISD::Constant &&
3382 ScalarResult.getOpcode() != ISD::ConstantFP)
3384 ScalarResults.push_back(ScalarResult);
3387 assert(ScalarResults.size() == NumElts &&
3388 "Unexpected number of scalar results for BUILD_VECTOR");
3389 return getNode(ISD::BUILD_VECTOR, DL, VT, ScalarResults);
3392 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1,
3393 SDValue N2, const SDNodeFlags *Flags) {
3394 ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1);
3395 ConstantSDNode *N2C = dyn_cast<ConstantSDNode>(N2);
3396 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3397 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3399 // Canonicalize constant to RHS if commutative.
3400 if (isCommutativeBinOp(Opcode)) {
3402 std::swap(N1C, N2C);
3404 } else if (N1CFP && !N2CFP) {
3405 std::swap(N1CFP, N2CFP);
3412 case ISD::TokenFactor:
3413 assert(VT == MVT::Other && N1.getValueType() == MVT::Other &&
3414 N2.getValueType() == MVT::Other && "Invalid token factor!");
3415 // Fold trivial token factors.
3416 if (N1.getOpcode() == ISD::EntryToken) return N2;
3417 if (N2.getOpcode() == ISD::EntryToken) return N1;
3418 if (N1 == N2) return N1;
3420 case ISD::CONCAT_VECTORS:
3421 // Concat of UNDEFs is UNDEF.
3422 if (N1.getOpcode() == ISD::UNDEF &&
3423 N2.getOpcode() == ISD::UNDEF)
3424 return getUNDEF(VT);
3426 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3427 // one big BUILD_VECTOR.
3428 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3429 N2.getOpcode() == ISD::BUILD_VECTOR) {
3430 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3431 N1.getNode()->op_end());
3432 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3434 // BUILD_VECTOR requires all inputs to be of the same type, find the
3435 // maximum type and extend them all.
3436 EVT SVT = VT.getScalarType();
3437 for (SDValue Op : Elts)
3438 SVT = (SVT.bitsLT(Op.getValueType()) ? Op.getValueType() : SVT);
3439 if (SVT.bitsGT(VT.getScalarType()))
3440 for (SDValue &Op : Elts)
3441 Op = TLI->isZExtFree(Op.getValueType(), SVT)
3442 ? getZExtOrTrunc(Op, DL, SVT)
3443 : getSExtOrTrunc(Op, DL, SVT);
3445 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3449 assert(VT.isInteger() && "This operator does not apply to FP types!");
3450 assert(N1.getValueType() == N2.getValueType() &&
3451 N1.getValueType() == VT && "Binary operator types must match!");
3452 // (X & 0) -> 0. This commonly occurs when legalizing i64 values, so it's
3453 // worth handling here.
3454 if (N2C && N2C->isNullValue())
3456 if (N2C && N2C->isAllOnesValue()) // X & -1 -> X
3463 assert(VT.isInteger() && "This operator does not apply to FP types!");
3464 assert(N1.getValueType() == N2.getValueType() &&
3465 N1.getValueType() == VT && "Binary operator types must match!");
3466 // (X ^|+- 0) -> X. This commonly occurs when legalizing i64 values, so
3467 // it's worth handling here.
3468 if (N2C && N2C->isNullValue())
3482 assert(VT.isInteger() && "This operator does not apply to FP types!");
3483 assert(N1.getValueType() == N2.getValueType() &&
3484 N1.getValueType() == VT && "Binary operator types must match!");
3491 if (getTarget().Options.UnsafeFPMath) {
3492 if (Opcode == ISD::FADD) {
3494 if (N2CFP && N2CFP->getValueAPF().isZero())
3496 } else if (Opcode == ISD::FSUB) {
3498 if (N2CFP && N2CFP->getValueAPF().isZero())
3500 } else if (Opcode == ISD::FMUL) {
3502 if (N2CFP && N2CFP->isZero())
3505 if (N2CFP && N2CFP->isExactlyValue(1.0))
3509 assert(VT.isFloatingPoint() && "This operator only applies to FP types!");
3510 assert(N1.getValueType() == N2.getValueType() &&
3511 N1.getValueType() == VT && "Binary operator types must match!");
3513 case ISD::FCOPYSIGN: // N1 and result must match. N1/N2 need not match.
3514 assert(N1.getValueType() == VT &&
3515 N1.getValueType().isFloatingPoint() &&
3516 N2.getValueType().isFloatingPoint() &&
3517 "Invalid FCOPYSIGN!");
3524 assert(VT == N1.getValueType() &&
3525 "Shift operators return type must be the same as their first arg");
3526 assert(VT.isInteger() && N2.getValueType().isInteger() &&
3527 "Shifts only work on integers");
3528 assert((!VT.isVector() || VT == N2.getValueType()) &&
3529 "Vector shift amounts must be in the same as their first arg");
3530 // Verify that the shift amount VT is bit enough to hold valid shift
3531 // amounts. This catches things like trying to shift an i1024 value by an
3532 // i8, which is easy to fall into in generic code that uses
3533 // TLI.getShiftAmount().
3534 assert(N2.getValueType().getSizeInBits() >=
3535 Log2_32_Ceil(N1.getValueType().getSizeInBits()) &&
3536 "Invalid use of small shift amount with oversized value!");
3538 // Always fold shifts of i1 values so the code generator doesn't need to
3539 // handle them. Since we know the size of the shift has to be less than the
3540 // size of the value, the shift/rotate count is guaranteed to be zero.
3543 if (N2C && N2C->isNullValue())
3546 case ISD::FP_ROUND_INREG: {
3547 EVT EVT = cast<VTSDNode>(N2)->getVT();
3548 assert(VT == N1.getValueType() && "Not an inreg round!");
3549 assert(VT.isFloatingPoint() && EVT.isFloatingPoint() &&
3550 "Cannot FP_ROUND_INREG integer types");
3551 assert(EVT.isVector() == VT.isVector() &&
3552 "FP_ROUND_INREG type should be vector iff the operand "
3554 assert((!EVT.isVector() ||
3555 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3556 "Vector element counts must match in FP_ROUND_INREG");
3557 assert(EVT.bitsLE(VT) && "Not rounding down!");
3559 if (cast<VTSDNode>(N2)->getVT() == VT) return N1; // Not actually rounding.
3563 assert(VT.isFloatingPoint() &&
3564 N1.getValueType().isFloatingPoint() &&
3565 VT.bitsLE(N1.getValueType()) &&
3566 N2C && "Invalid FP_ROUND!");
3567 if (N1.getValueType() == VT) return N1; // noop conversion.
3569 case ISD::AssertSext:
3570 case ISD::AssertZext: {
3571 EVT EVT = cast<VTSDNode>(N2)->getVT();
3572 assert(VT == N1.getValueType() && "Not an inreg extend!");
3573 assert(VT.isInteger() && EVT.isInteger() &&
3574 "Cannot *_EXTEND_INREG FP types");
3575 assert(!EVT.isVector() &&
3576 "AssertSExt/AssertZExt type should be the vector element type "
3577 "rather than the vector type!");
3578 assert(EVT.bitsLE(VT) && "Not extending!");
3579 if (VT == EVT) return N1; // noop assertion.
3582 case ISD::SIGN_EXTEND_INREG: {
3583 EVT EVT = cast<VTSDNode>(N2)->getVT();
3584 assert(VT == N1.getValueType() && "Not an inreg extend!");
3585 assert(VT.isInteger() && EVT.isInteger() &&
3586 "Cannot *_EXTEND_INREG FP types");
3587 assert(EVT.isVector() == VT.isVector() &&
3588 "SIGN_EXTEND_INREG type should be vector iff the operand "
3590 assert((!EVT.isVector() ||
3591 EVT.getVectorNumElements() == VT.getVectorNumElements()) &&
3592 "Vector element counts must match in SIGN_EXTEND_INREG");
3593 assert(EVT.bitsLE(VT) && "Not extending!");
3594 if (EVT == VT) return N1; // Not actually extending
3596 auto SignExtendInReg = [&](APInt Val) {
3597 unsigned FromBits = EVT.getScalarType().getSizeInBits();
3598 Val <<= Val.getBitWidth() - FromBits;
3599 Val = Val.ashr(Val.getBitWidth() - FromBits);
3600 return getConstant(Val, DL, VT.getScalarType());
3604 APInt Val = N1C->getAPIntValue();
3605 return SignExtendInReg(Val);
3607 if (ISD::isBuildVectorOfConstantSDNodes(N1.getNode())) {
3608 SmallVector<SDValue, 8> Ops;
3609 for (int i = 0, e = VT.getVectorNumElements(); i != e; ++i) {
3610 SDValue Op = N1.getOperand(i);
3611 if (Op.getOpcode() == ISD::UNDEF) {
3612 Ops.push_back(getUNDEF(VT.getScalarType()));
3615 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Op)) {
3616 APInt Val = C->getAPIntValue();
3617 Val = Val.zextOrTrunc(VT.getScalarSizeInBits());
3618 Ops.push_back(SignExtendInReg(Val));
3623 if (Ops.size() == VT.getVectorNumElements())
3624 return getNode(ISD::BUILD_VECTOR, DL, VT, Ops);
3628 case ISD::EXTRACT_VECTOR_ELT:
3629 // EXTRACT_VECTOR_ELT of an UNDEF is an UNDEF.
3630 if (N1.getOpcode() == ISD::UNDEF)
3631 return getUNDEF(VT);
3633 // EXTRACT_VECTOR_ELT of out-of-bounds element is an UNDEF
3634 if (N2C && N2C->getZExtValue() >= N1.getValueType().getVectorNumElements())
3635 return getUNDEF(VT);
3637 // EXTRACT_VECTOR_ELT of CONCAT_VECTORS is often formed while lowering is
3638 // expanding copies of large vectors from registers.
3640 N1.getOpcode() == ISD::CONCAT_VECTORS &&
3641 N1.getNumOperands() > 0) {
3643 N1.getOperand(0).getValueType().getVectorNumElements();
3644 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT,
3645 N1.getOperand(N2C->getZExtValue() / Factor),
3646 getConstant(N2C->getZExtValue() % Factor, DL,
3647 N2.getValueType()));
3650 // EXTRACT_VECTOR_ELT of BUILD_VECTOR is often formed while lowering is
3651 // expanding large vector constants.
3652 if (N2C && N1.getOpcode() == ISD::BUILD_VECTOR) {
3653 SDValue Elt = N1.getOperand(N2C->getZExtValue());
3655 if (VT != Elt.getValueType())
3656 // If the vector element type is not legal, the BUILD_VECTOR operands
3657 // are promoted and implicitly truncated, and the result implicitly
3658 // extended. Make that explicit here.
3659 Elt = getAnyExtOrTrunc(Elt, DL, VT);
3664 // EXTRACT_VECTOR_ELT of INSERT_VECTOR_ELT is often formed when vector
3665 // operations are lowered to scalars.
3666 if (N1.getOpcode() == ISD::INSERT_VECTOR_ELT) {
3667 // If the indices are the same, return the inserted element else
3668 // if the indices are known different, extract the element from
3669 // the original vector.
3670 SDValue N1Op2 = N1.getOperand(2);
3671 ConstantSDNode *N1Op2C = dyn_cast<ConstantSDNode>(N1Op2);
3673 if (N1Op2C && N2C) {
3674 if (N1Op2C->getZExtValue() == N2C->getZExtValue()) {
3675 if (VT == N1.getOperand(1).getValueType())
3676 return N1.getOperand(1);
3678 return getSExtOrTrunc(N1.getOperand(1), DL, VT);
3681 return getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, N1.getOperand(0), N2);
3685 case ISD::EXTRACT_ELEMENT:
3686 assert(N2C && (unsigned)N2C->getZExtValue() < 2 && "Bad EXTRACT_ELEMENT!");
3687 assert(!N1.getValueType().isVector() && !VT.isVector() &&
3688 (N1.getValueType().isInteger() == VT.isInteger()) &&
3689 N1.getValueType() != VT &&
3690 "Wrong types for EXTRACT_ELEMENT!");
3692 // EXTRACT_ELEMENT of BUILD_PAIR is often formed while legalize is expanding
3693 // 64-bit integers into 32-bit parts. Instead of building the extract of
3694 // the BUILD_PAIR, only to have legalize rip it apart, just do it now.
3695 if (N1.getOpcode() == ISD::BUILD_PAIR)
3696 return N1.getOperand(N2C->getZExtValue());
3698 // EXTRACT_ELEMENT of a constant int is also very common.
3700 unsigned ElementSize = VT.getSizeInBits();
3701 unsigned Shift = ElementSize * N2C->getZExtValue();
3702 APInt ShiftedVal = N1C->getAPIntValue().lshr(Shift);
3703 return getConstant(ShiftedVal.trunc(ElementSize), DL, VT);
3706 case ISD::EXTRACT_SUBVECTOR:
3707 if (VT.isSimple() && N1.getValueType().isSimple()) {
3708 assert(VT.isVector() && N1.getValueType().isVector() &&
3709 "Extract subvector VTs must be a vectors!");
3710 assert(VT.getVectorElementType() ==
3711 N1.getValueType().getVectorElementType() &&
3712 "Extract subvector VTs must have the same element type!");
3713 assert(VT.getSimpleVT() <= N1.getSimpleValueType() &&
3714 "Extract subvector must be from larger vector to smaller vector!");
3717 assert((VT.getVectorNumElements() + N2C->getZExtValue()
3718 <= N1.getValueType().getVectorNumElements())
3719 && "Extract subvector overflow!");
3722 // Trivial extraction.
3723 if (VT.getSimpleVT() == N1.getSimpleValueType())
3729 // Perform trivial constant folding.
3731 FoldConstantArithmetic(Opcode, DL, VT, N1.getNode(), N2.getNode()))
3734 // Constant fold FP operations.
3735 bool HasFPExceptions = TLI->hasFloatingPointExceptions();
3738 APFloat V1 = N1CFP->getValueAPF(), V2 = N2CFP->getValueAPF();
3739 APFloat::opStatus s;
3742 s = V1.add(V2, APFloat::rmNearestTiesToEven);
3743 if (!HasFPExceptions || s != APFloat::opInvalidOp)
3744 return getConstantFP(V1, DL, VT);
3747 s = V1.subtract(V2, APFloat::rmNearestTiesToEven);
3748 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3749 return getConstantFP(V1, DL, VT);
3752 s = V1.multiply(V2, APFloat::rmNearestTiesToEven);
3753 if (!HasFPExceptions || s!=APFloat::opInvalidOp)
3754 return getConstantFP(V1, DL, VT);
3757 s = V1.divide(V2, APFloat::rmNearestTiesToEven);
3758 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3759 s!=APFloat::opDivByZero)) {
3760 return getConstantFP(V1, DL, VT);
3765 if (!HasFPExceptions || (s!=APFloat::opInvalidOp &&
3766 s!=APFloat::opDivByZero)) {
3767 return getConstantFP(V1, DL, VT);
3770 case ISD::FCOPYSIGN:
3772 return getConstantFP(V1, DL, VT);
3777 if (Opcode == ISD::FP_ROUND) {
3778 APFloat V = N1CFP->getValueAPF(); // make copy
3780 // This can return overflow, underflow, or inexact; we don't care.
3781 // FIXME need to be more flexible about rounding mode.
3782 (void)V.convert(EVTToAPFloatSemantics(VT),
3783 APFloat::rmNearestTiesToEven, &ignored);
3784 return getConstantFP(V, DL, VT);
3788 // Canonicalize an UNDEF to the RHS, even over a constant.
3789 if (N1.getOpcode() == ISD::UNDEF) {
3790 if (isCommutativeBinOp(Opcode)) {
3794 case ISD::FP_ROUND_INREG:
3795 case ISD::SIGN_EXTEND_INREG:
3801 return N1; // fold op(undef, arg2) -> undef
3809 return getConstant(0, DL, VT); // fold op(undef, arg2) -> 0
3810 // For vectors, we can't easily build an all zero vector, just return
3817 // Fold a bunch of operators when the RHS is undef.
3818 if (N2.getOpcode() == ISD::UNDEF) {
3821 if (N1.getOpcode() == ISD::UNDEF)
3822 // Handle undef ^ undef -> 0 special case. This is a common
3824 return getConstant(0, DL, VT);
3834 return N2; // fold op(arg1, undef) -> undef
3840 if (getTarget().Options.UnsafeFPMath)
3848 return getConstant(0, DL, VT); // fold op(arg1, undef) -> 0
3849 // For vectors, we can't easily build an all zero vector, just return
3854 return getConstant(APInt::getAllOnesValue(VT.getSizeInBits()), DL, VT);
3855 // For vectors, we can't easily build an all one vector, just return
3863 // Memoize this node if possible.
3865 SDVTList VTs = getVTList(VT);
3866 if (VT != MVT::Glue) {
3867 SDValue Ops[] = {N1, N2};
3868 FoldingSetNodeID ID;
3869 AddNodeIDNode(ID, Opcode, VTs, Ops);
3870 AddNodeIDFlags(ID, Opcode, Flags);
3872 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3873 return SDValue(E, 0);
3875 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3877 CSEMap.InsertNode(N, IP);
3879 N = GetBinarySDNode(Opcode, DL, VTs, N1, N2, Flags);
3883 return SDValue(N, 0);
3886 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3887 SDValue N1, SDValue N2, SDValue N3) {
3888 // Perform various simplifications.
3891 ConstantFPSDNode *N1CFP = dyn_cast<ConstantFPSDNode>(N1);
3892 ConstantFPSDNode *N2CFP = dyn_cast<ConstantFPSDNode>(N2);
3893 ConstantFPSDNode *N3CFP = dyn_cast<ConstantFPSDNode>(N3);
3894 if (N1CFP && N2CFP && N3CFP) {
3895 APFloat V1 = N1CFP->getValueAPF();
3896 const APFloat &V2 = N2CFP->getValueAPF();
3897 const APFloat &V3 = N3CFP->getValueAPF();
3898 APFloat::opStatus s =
3899 V1.fusedMultiplyAdd(V2, V3, APFloat::rmNearestTiesToEven);
3900 if (!TLI->hasFloatingPointExceptions() || s != APFloat::opInvalidOp)
3901 return getConstantFP(V1, DL, VT);
3905 case ISD::CONCAT_VECTORS:
3906 // A CONCAT_VECTOR with all operands BUILD_VECTOR can be simplified to
3907 // one big BUILD_VECTOR.
3908 if (N1.getOpcode() == ISD::BUILD_VECTOR &&
3909 N2.getOpcode() == ISD::BUILD_VECTOR &&
3910 N3.getOpcode() == ISD::BUILD_VECTOR) {
3911 SmallVector<SDValue, 16> Elts(N1.getNode()->op_begin(),
3912 N1.getNode()->op_end());
3913 Elts.append(N2.getNode()->op_begin(), N2.getNode()->op_end());
3914 Elts.append(N3.getNode()->op_begin(), N3.getNode()->op_end());
3915 return getNode(ISD::BUILD_VECTOR, DL, VT, Elts);
3919 // Use FoldSetCC to simplify SETCC's.
3920 if (SDValue V = FoldSetCC(VT, N1, N2, cast<CondCodeSDNode>(N3)->get(), DL))
3925 if (ConstantSDNode *N1C = dyn_cast<ConstantSDNode>(N1)) {
3926 if (N1C->getZExtValue())
3927 return N2; // select true, X, Y -> X
3928 return N3; // select false, X, Y -> Y
3931 if (N2 == N3) return N2; // select C, X, X -> X
3933 case ISD::VECTOR_SHUFFLE:
3934 llvm_unreachable("should use getVectorShuffle constructor!");
3935 case ISD::INSERT_SUBVECTOR: {
3937 if (VT.isSimple() && N1.getValueType().isSimple()
3938 && N2.getValueType().isSimple()) {
3939 assert(VT.isVector() && N1.getValueType().isVector() &&
3940 N2.getValueType().isVector() &&
3941 "Insert subvector VTs must be a vectors");
3942 assert(VT == N1.getValueType() &&
3943 "Dest and insert subvector source types must match!");
3944 assert(N2.getSimpleValueType() <= N1.getSimpleValueType() &&
3945 "Insert subvector must be from smaller vector to larger vector!");
3946 if (isa<ConstantSDNode>(Index)) {
3947 assert((N2.getValueType().getVectorNumElements() +
3948 cast<ConstantSDNode>(Index)->getZExtValue()
3949 <= VT.getVectorNumElements())
3950 && "Insert subvector overflow!");
3953 // Trivial insertion.
3954 if (VT.getSimpleVT() == N2.getSimpleValueType())
3960 // Fold bit_convert nodes from a type to themselves.
3961 if (N1.getValueType() == VT)
3966 // Memoize node if it doesn't produce a flag.
3968 SDVTList VTs = getVTList(VT);
3969 if (VT != MVT::Glue) {
3970 SDValue Ops[] = { N1, N2, N3 };
3971 FoldingSetNodeID ID;
3972 AddNodeIDNode(ID, Opcode, VTs, Ops);
3974 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
3975 return SDValue(E, 0);
3977 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3978 DL.getDebugLoc(), VTs, N1, N2, N3);
3979 CSEMap.InsertNode(N, IP);
3981 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
3982 DL.getDebugLoc(), VTs, N1, N2, N3);
3986 return SDValue(N, 0);
3989 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3990 SDValue N1, SDValue N2, SDValue N3,
3992 SDValue Ops[] = { N1, N2, N3, N4 };
3993 return getNode(Opcode, DL, VT, Ops);
3996 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
3997 SDValue N1, SDValue N2, SDValue N3,
3998 SDValue N4, SDValue N5) {
3999 SDValue Ops[] = { N1, N2, N3, N4, N5 };
4000 return getNode(Opcode, DL, VT, Ops);
4003 /// getStackArgumentTokenFactor - Compute a TokenFactor to force all
4004 /// the incoming stack arguments to be loaded from the stack.
4005 SDValue SelectionDAG::getStackArgumentTokenFactor(SDValue Chain) {
4006 SmallVector<SDValue, 8> ArgChains;
4008 // Include the original chain at the beginning of the list. When this is
4009 // used by target LowerCall hooks, this helps legalize find the
4010 // CALLSEQ_BEGIN node.
4011 ArgChains.push_back(Chain);
4013 // Add a chain value for each stack argument.
4014 for (SDNode::use_iterator U = getEntryNode().getNode()->use_begin(),
4015 UE = getEntryNode().getNode()->use_end(); U != UE; ++U)
4016 if (LoadSDNode *L = dyn_cast<LoadSDNode>(*U))
4017 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(L->getBasePtr()))
4018 if (FI->getIndex() < 0)
4019 ArgChains.push_back(SDValue(L, 1));
4021 // Build a tokenfactor for all the chains.
4022 return getNode(ISD::TokenFactor, SDLoc(Chain), MVT::Other, ArgChains);
4025 /// getMemsetValue - Vectorized representation of the memset value
4027 static SDValue getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG,
4029 assert(Value.getOpcode() != ISD::UNDEF);
4031 unsigned NumBits = VT.getScalarType().getSizeInBits();
4032 if (ConstantSDNode *C = dyn_cast<ConstantSDNode>(Value)) {
4033 assert(C->getAPIntValue().getBitWidth() == 8);
4034 APInt Val = APInt::getSplat(NumBits, C->getAPIntValue());
4036 return DAG.getConstant(Val, dl, VT);
4037 return DAG.getConstantFP(APFloat(DAG.EVTToAPFloatSemantics(VT), Val), dl,
4041 assert(Value.getValueType() == MVT::i8 && "memset with non-byte fill value?");
4042 EVT IntVT = VT.getScalarType();
4043 if (!IntVT.isInteger())
4044 IntVT = EVT::getIntegerVT(*DAG.getContext(), IntVT.getSizeInBits());
4046 Value = DAG.getNode(ISD::ZERO_EXTEND, dl, IntVT, Value);
4048 // Use a multiplication with 0x010101... to extend the input to the
4050 APInt Magic = APInt::getSplat(NumBits, APInt(8, 0x01));
4051 Value = DAG.getNode(ISD::MUL, dl, IntVT, Value,
4052 DAG.getConstant(Magic, dl, IntVT));
4055 if (VT != Value.getValueType() && !VT.isInteger())
4056 Value = DAG.getNode(ISD::BITCAST, dl, VT.getScalarType(), Value);
4057 if (VT != Value.getValueType()) {
4058 assert(VT.getVectorElementType() == Value.getValueType() &&
4059 "value type should be one vector element here");
4060 SmallVector<SDValue, 8> BVOps(VT.getVectorNumElements(), Value);
4061 Value = DAG.getNode(ISD::BUILD_VECTOR, dl, VT, BVOps);
4067 /// getMemsetStringVal - Similar to getMemsetValue. Except this is only
4068 /// used when a memcpy is turned into a memset when the source is a constant
4070 static SDValue getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG,
4071 const TargetLowering &TLI, StringRef Str) {
4072 // Handle vector with all elements zero.
4075 return DAG.getConstant(0, dl, VT);
4076 else if (VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
4077 return DAG.getConstantFP(0.0, dl, VT);
4078 else if (VT.isVector()) {
4079 unsigned NumElts = VT.getVectorNumElements();
4080 MVT EltVT = (VT.getVectorElementType() == MVT::f32) ? MVT::i32 : MVT::i64;
4081 return DAG.getNode(ISD::BITCAST, dl, VT,
4082 DAG.getConstant(0, dl,
4083 EVT::getVectorVT(*DAG.getContext(),
4086 llvm_unreachable("Expected type!");
4089 assert(!VT.isVector() && "Can't handle vector type here!");
4090 unsigned NumVTBits = VT.getSizeInBits();
4091 unsigned NumVTBytes = NumVTBits / 8;
4092 unsigned NumBytes = std::min(NumVTBytes, unsigned(Str.size()));
4094 APInt Val(NumVTBits, 0);
4095 if (DAG.getDataLayout().isLittleEndian()) {
4096 for (unsigned i = 0; i != NumBytes; ++i)
4097 Val |= (uint64_t)(unsigned char)Str[i] << i*8;
4099 for (unsigned i = 0; i != NumBytes; ++i)
4100 Val |= (uint64_t)(unsigned char)Str[i] << (NumVTBytes-i-1)*8;
4103 // If the "cost" of materializing the integer immediate is less than the cost
4104 // of a load, then it is cost effective to turn the load into the immediate.
4105 Type *Ty = VT.getTypeForEVT(*DAG.getContext());
4106 if (TLI.shouldConvertConstantLoadToIntImm(Val, Ty))
4107 return DAG.getConstant(Val, dl, VT);
4108 return SDValue(nullptr, 0);
4111 /// getMemBasePlusOffset - Returns base and offset node for the
4113 static SDValue getMemBasePlusOffset(SDValue Base, unsigned Offset, SDLoc dl,
4114 SelectionDAG &DAG) {
4115 EVT VT = Base.getValueType();
4116 return DAG.getNode(ISD::ADD, dl,
4117 VT, Base, DAG.getConstant(Offset, dl, VT));
4120 /// isMemSrcFromString - Returns true if memcpy source is a string constant.
4122 static bool isMemSrcFromString(SDValue Src, StringRef &Str) {
4123 unsigned SrcDelta = 0;
4124 GlobalAddressSDNode *G = nullptr;
4125 if (Src.getOpcode() == ISD::GlobalAddress)
4126 G = cast<GlobalAddressSDNode>(Src);
4127 else if (Src.getOpcode() == ISD::ADD &&
4128 Src.getOperand(0).getOpcode() == ISD::GlobalAddress &&
4129 Src.getOperand(1).getOpcode() == ISD::Constant) {
4130 G = cast<GlobalAddressSDNode>(Src.getOperand(0));
4131 SrcDelta = cast<ConstantSDNode>(Src.getOperand(1))->getZExtValue();
4136 return getConstantStringInfo(G->getGlobal(), Str, SrcDelta, false);
4139 /// Determines the optimal series of memory ops to replace the memset / memcpy.
4140 /// Return true if the number of memory ops is below the threshold (Limit).
4141 /// It returns the types of the sequence of memory ops to perform
4142 /// memset / memcpy by reference.
4143 static bool FindOptimalMemOpLowering(std::vector<EVT> &MemOps,
4144 unsigned Limit, uint64_t Size,
4145 unsigned DstAlign, unsigned SrcAlign,
4151 const TargetLowering &TLI) {
4152 assert((SrcAlign == 0 || SrcAlign >= DstAlign) &&
4153 "Expecting memcpy / memset source to meet alignment requirement!");
4154 // If 'SrcAlign' is zero, that means the memory operation does not need to
4155 // load the value, i.e. memset or memcpy from constant string. Otherwise,
4156 // it's the inferred alignment of the source. 'DstAlign', on the other hand,
4157 // is the specified alignment of the memory operation. If it is zero, that
4158 // means it's possible to change the alignment of the destination.
4159 // 'MemcpyStrSrc' indicates whether the memcpy source is constant so it does
4160 // not need to be loaded.
4161 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign,
4162 IsMemset, ZeroMemset, MemcpyStrSrc,
4163 DAG.getMachineFunction());
4165 if (VT == MVT::Other) {
4167 if (DstAlign >= DAG.getDataLayout().getPointerPrefAlignment(AS) ||
4168 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign)) {
4169 VT = TLI.getPointerTy(DAG.getDataLayout());
4171 switch (DstAlign & 7) {
4172 case 0: VT = MVT::i64; break;
4173 case 4: VT = MVT::i32; break;
4174 case 2: VT = MVT::i16; break;
4175 default: VT = MVT::i8; break;
4180 while (!TLI.isTypeLegal(LVT))
4181 LVT = (MVT::SimpleValueType)(LVT.SimpleTy - 1);
4182 assert(LVT.isInteger());
4188 unsigned NumMemOps = 0;
4190 unsigned VTSize = VT.getSizeInBits() / 8;
4191 while (VTSize > Size) {
4192 // For now, only use non-vector load / store's for the left-over pieces.
4197 if (VT.isVector() || VT.isFloatingPoint()) {
4198 NewVT = (VT.getSizeInBits() > 64) ? MVT::i64 : MVT::i32;
4199 if (TLI.isOperationLegalOrCustom(ISD::STORE, NewVT) &&
4200 TLI.isSafeMemOpType(NewVT.getSimpleVT()))
4202 else if (NewVT == MVT::i64 &&
4203 TLI.isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
4204 TLI.isSafeMemOpType(MVT::f64)) {
4205 // i64 is usually not legal on 32-bit targets, but f64 may be.
4213 NewVT = (MVT::SimpleValueType)(NewVT.getSimpleVT().SimpleTy - 1);
4214 if (NewVT == MVT::i8)
4216 } while (!TLI.isSafeMemOpType(NewVT.getSimpleVT()));
4218 NewVTSize = NewVT.getSizeInBits() / 8;
4220 // If the new VT cannot cover all of the remaining bits, then consider
4221 // issuing a (or a pair of) unaligned and overlapping load / store.
4222 // FIXME: Only does this for 64-bit or more since we don't have proper
4223 // cost model for unaligned load / store.
4226 if (NumMemOps && AllowOverlap &&
4227 VTSize >= 8 && NewVTSize < Size &&
4228 TLI.allowsMisalignedMemoryAccesses(VT, AS, DstAlign, &Fast) && Fast)
4236 if (++NumMemOps > Limit)
4239 MemOps.push_back(VT);
4246 static bool shouldLowerMemFuncForSize(const MachineFunction &MF) {
4247 // On Darwin, -Os means optimize for size without hurting performance, so
4248 // only really optimize for size when -Oz (MinSize) is used.
4249 if (MF.getTarget().getTargetTriple().isOSDarwin())
4250 return MF.getFunction()->optForMinSize();
4251 return MF.getFunction()->optForSize();
4254 static SDValue getMemcpyLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4255 SDValue Chain, SDValue Dst,
4256 SDValue Src, uint64_t Size,
4257 unsigned Align, bool isVol,
4259 MachinePointerInfo DstPtrInfo,
4260 MachinePointerInfo SrcPtrInfo) {
4261 // Turn a memcpy of undef to nop.
4262 if (Src.getOpcode() == ISD::UNDEF)
4265 // Expand memcpy to a series of load and store ops if the size operand falls
4266 // below a certain threshold.
4267 // TODO: In the AlwaysInline case, if the size is big then generate a loop
4268 // rather than maybe a humongous number of loads and stores.
4269 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4270 std::vector<EVT> MemOps;
4271 bool DstAlignCanChange = false;
4272 MachineFunction &MF = DAG.getMachineFunction();
4273 MachineFrameInfo *MFI = MF.getFrameInfo();
4274 bool OptSize = shouldLowerMemFuncForSize(MF);
4275 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4276 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4277 DstAlignCanChange = true;
4278 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4279 if (Align > SrcAlign)
4282 bool CopyFromStr = isMemSrcFromString(Src, Str);
4283 bool isZeroStr = CopyFromStr && Str.empty();
4284 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemcpy(OptSize);
4286 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4287 (DstAlignCanChange ? 0 : Align),
4288 (isZeroStr ? 0 : SrcAlign),
4289 false, false, CopyFromStr, true, DAG, TLI))
4292 if (DstAlignCanChange) {
4293 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4294 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4296 // Don't promote to an alignment that would require dynamic stack
4298 const TargetRegisterInfo *TRI = MF.getSubtarget().getRegisterInfo();
4299 if (!TRI->needsStackRealignment(MF))
4300 while (NewAlign > Align &&
4301 DAG.getDataLayout().exceedsNaturalStackAlignment(NewAlign))
4304 if (NewAlign > Align) {
4305 // Give the stack frame object a larger alignment if needed.
4306 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4307 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4312 SmallVector<SDValue, 8> OutChains;
4313 unsigned NumMemOps = MemOps.size();
4314 uint64_t SrcOff = 0, DstOff = 0;
4315 for (unsigned i = 0; i != NumMemOps; ++i) {
4317 unsigned VTSize = VT.getSizeInBits() / 8;
4318 SDValue Value, Store;
4320 if (VTSize > Size) {
4321 // Issuing an unaligned load / store pair that overlaps with the previous
4322 // pair. Adjust the offset accordingly.
4323 assert(i == NumMemOps-1 && i != 0);
4324 SrcOff -= VTSize - Size;
4325 DstOff -= VTSize - Size;
4329 (isZeroStr || (VT.isInteger() && !VT.isVector()))) {
4330 // It's unlikely a store of a vector immediate can be done in a single
4331 // instruction. It would require a load from a constantpool first.
4332 // We only handle zero vectors here.
4333 // FIXME: Handle other cases where store of vector immediate is done in
4334 // a single instruction.
4335 Value = getMemsetStringVal(VT, dl, DAG, TLI, Str.substr(SrcOff));
4336 if (Value.getNode())
4337 Store = DAG.getStore(Chain, dl, Value,
4338 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4339 DstPtrInfo.getWithOffset(DstOff), isVol,
4343 if (!Store.getNode()) {
4344 // The type might not be legal for the target. This should only happen
4345 // if the type is smaller than a legal type, as on PPC, so the right
4346 // thing to do is generate a LoadExt/StoreTrunc pair. These simplify
4347 // to Load/Store if NVT==VT.
4348 // FIXME does the case above also need this?
4349 EVT NVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
4350 assert(NVT.bitsGE(VT));
4351 Value = DAG.getExtLoad(ISD::EXTLOAD, dl, NVT, Chain,
4352 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4353 SrcPtrInfo.getWithOffset(SrcOff), VT, isVol, false,
4354 false, MinAlign(SrcAlign, SrcOff));
4355 Store = DAG.getTruncStore(Chain, dl, Value,
4356 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4357 DstPtrInfo.getWithOffset(DstOff), VT, isVol,
4360 OutChains.push_back(Store);
4366 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4369 static SDValue getMemmoveLoadsAndStores(SelectionDAG &DAG, SDLoc dl,
4370 SDValue Chain, SDValue Dst,
4371 SDValue Src, uint64_t Size,
4372 unsigned Align, bool isVol,
4374 MachinePointerInfo DstPtrInfo,
4375 MachinePointerInfo SrcPtrInfo) {
4376 // Turn a memmove of undef to nop.
4377 if (Src.getOpcode() == ISD::UNDEF)
4380 // Expand memmove to a series of load and store ops if the size operand falls
4381 // below a certain threshold.
4382 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4383 std::vector<EVT> MemOps;
4384 bool DstAlignCanChange = false;
4385 MachineFunction &MF = DAG.getMachineFunction();
4386 MachineFrameInfo *MFI = MF.getFrameInfo();
4387 bool OptSize = shouldLowerMemFuncForSize(MF);
4388 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4389 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4390 DstAlignCanChange = true;
4391 unsigned SrcAlign = DAG.InferPtrAlignment(Src);
4392 if (Align > SrcAlign)
4394 unsigned Limit = AlwaysInline ? ~0U : TLI.getMaxStoresPerMemmove(OptSize);
4396 if (!FindOptimalMemOpLowering(MemOps, Limit, Size,
4397 (DstAlignCanChange ? 0 : Align), SrcAlign,
4398 false, false, false, false, DAG, TLI))
4401 if (DstAlignCanChange) {
4402 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4403 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4404 if (NewAlign > Align) {
4405 // Give the stack frame object a larger alignment if needed.
4406 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4407 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4412 uint64_t SrcOff = 0, DstOff = 0;
4413 SmallVector<SDValue, 8> LoadValues;
4414 SmallVector<SDValue, 8> LoadChains;
4415 SmallVector<SDValue, 8> OutChains;
4416 unsigned NumMemOps = MemOps.size();
4417 for (unsigned i = 0; i < NumMemOps; i++) {
4419 unsigned VTSize = VT.getSizeInBits() / 8;
4422 Value = DAG.getLoad(VT, dl, Chain,
4423 getMemBasePlusOffset(Src, SrcOff, dl, DAG),
4424 SrcPtrInfo.getWithOffset(SrcOff), isVol,
4425 false, false, SrcAlign);
4426 LoadValues.push_back(Value);
4427 LoadChains.push_back(Value.getValue(1));
4430 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, LoadChains);
4432 for (unsigned i = 0; i < NumMemOps; i++) {
4434 unsigned VTSize = VT.getSizeInBits() / 8;
4437 Store = DAG.getStore(Chain, dl, LoadValues[i],
4438 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4439 DstPtrInfo.getWithOffset(DstOff), isVol, false, Align);
4440 OutChains.push_back(Store);
4444 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4447 /// \brief Lower the call to 'memset' intrinsic function into a series of store
4450 /// \param DAG Selection DAG where lowered code is placed.
4451 /// \param dl Link to corresponding IR location.
4452 /// \param Chain Control flow dependency.
4453 /// \param Dst Pointer to destination memory location.
4454 /// \param Src Value of byte to write into the memory.
4455 /// \param Size Number of bytes to write.
4456 /// \param Align Alignment of the destination in bytes.
4457 /// \param isVol True if destination is volatile.
4458 /// \param DstPtrInfo IR information on the memory pointer.
4459 /// \returns New head in the control flow, if lowering was successful, empty
4460 /// SDValue otherwise.
4462 /// The function tries to replace 'llvm.memset' intrinsic with several store
4463 /// operations and value calculation code. This is usually profitable for small
4465 static SDValue getMemsetStores(SelectionDAG &DAG, SDLoc dl,
4466 SDValue Chain, SDValue Dst,
4467 SDValue Src, uint64_t Size,
4468 unsigned Align, bool isVol,
4469 MachinePointerInfo DstPtrInfo) {
4470 // Turn a memset of undef to nop.
4471 if (Src.getOpcode() == ISD::UNDEF)
4474 // Expand memset to a series of load/store ops if the size operand
4475 // falls below a certain threshold.
4476 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
4477 std::vector<EVT> MemOps;
4478 bool DstAlignCanChange = false;
4479 MachineFunction &MF = DAG.getMachineFunction();
4480 MachineFrameInfo *MFI = MF.getFrameInfo();
4481 bool OptSize = shouldLowerMemFuncForSize(MF);
4482 FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Dst);
4483 if (FI && !MFI->isFixedObjectIndex(FI->getIndex()))
4484 DstAlignCanChange = true;
4486 isa<ConstantSDNode>(Src) && cast<ConstantSDNode>(Src)->isNullValue();
4487 if (!FindOptimalMemOpLowering(MemOps, TLI.getMaxStoresPerMemset(OptSize),
4488 Size, (DstAlignCanChange ? 0 : Align), 0,
4489 true, IsZeroVal, false, true, DAG, TLI))
4492 if (DstAlignCanChange) {
4493 Type *Ty = MemOps[0].getTypeForEVT(*DAG.getContext());
4494 unsigned NewAlign = (unsigned)DAG.getDataLayout().getABITypeAlignment(Ty);
4495 if (NewAlign > Align) {
4496 // Give the stack frame object a larger alignment if needed.
4497 if (MFI->getObjectAlignment(FI->getIndex()) < NewAlign)
4498 MFI->setObjectAlignment(FI->getIndex(), NewAlign);
4503 SmallVector<SDValue, 8> OutChains;
4504 uint64_t DstOff = 0;
4505 unsigned NumMemOps = MemOps.size();
4507 // Find the largest store and generate the bit pattern for it.
4508 EVT LargestVT = MemOps[0];
4509 for (unsigned i = 1; i < NumMemOps; i++)
4510 if (MemOps[i].bitsGT(LargestVT))
4511 LargestVT = MemOps[i];
4512 SDValue MemSetValue = getMemsetValue(Src, LargestVT, DAG, dl);
4514 for (unsigned i = 0; i < NumMemOps; i++) {
4516 unsigned VTSize = VT.getSizeInBits() / 8;
4517 if (VTSize > Size) {
4518 // Issuing an unaligned load / store pair that overlaps with the previous
4519 // pair. Adjust the offset accordingly.
4520 assert(i == NumMemOps-1 && i != 0);
4521 DstOff -= VTSize - Size;
4524 // If this store is smaller than the largest store see whether we can get
4525 // the smaller value for free with a truncate.
4526 SDValue Value = MemSetValue;
4527 if (VT.bitsLT(LargestVT)) {
4528 if (!LargestVT.isVector() && !VT.isVector() &&
4529 TLI.isTruncateFree(LargestVT, VT))
4530 Value = DAG.getNode(ISD::TRUNCATE, dl, VT, MemSetValue);
4532 Value = getMemsetValue(Src, VT, DAG, dl);
4534 assert(Value.getValueType() == VT && "Value with wrong type.");
4535 SDValue Store = DAG.getStore(Chain, dl, Value,
4536 getMemBasePlusOffset(Dst, DstOff, dl, DAG),
4537 DstPtrInfo.getWithOffset(DstOff),
4538 isVol, false, Align);
4539 OutChains.push_back(Store);
4540 DstOff += VT.getSizeInBits() / 8;
4544 return DAG.getNode(ISD::TokenFactor, dl, MVT::Other, OutChains);
4547 SDValue SelectionDAG::getMemcpy(SDValue Chain, SDLoc dl, SDValue Dst,
4548 SDValue Src, SDValue Size,
4549 unsigned Align, bool isVol, bool AlwaysInline,
4550 bool isTailCall, MachinePointerInfo DstPtrInfo,
4551 MachinePointerInfo SrcPtrInfo) {
4552 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4554 // Check to see if we should lower the memcpy to loads and stores first.
4555 // For cases within the target-specified limits, this is the best choice.
4556 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4558 // Memcpy with size zero? Just return the original chain.
4559 if (ConstantSize->isNullValue())
4562 SDValue Result = getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4563 ConstantSize->getZExtValue(),Align,
4564 isVol, false, DstPtrInfo, SrcPtrInfo);
4565 if (Result.getNode())
4569 // Then check to see if we should lower the memcpy with target-specific
4570 // code. If the target chooses to do this, this is the next best.
4572 SDValue Result = TSI->EmitTargetCodeForMemcpy(
4573 *this, dl, Chain, Dst, Src, Size, Align, isVol, AlwaysInline,
4574 DstPtrInfo, SrcPtrInfo);
4575 if (Result.getNode())
4579 // If we really need inline code and the target declined to provide it,
4580 // use a (potentially long) sequence of loads and stores.
4582 assert(ConstantSize && "AlwaysInline requires a constant size!");
4583 return getMemcpyLoadsAndStores(*this, dl, Chain, Dst, Src,
4584 ConstantSize->getZExtValue(), Align, isVol,
4585 true, DstPtrInfo, SrcPtrInfo);
4588 // FIXME: If the memcpy is volatile (isVol), lowering it to a plain libc
4589 // memcpy is not guaranteed to be safe. libc memcpys aren't required to
4590 // respect volatile, so they may do things like read or write memory
4591 // beyond the given memory regions. But fixing this isn't easy, and most
4592 // people don't care.
4594 // Emit a library call.
4595 TargetLowering::ArgListTy Args;
4596 TargetLowering::ArgListEntry Entry;
4597 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4598 Entry.Node = Dst; Args.push_back(Entry);
4599 Entry.Node = Src; Args.push_back(Entry);
4600 Entry.Node = Size; Args.push_back(Entry);
4601 // FIXME: pass in SDLoc
4602 TargetLowering::CallLoweringInfo CLI(*this);
4605 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMCPY),
4606 Type::getVoidTy(*getContext()),
4607 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMCPY),
4608 TLI->getPointerTy(getDataLayout())),
4611 .setTailCall(isTailCall);
4613 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4614 return CallResult.second;
4617 SDValue SelectionDAG::getMemmove(SDValue Chain, SDLoc dl, SDValue Dst,
4618 SDValue Src, SDValue Size,
4619 unsigned Align, bool isVol, bool isTailCall,
4620 MachinePointerInfo DstPtrInfo,
4621 MachinePointerInfo SrcPtrInfo) {
4622 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4624 // Check to see if we should lower the memmove to loads and stores first.
4625 // For cases within the target-specified limits, this is the best choice.
4626 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4628 // Memmove with size zero? Just return the original chain.
4629 if (ConstantSize->isNullValue())
4633 getMemmoveLoadsAndStores(*this, dl, Chain, Dst, Src,
4634 ConstantSize->getZExtValue(), Align, isVol,
4635 false, DstPtrInfo, SrcPtrInfo);
4636 if (Result.getNode())
4640 // Then check to see if we should lower the memmove with target-specific
4641 // code. If the target chooses to do this, this is the next best.
4643 SDValue Result = TSI->EmitTargetCodeForMemmove(
4644 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo, SrcPtrInfo);
4645 if (Result.getNode())
4649 // FIXME: If the memmove is volatile, lowering it to plain libc memmove may
4650 // not be safe. See memcpy above for more details.
4652 // Emit a library call.
4653 TargetLowering::ArgListTy Args;
4654 TargetLowering::ArgListEntry Entry;
4655 Entry.Ty = getDataLayout().getIntPtrType(*getContext());
4656 Entry.Node = Dst; Args.push_back(Entry);
4657 Entry.Node = Src; Args.push_back(Entry);
4658 Entry.Node = Size; Args.push_back(Entry);
4659 // FIXME: pass in SDLoc
4660 TargetLowering::CallLoweringInfo CLI(*this);
4663 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMMOVE),
4664 Type::getVoidTy(*getContext()),
4665 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMMOVE),
4666 TLI->getPointerTy(getDataLayout())),
4669 .setTailCall(isTailCall);
4671 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4672 return CallResult.second;
4675 SDValue SelectionDAG::getMemset(SDValue Chain, SDLoc dl, SDValue Dst,
4676 SDValue Src, SDValue Size,
4677 unsigned Align, bool isVol, bool isTailCall,
4678 MachinePointerInfo DstPtrInfo) {
4679 assert(Align && "The SDAG layer expects explicit alignment and reserves 0");
4681 // Check to see if we should lower the memset to stores first.
4682 // For cases within the target-specified limits, this is the best choice.
4683 ConstantSDNode *ConstantSize = dyn_cast<ConstantSDNode>(Size);
4685 // Memset with size zero? Just return the original chain.
4686 if (ConstantSize->isNullValue())
4690 getMemsetStores(*this, dl, Chain, Dst, Src, ConstantSize->getZExtValue(),
4691 Align, isVol, DstPtrInfo);
4693 if (Result.getNode())
4697 // Then check to see if we should lower the memset with target-specific
4698 // code. If the target chooses to do this, this is the next best.
4700 SDValue Result = TSI->EmitTargetCodeForMemset(
4701 *this, dl, Chain, Dst, Src, Size, Align, isVol, DstPtrInfo);
4702 if (Result.getNode())
4706 // Emit a library call.
4707 Type *IntPtrTy = getDataLayout().getIntPtrType(*getContext());
4708 TargetLowering::ArgListTy Args;
4709 TargetLowering::ArgListEntry Entry;
4710 Entry.Node = Dst; Entry.Ty = IntPtrTy;
4711 Args.push_back(Entry);
4713 Entry.Ty = Src.getValueType().getTypeForEVT(*getContext());
4714 Args.push_back(Entry);
4716 Entry.Ty = IntPtrTy;
4717 Args.push_back(Entry);
4719 // FIXME: pass in SDLoc
4720 TargetLowering::CallLoweringInfo CLI(*this);
4723 .setCallee(TLI->getLibcallCallingConv(RTLIB::MEMSET),
4724 Type::getVoidTy(*getContext()),
4725 getExternalSymbol(TLI->getLibcallName(RTLIB::MEMSET),
4726 TLI->getPointerTy(getDataLayout())),
4729 .setTailCall(isTailCall);
4731 std::pair<SDValue,SDValue> CallResult = TLI->LowerCallTo(CLI);
4732 return CallResult.second;
4735 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4736 SDVTList VTList, ArrayRef<SDValue> Ops,
4737 MachineMemOperand *MMO,
4738 AtomicOrdering SuccessOrdering,
4739 AtomicOrdering FailureOrdering,
4740 SynchronizationScope SynchScope) {
4741 FoldingSetNodeID ID;
4742 ID.AddInteger(MemVT.getRawBits());
4743 AddNodeIDNode(ID, Opcode, VTList, Ops);
4744 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4746 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4747 cast<AtomicSDNode>(E)->refineAlignment(MMO);
4748 return SDValue(E, 0);
4751 // Allocate the operands array for the node out of the BumpPtrAllocator, since
4752 // SDNode doesn't have access to it. This memory will be "leaked" when
4753 // the node is deallocated, but recovered when the allocator is released.
4754 // If the number of operands is less than 5 we use AtomicSDNode's internal
4756 unsigned NumOps = Ops.size();
4757 SDUse *DynOps = NumOps > 4 ? OperandAllocator.Allocate<SDUse>(NumOps)
4760 SDNode *N = new (NodeAllocator) AtomicSDNode(Opcode, dl.getIROrder(),
4761 dl.getDebugLoc(), VTList, MemVT,
4762 Ops.data(), DynOps, NumOps, MMO,
4763 SuccessOrdering, FailureOrdering,
4765 CSEMap.InsertNode(N, IP);
4767 return SDValue(N, 0);
4770 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4771 SDVTList VTList, ArrayRef<SDValue> Ops,
4772 MachineMemOperand *MMO,
4773 AtomicOrdering Ordering,
4774 SynchronizationScope SynchScope) {
4775 return getAtomic(Opcode, dl, MemVT, VTList, Ops, MMO, Ordering,
4776 Ordering, SynchScope);
4779 SDValue SelectionDAG::getAtomicCmpSwap(
4780 unsigned Opcode, SDLoc dl, EVT MemVT, SDVTList VTs, SDValue Chain,
4781 SDValue Ptr, SDValue Cmp, SDValue Swp, MachinePointerInfo PtrInfo,
4782 unsigned Alignment, AtomicOrdering SuccessOrdering,
4783 AtomicOrdering FailureOrdering, SynchronizationScope SynchScope) {
4784 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4785 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4786 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4788 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4789 Alignment = getEVTAlignment(MemVT);
4791 MachineFunction &MF = getMachineFunction();
4793 // FIXME: Volatile isn't really correct; we should keep track of atomic
4794 // orderings in the memoperand.
4795 unsigned Flags = MachineMemOperand::MOVolatile;
4796 Flags |= MachineMemOperand::MOLoad;
4797 Flags |= MachineMemOperand::MOStore;
4799 MachineMemOperand *MMO =
4800 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment);
4802 return getAtomicCmpSwap(Opcode, dl, MemVT, VTs, Chain, Ptr, Cmp, Swp, MMO,
4803 SuccessOrdering, FailureOrdering, SynchScope);
4806 SDValue SelectionDAG::getAtomicCmpSwap(unsigned Opcode, SDLoc dl, EVT MemVT,
4807 SDVTList VTs, SDValue Chain, SDValue Ptr,
4808 SDValue Cmp, SDValue Swp,
4809 MachineMemOperand *MMO,
4810 AtomicOrdering SuccessOrdering,
4811 AtomicOrdering FailureOrdering,
4812 SynchronizationScope SynchScope) {
4813 assert(Opcode == ISD::ATOMIC_CMP_SWAP ||
4814 Opcode == ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS);
4815 assert(Cmp.getValueType() == Swp.getValueType() && "Invalid Atomic Op Types");
4817 SDValue Ops[] = {Chain, Ptr, Cmp, Swp};
4818 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO,
4819 SuccessOrdering, FailureOrdering, SynchScope);
4822 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4824 SDValue Ptr, SDValue Val,
4825 const Value* PtrVal,
4827 AtomicOrdering Ordering,
4828 SynchronizationScope SynchScope) {
4829 if (Alignment == 0) // Ensure that codegen never sees alignment 0
4830 Alignment = getEVTAlignment(MemVT);
4832 MachineFunction &MF = getMachineFunction();
4833 // An atomic store does not load. An atomic load does not store.
4834 // (An atomicrmw obviously both loads and stores.)
4835 // For now, atomics are considered to be volatile always, and they are
4837 // FIXME: Volatile isn't really correct; we should keep track of atomic
4838 // orderings in the memoperand.
4839 unsigned Flags = MachineMemOperand::MOVolatile;
4840 if (Opcode != ISD::ATOMIC_STORE)
4841 Flags |= MachineMemOperand::MOLoad;
4842 if (Opcode != ISD::ATOMIC_LOAD)
4843 Flags |= MachineMemOperand::MOStore;
4845 MachineMemOperand *MMO =
4846 MF.getMachineMemOperand(MachinePointerInfo(PtrVal), Flags,
4847 MemVT.getStoreSize(), Alignment);
4849 return getAtomic(Opcode, dl, MemVT, Chain, Ptr, Val, MMO,
4850 Ordering, SynchScope);
4853 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4855 SDValue Ptr, SDValue Val,
4856 MachineMemOperand *MMO,
4857 AtomicOrdering Ordering,
4858 SynchronizationScope SynchScope) {
4859 assert((Opcode == ISD::ATOMIC_LOAD_ADD ||
4860 Opcode == ISD::ATOMIC_LOAD_SUB ||
4861 Opcode == ISD::ATOMIC_LOAD_AND ||
4862 Opcode == ISD::ATOMIC_LOAD_OR ||
4863 Opcode == ISD::ATOMIC_LOAD_XOR ||
4864 Opcode == ISD::ATOMIC_LOAD_NAND ||
4865 Opcode == ISD::ATOMIC_LOAD_MIN ||
4866 Opcode == ISD::ATOMIC_LOAD_MAX ||
4867 Opcode == ISD::ATOMIC_LOAD_UMIN ||
4868 Opcode == ISD::ATOMIC_LOAD_UMAX ||
4869 Opcode == ISD::ATOMIC_SWAP ||
4870 Opcode == ISD::ATOMIC_STORE) &&
4871 "Invalid Atomic Op");
4873 EVT VT = Val.getValueType();
4875 SDVTList VTs = Opcode == ISD::ATOMIC_STORE ? getVTList(MVT::Other) :
4876 getVTList(VT, MVT::Other);
4877 SDValue Ops[] = {Chain, Ptr, Val};
4878 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4881 SDValue SelectionDAG::getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT,
4882 EVT VT, SDValue Chain,
4884 MachineMemOperand *MMO,
4885 AtomicOrdering Ordering,
4886 SynchronizationScope SynchScope) {
4887 assert(Opcode == ISD::ATOMIC_LOAD && "Invalid Atomic Op");
4889 SDVTList VTs = getVTList(VT, MVT::Other);
4890 SDValue Ops[] = {Chain, Ptr};
4891 return getAtomic(Opcode, dl, MemVT, VTs, Ops, MMO, Ordering, SynchScope);
4894 /// getMergeValues - Create a MERGE_VALUES node from the given operands.
4895 SDValue SelectionDAG::getMergeValues(ArrayRef<SDValue> Ops, SDLoc dl) {
4896 if (Ops.size() == 1)
4899 SmallVector<EVT, 4> VTs;
4900 VTs.reserve(Ops.size());
4901 for (unsigned i = 0; i < Ops.size(); ++i)
4902 VTs.push_back(Ops[i].getValueType());
4903 return getNode(ISD::MERGE_VALUES, dl, getVTList(VTs), Ops);
4907 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4908 ArrayRef<SDValue> Ops,
4909 EVT MemVT, MachinePointerInfo PtrInfo,
4910 unsigned Align, bool Vol,
4911 bool ReadMem, bool WriteMem, unsigned Size) {
4912 if (Align == 0) // Ensure that codegen never sees alignment 0
4913 Align = getEVTAlignment(MemVT);
4915 MachineFunction &MF = getMachineFunction();
4918 Flags |= MachineMemOperand::MOStore;
4920 Flags |= MachineMemOperand::MOLoad;
4922 Flags |= MachineMemOperand::MOVolatile;
4924 Size = MemVT.getStoreSize();
4925 MachineMemOperand *MMO =
4926 MF.getMachineMemOperand(PtrInfo, Flags, Size, Align);
4928 return getMemIntrinsicNode(Opcode, dl, VTList, Ops, MemVT, MMO);
4932 SelectionDAG::getMemIntrinsicNode(unsigned Opcode, SDLoc dl, SDVTList VTList,
4933 ArrayRef<SDValue> Ops, EVT MemVT,
4934 MachineMemOperand *MMO) {
4935 assert((Opcode == ISD::INTRINSIC_VOID ||
4936 Opcode == ISD::INTRINSIC_W_CHAIN ||
4937 Opcode == ISD::PREFETCH ||
4938 Opcode == ISD::LIFETIME_START ||
4939 Opcode == ISD::LIFETIME_END ||
4940 (Opcode <= INT_MAX &&
4941 (int)Opcode >= ISD::FIRST_TARGET_MEMORY_OPCODE)) &&
4942 "Opcode is not a memory-accessing opcode!");
4944 // Memoize the node unless it returns a flag.
4945 MemIntrinsicSDNode *N;
4946 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
4947 FoldingSetNodeID ID;
4948 AddNodeIDNode(ID, Opcode, VTList, Ops);
4949 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
4951 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
4952 cast<MemIntrinsicSDNode>(E)->refineAlignment(MMO);
4953 return SDValue(E, 0);
4956 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4957 dl.getDebugLoc(), VTList, Ops,
4959 CSEMap.InsertNode(N, IP);
4961 N = new (NodeAllocator) MemIntrinsicSDNode(Opcode, dl.getIROrder(),
4962 dl.getDebugLoc(), VTList, Ops,
4966 return SDValue(N, 0);
4969 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4970 /// MachinePointerInfo record from it. This is particularly useful because the
4971 /// code generator has many cases where it doesn't bother passing in a
4972 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4973 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4974 int64_t Offset = 0) {
4975 // If this is FI+Offset, we can model it.
4976 if (const FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr))
4977 return MachinePointerInfo::getFixedStack(DAG.getMachineFunction(),
4978 FI->getIndex(), Offset);
4980 // If this is (FI+Offset1)+Offset2, we can model it.
4981 if (Ptr.getOpcode() != ISD::ADD ||
4982 !isa<ConstantSDNode>(Ptr.getOperand(1)) ||
4983 !isa<FrameIndexSDNode>(Ptr.getOperand(0)))
4984 return MachinePointerInfo();
4986 int FI = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
4987 return MachinePointerInfo::getFixedStack(
4988 DAG.getMachineFunction(), FI,
4989 Offset + cast<ConstantSDNode>(Ptr.getOperand(1))->getSExtValue());
4992 /// InferPointerInfo - If the specified ptr/offset is a frame index, infer a
4993 /// MachinePointerInfo record from it. This is particularly useful because the
4994 /// code generator has many cases where it doesn't bother passing in a
4995 /// MachinePointerInfo to getLoad or getStore when it has "FI+Cst".
4996 static MachinePointerInfo InferPointerInfo(SelectionDAG &DAG, SDValue Ptr,
4998 // If the 'Offset' value isn't a constant, we can't handle this.
4999 if (ConstantSDNode *OffsetNode = dyn_cast<ConstantSDNode>(OffsetOp))
5000 return InferPointerInfo(DAG, Ptr, OffsetNode->getSExtValue());
5001 if (OffsetOp.getOpcode() == ISD::UNDEF)
5002 return InferPointerInfo(DAG, Ptr);
5003 return MachinePointerInfo();
5008 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
5009 EVT VT, SDLoc dl, SDValue Chain,
5010 SDValue Ptr, SDValue Offset,
5011 MachinePointerInfo PtrInfo, EVT MemVT,
5012 bool isVolatile, bool isNonTemporal, bool isInvariant,
5013 unsigned Alignment, const AAMDNodes &AAInfo,
5014 const MDNode *Ranges) {
5015 assert(Chain.getValueType() == MVT::Other &&
5016 "Invalid chain type");
5017 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5018 Alignment = getEVTAlignment(VT);
5020 unsigned Flags = MachineMemOperand::MOLoad;
5022 Flags |= MachineMemOperand::MOVolatile;
5024 Flags |= MachineMemOperand::MONonTemporal;
5026 Flags |= MachineMemOperand::MOInvariant;
5028 // If we don't have a PtrInfo, infer the trivial frame index case to simplify
5030 if (PtrInfo.V.isNull())
5031 PtrInfo = InferPointerInfo(*this, Ptr, Offset);
5033 MachineFunction &MF = getMachineFunction();
5034 MachineMemOperand *MMO =
5035 MF.getMachineMemOperand(PtrInfo, Flags, MemVT.getStoreSize(), Alignment,
5037 return getLoad(AM, ExtType, VT, dl, Chain, Ptr, Offset, MemVT, MMO);
5041 SelectionDAG::getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType,
5042 EVT VT, SDLoc dl, SDValue Chain,
5043 SDValue Ptr, SDValue Offset, EVT MemVT,
5044 MachineMemOperand *MMO) {
5046 ExtType = ISD::NON_EXTLOAD;
5047 } else if (ExtType == ISD::NON_EXTLOAD) {
5048 assert(VT == MemVT && "Non-extending load from different memory type!");
5051 assert(MemVT.getScalarType().bitsLT(VT.getScalarType()) &&
5052 "Should only be an extending load, not truncating!");
5053 assert(VT.isInteger() == MemVT.isInteger() &&
5054 "Cannot convert from FP to Int or Int -> FP!");
5055 assert(VT.isVector() == MemVT.isVector() &&
5056 "Cannot use an ext load to convert to or from a vector!");
5057 assert((!VT.isVector() ||
5058 VT.getVectorNumElements() == MemVT.getVectorNumElements()) &&
5059 "Cannot use an ext load to change the number of vector elements!");
5062 bool Indexed = AM != ISD::UNINDEXED;
5063 assert((Indexed || Offset.getOpcode() == ISD::UNDEF) &&
5064 "Unindexed load with an offset!");
5066 SDVTList VTs = Indexed ?
5067 getVTList(VT, Ptr.getValueType(), MVT::Other) : getVTList(VT, MVT::Other);
5068 SDValue Ops[] = { Chain, Ptr, Offset };
5069 FoldingSetNodeID ID;
5070 AddNodeIDNode(ID, ISD::LOAD, VTs, Ops);
5071 ID.AddInteger(MemVT.getRawBits());
5072 ID.AddInteger(encodeMemSDNodeFlags(ExtType, AM, MMO->isVolatile(),
5073 MMO->isNonTemporal(),
5074 MMO->isInvariant()));
5075 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5077 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5078 cast<LoadSDNode>(E)->refineAlignment(MMO);
5079 return SDValue(E, 0);
5081 SDNode *N = new (NodeAllocator) LoadSDNode(Ops, dl.getIROrder(),
5082 dl.getDebugLoc(), VTs, AM, ExtType,
5084 CSEMap.InsertNode(N, IP);
5086 return SDValue(N, 0);
5089 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5090 SDValue Chain, SDValue Ptr,
5091 MachinePointerInfo PtrInfo,
5092 bool isVolatile, bool isNonTemporal,
5093 bool isInvariant, unsigned Alignment,
5094 const AAMDNodes &AAInfo,
5095 const MDNode *Ranges) {
5096 SDValue Undef = getUNDEF(Ptr.getValueType());
5097 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5098 PtrInfo, VT, isVolatile, isNonTemporal, isInvariant, Alignment,
5102 SDValue SelectionDAG::getLoad(EVT VT, SDLoc dl,
5103 SDValue Chain, SDValue Ptr,
5104 MachineMemOperand *MMO) {
5105 SDValue Undef = getUNDEF(Ptr.getValueType());
5106 return getLoad(ISD::UNINDEXED, ISD::NON_EXTLOAD, VT, dl, Chain, Ptr, Undef,
5110 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5111 SDValue Chain, SDValue Ptr,
5112 MachinePointerInfo PtrInfo, EVT MemVT,
5113 bool isVolatile, bool isNonTemporal,
5114 bool isInvariant, unsigned Alignment,
5115 const AAMDNodes &AAInfo) {
5116 SDValue Undef = getUNDEF(Ptr.getValueType());
5117 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5118 PtrInfo, MemVT, isVolatile, isNonTemporal, isInvariant,
5123 SDValue SelectionDAG::getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT,
5124 SDValue Chain, SDValue Ptr, EVT MemVT,
5125 MachineMemOperand *MMO) {
5126 SDValue Undef = getUNDEF(Ptr.getValueType());
5127 return getLoad(ISD::UNINDEXED, ExtType, VT, dl, Chain, Ptr, Undef,
5132 SelectionDAG::getIndexedLoad(SDValue OrigLoad, SDLoc dl, SDValue Base,
5133 SDValue Offset, ISD::MemIndexedMode AM) {
5134 LoadSDNode *LD = cast<LoadSDNode>(OrigLoad);
5135 assert(LD->getOffset().getOpcode() == ISD::UNDEF &&
5136 "Load is already a indexed load!");
5137 return getLoad(AM, LD->getExtensionType(), OrigLoad.getValueType(), dl,
5138 LD->getChain(), Base, Offset, LD->getPointerInfo(),
5139 LD->getMemoryVT(), LD->isVolatile(), LD->isNonTemporal(),
5140 false, LD->getAlignment());
5143 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5144 SDValue Ptr, MachinePointerInfo PtrInfo,
5145 bool isVolatile, bool isNonTemporal,
5146 unsigned Alignment, const AAMDNodes &AAInfo) {
5147 assert(Chain.getValueType() == MVT::Other &&
5148 "Invalid chain type");
5149 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5150 Alignment = getEVTAlignment(Val.getValueType());
5152 unsigned Flags = MachineMemOperand::MOStore;
5154 Flags |= MachineMemOperand::MOVolatile;
5156 Flags |= MachineMemOperand::MONonTemporal;
5158 if (PtrInfo.V.isNull())
5159 PtrInfo = InferPointerInfo(*this, Ptr);
5161 MachineFunction &MF = getMachineFunction();
5162 MachineMemOperand *MMO =
5163 MF.getMachineMemOperand(PtrInfo, Flags,
5164 Val.getValueType().getStoreSize(), Alignment,
5167 return getStore(Chain, dl, Val, Ptr, MMO);
5170 SDValue SelectionDAG::getStore(SDValue Chain, SDLoc dl, SDValue Val,
5171 SDValue Ptr, MachineMemOperand *MMO) {
5172 assert(Chain.getValueType() == MVT::Other &&
5173 "Invalid chain type");
5174 EVT VT = Val.getValueType();
5175 SDVTList VTs = getVTList(MVT::Other);
5176 SDValue Undef = getUNDEF(Ptr.getValueType());
5177 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5178 FoldingSetNodeID ID;
5179 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5180 ID.AddInteger(VT.getRawBits());
5181 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5182 MMO->isNonTemporal(), MMO->isInvariant()));
5183 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5185 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5186 cast<StoreSDNode>(E)->refineAlignment(MMO);
5187 return SDValue(E, 0);
5189 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5190 dl.getDebugLoc(), VTs,
5191 ISD::UNINDEXED, false, VT, MMO);
5192 CSEMap.InsertNode(N, IP);
5194 return SDValue(N, 0);
5197 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5198 SDValue Ptr, MachinePointerInfo PtrInfo,
5199 EVT SVT,bool isVolatile, bool isNonTemporal,
5201 const AAMDNodes &AAInfo) {
5202 assert(Chain.getValueType() == MVT::Other &&
5203 "Invalid chain type");
5204 if (Alignment == 0) // Ensure that codegen never sees alignment 0
5205 Alignment = getEVTAlignment(SVT);
5207 unsigned Flags = MachineMemOperand::MOStore;
5209 Flags |= MachineMemOperand::MOVolatile;
5211 Flags |= MachineMemOperand::MONonTemporal;
5213 if (PtrInfo.V.isNull())
5214 PtrInfo = InferPointerInfo(*this, Ptr);
5216 MachineFunction &MF = getMachineFunction();
5217 MachineMemOperand *MMO =
5218 MF.getMachineMemOperand(PtrInfo, Flags, SVT.getStoreSize(), Alignment,
5221 return getTruncStore(Chain, dl, Val, Ptr, SVT, MMO);
5224 SDValue SelectionDAG::getTruncStore(SDValue Chain, SDLoc dl, SDValue Val,
5225 SDValue Ptr, EVT SVT,
5226 MachineMemOperand *MMO) {
5227 EVT VT = Val.getValueType();
5229 assert(Chain.getValueType() == MVT::Other &&
5230 "Invalid chain type");
5232 return getStore(Chain, dl, Val, Ptr, MMO);
5234 assert(SVT.getScalarType().bitsLT(VT.getScalarType()) &&
5235 "Should only be a truncating store, not extending!");
5236 assert(VT.isInteger() == SVT.isInteger() &&
5237 "Can't do FP-INT conversion!");
5238 assert(VT.isVector() == SVT.isVector() &&
5239 "Cannot use trunc store to convert to or from a vector!");
5240 assert((!VT.isVector() ||
5241 VT.getVectorNumElements() == SVT.getVectorNumElements()) &&
5242 "Cannot use trunc store to change the number of vector elements!");
5244 SDVTList VTs = getVTList(MVT::Other);
5245 SDValue Undef = getUNDEF(Ptr.getValueType());
5246 SDValue Ops[] = { Chain, Val, Ptr, Undef };
5247 FoldingSetNodeID ID;
5248 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5249 ID.AddInteger(SVT.getRawBits());
5250 ID.AddInteger(encodeMemSDNodeFlags(true, ISD::UNINDEXED, MMO->isVolatile(),
5251 MMO->isNonTemporal(), MMO->isInvariant()));
5252 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5254 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5255 cast<StoreSDNode>(E)->refineAlignment(MMO);
5256 return SDValue(E, 0);
5258 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5259 dl.getDebugLoc(), VTs,
5260 ISD::UNINDEXED, true, SVT, MMO);
5261 CSEMap.InsertNode(N, IP);
5263 return SDValue(N, 0);
5267 SelectionDAG::getIndexedStore(SDValue OrigStore, SDLoc dl, SDValue Base,
5268 SDValue Offset, ISD::MemIndexedMode AM) {
5269 StoreSDNode *ST = cast<StoreSDNode>(OrigStore);
5270 assert(ST->getOffset().getOpcode() == ISD::UNDEF &&
5271 "Store is already a indexed store!");
5272 SDVTList VTs = getVTList(Base.getValueType(), MVT::Other);
5273 SDValue Ops[] = { ST->getChain(), ST->getValue(), Base, Offset };
5274 FoldingSetNodeID ID;
5275 AddNodeIDNode(ID, ISD::STORE, VTs, Ops);
5276 ID.AddInteger(ST->getMemoryVT().getRawBits());
5277 ID.AddInteger(ST->getRawSubclassData());
5278 ID.AddInteger(ST->getPointerInfo().getAddrSpace());
5280 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP))
5281 return SDValue(E, 0);
5283 SDNode *N = new (NodeAllocator) StoreSDNode(Ops, dl.getIROrder(),
5284 dl.getDebugLoc(), VTs, AM,
5285 ST->isTruncatingStore(),
5287 ST->getMemOperand());
5288 CSEMap.InsertNode(N, IP);
5290 return SDValue(N, 0);
5294 SelectionDAG::getMaskedLoad(EVT VT, SDLoc dl, SDValue Chain,
5295 SDValue Ptr, SDValue Mask, SDValue Src0, EVT MemVT,
5296 MachineMemOperand *MMO, ISD::LoadExtType ExtTy) {
5298 SDVTList VTs = getVTList(VT, MVT::Other);
5299 SDValue Ops[] = { Chain, Ptr, Mask, Src0 };
5300 FoldingSetNodeID ID;
5301 AddNodeIDNode(ID, ISD::MLOAD, VTs, Ops);
5302 ID.AddInteger(VT.getRawBits());
5303 ID.AddInteger(encodeMemSDNodeFlags(ExtTy, ISD::UNINDEXED,
5305 MMO->isNonTemporal(),
5306 MMO->isInvariant()));
5307 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5309 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5310 cast<MaskedLoadSDNode>(E)->refineAlignment(MMO);
5311 return SDValue(E, 0);
5313 SDNode *N = new (NodeAllocator) MaskedLoadSDNode(dl.getIROrder(),
5314 dl.getDebugLoc(), Ops, 4, VTs,
5316 CSEMap.InsertNode(N, IP);
5318 return SDValue(N, 0);
5321 SDValue SelectionDAG::getMaskedStore(SDValue Chain, SDLoc dl, SDValue Val,
5322 SDValue Ptr, SDValue Mask, EVT MemVT,
5323 MachineMemOperand *MMO, bool isTrunc) {
5324 assert(Chain.getValueType() == MVT::Other &&
5325 "Invalid chain type");
5326 EVT VT = Val.getValueType();
5327 SDVTList VTs = getVTList(MVT::Other);
5328 SDValue Ops[] = { Chain, Ptr, Mask, Val };
5329 FoldingSetNodeID ID;
5330 AddNodeIDNode(ID, ISD::MSTORE, VTs, Ops);
5331 ID.AddInteger(VT.getRawBits());
5332 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5333 MMO->isNonTemporal(), MMO->isInvariant()));
5334 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5336 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5337 cast<MaskedStoreSDNode>(E)->refineAlignment(MMO);
5338 return SDValue(E, 0);
5340 SDNode *N = new (NodeAllocator) MaskedStoreSDNode(dl.getIROrder(),
5341 dl.getDebugLoc(), Ops, 4,
5342 VTs, isTrunc, MemVT, MMO);
5343 CSEMap.InsertNode(N, IP);
5345 return SDValue(N, 0);
5349 SelectionDAG::getMaskedGather(SDVTList VTs, EVT VT, SDLoc dl,
5350 ArrayRef<SDValue> Ops,
5351 MachineMemOperand *MMO) {
5353 FoldingSetNodeID ID;
5354 AddNodeIDNode(ID, ISD::MGATHER, VTs, Ops);
5355 ID.AddInteger(VT.getRawBits());
5356 ID.AddInteger(encodeMemSDNodeFlags(ISD::NON_EXTLOAD, ISD::UNINDEXED,
5358 MMO->isNonTemporal(),
5359 MMO->isInvariant()));
5360 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5362 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5363 cast<MaskedGatherSDNode>(E)->refineAlignment(MMO);
5364 return SDValue(E, 0);
5366 MaskedGatherSDNode *N =
5367 new (NodeAllocator) MaskedGatherSDNode(dl.getIROrder(), dl.getDebugLoc(),
5369 CSEMap.InsertNode(N, IP);
5371 return SDValue(N, 0);
5374 SDValue SelectionDAG::getMaskedScatter(SDVTList VTs, EVT VT, SDLoc dl,
5375 ArrayRef<SDValue> Ops,
5376 MachineMemOperand *MMO) {
5377 FoldingSetNodeID ID;
5378 AddNodeIDNode(ID, ISD::MSCATTER, VTs, Ops);
5379 ID.AddInteger(VT.getRawBits());
5380 ID.AddInteger(encodeMemSDNodeFlags(false, ISD::UNINDEXED, MMO->isVolatile(),
5381 MMO->isNonTemporal(),
5382 MMO->isInvariant()));
5383 ID.AddInteger(MMO->getPointerInfo().getAddrSpace());
5385 if (SDNode *E = FindNodeOrInsertPos(ID, dl.getDebugLoc(), IP)) {
5386 cast<MaskedScatterSDNode>(E)->refineAlignment(MMO);
5387 return SDValue(E, 0);
5390 new (NodeAllocator) MaskedScatterSDNode(dl.getIROrder(), dl.getDebugLoc(),
5392 CSEMap.InsertNode(N, IP);
5394 return SDValue(N, 0);
5397 SDValue SelectionDAG::getVAArg(EVT VT, SDLoc dl,
5398 SDValue Chain, SDValue Ptr,
5401 SDValue Ops[] = { Chain, Ptr, SV, getTargetConstant(Align, dl, MVT::i32) };
5402 return getNode(ISD::VAARG, dl, getVTList(VT, MVT::Other), Ops);
5405 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5406 ArrayRef<SDUse> Ops) {
5407 switch (Ops.size()) {
5408 case 0: return getNode(Opcode, DL, VT);
5409 case 1: return getNode(Opcode, DL, VT, static_cast<const SDValue>(Ops[0]));
5410 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1]);
5411 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5415 // Copy from an SDUse array into an SDValue array for use with
5416 // the regular getNode logic.
5417 SmallVector<SDValue, 8> NewOps(Ops.begin(), Ops.end());
5418 return getNode(Opcode, DL, VT, NewOps);
5421 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, EVT VT,
5422 ArrayRef<SDValue> Ops, const SDNodeFlags *Flags) {
5423 unsigned NumOps = Ops.size();
5425 case 0: return getNode(Opcode, DL, VT);
5426 case 1: return getNode(Opcode, DL, VT, Ops[0]);
5427 case 2: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Flags);
5428 case 3: return getNode(Opcode, DL, VT, Ops[0], Ops[1], Ops[2]);
5434 case ISD::SELECT_CC: {
5435 assert(NumOps == 5 && "SELECT_CC takes 5 operands!");
5436 assert(Ops[0].getValueType() == Ops[1].getValueType() &&
5437 "LHS and RHS of condition must have same type!");
5438 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5439 "True and False arms of SelectCC must have same type!");
5440 assert(Ops[2].getValueType() == VT &&
5441 "select_cc node must be of same type as true and false value!");
5445 assert(NumOps == 5 && "BR_CC takes 5 operands!");
5446 assert(Ops[2].getValueType() == Ops[3].getValueType() &&
5447 "LHS/RHS of comparison should match types!");
5454 SDVTList VTs = getVTList(VT);
5456 if (VT != MVT::Glue) {
5457 FoldingSetNodeID ID;
5458 AddNodeIDNode(ID, Opcode, VTs, Ops);
5461 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5462 return SDValue(E, 0);
5464 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5466 CSEMap.InsertNode(N, IP);
5468 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5473 return SDValue(N, 0);
5476 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL,
5477 ArrayRef<EVT> ResultTys, ArrayRef<SDValue> Ops) {
5478 return getNode(Opcode, DL, getVTList(ResultTys), Ops);
5481 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5482 ArrayRef<SDValue> Ops) {
5483 if (VTList.NumVTs == 1)
5484 return getNode(Opcode, DL, VTList.VTs[0], Ops);
5488 // FIXME: figure out how to safely handle things like
5489 // int foo(int x) { return 1 << (x & 255); }
5490 // int bar() { return foo(256); }
5491 case ISD::SRA_PARTS:
5492 case ISD::SRL_PARTS:
5493 case ISD::SHL_PARTS:
5494 if (N3.getOpcode() == ISD::SIGN_EXTEND_INREG &&
5495 cast<VTSDNode>(N3.getOperand(1))->getVT() != MVT::i1)
5496 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5497 else if (N3.getOpcode() == ISD::AND)
5498 if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(N3.getOperand(1))) {
5499 // If the and is only masking out bits that cannot effect the shift,
5500 // eliminate the and.
5501 unsigned NumBits = VT.getScalarType().getSizeInBits()*2;
5502 if ((AndRHS->getValue() & (NumBits-1)) == NumBits-1)
5503 return getNode(Opcode, DL, VT, N1, N2, N3.getOperand(0));
5509 // Memoize the node unless it returns a flag.
5511 unsigned NumOps = Ops.size();
5512 if (VTList.VTs[VTList.NumVTs-1] != MVT::Glue) {
5513 FoldingSetNodeID ID;
5514 AddNodeIDNode(ID, Opcode, VTList, Ops);
5516 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP))
5517 return SDValue(E, 0);
5520 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5521 DL.getDebugLoc(), VTList, Ops[0]);
5522 } else if (NumOps == 2) {
5523 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5524 DL.getDebugLoc(), VTList, Ops[0],
5526 } else if (NumOps == 3) {
5527 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5528 DL.getDebugLoc(), VTList, Ops[0],
5531 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5534 CSEMap.InsertNode(N, IP);
5537 N = new (NodeAllocator) UnarySDNode(Opcode, DL.getIROrder(),
5538 DL.getDebugLoc(), VTList, Ops[0]);
5539 } else if (NumOps == 2) {
5540 N = new (NodeAllocator) BinarySDNode(Opcode, DL.getIROrder(),
5541 DL.getDebugLoc(), VTList, Ops[0],
5543 } else if (NumOps == 3) {
5544 N = new (NodeAllocator) TernarySDNode(Opcode, DL.getIROrder(),
5545 DL.getDebugLoc(), VTList, Ops[0],
5548 N = new (NodeAllocator) SDNode(Opcode, DL.getIROrder(), DL.getDebugLoc(),
5553 return SDValue(N, 0);
5556 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList) {
5557 return getNode(Opcode, DL, VTList, None);
5560 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5562 SDValue Ops[] = { N1 };
5563 return getNode(Opcode, DL, VTList, Ops);
5566 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5567 SDValue N1, SDValue N2) {
5568 SDValue Ops[] = { N1, N2 };
5569 return getNode(Opcode, DL, VTList, Ops);
5572 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5573 SDValue N1, SDValue N2, SDValue N3) {
5574 SDValue Ops[] = { N1, N2, N3 };
5575 return getNode(Opcode, DL, VTList, Ops);
5578 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5579 SDValue N1, SDValue N2, SDValue N3,
5581 SDValue Ops[] = { N1, N2, N3, N4 };
5582 return getNode(Opcode, DL, VTList, Ops);
5585 SDValue SelectionDAG::getNode(unsigned Opcode, SDLoc DL, SDVTList VTList,
5586 SDValue N1, SDValue N2, SDValue N3,
5587 SDValue N4, SDValue N5) {
5588 SDValue Ops[] = { N1, N2, N3, N4, N5 };
5589 return getNode(Opcode, DL, VTList, Ops);
5592 SDVTList SelectionDAG::getVTList(EVT VT) {
5593 return makeVTList(SDNode::getValueTypeList(VT), 1);
5596 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2) {
5597 FoldingSetNodeID ID;
5599 ID.AddInteger(VT1.getRawBits());
5600 ID.AddInteger(VT2.getRawBits());
5603 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5605 EVT *Array = Allocator.Allocate<EVT>(2);
5608 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 2);
5609 VTListMap.InsertNode(Result, IP);
5611 return Result->getSDVTList();
5614 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3) {
5615 FoldingSetNodeID ID;
5617 ID.AddInteger(VT1.getRawBits());
5618 ID.AddInteger(VT2.getRawBits());
5619 ID.AddInteger(VT3.getRawBits());
5622 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5624 EVT *Array = Allocator.Allocate<EVT>(3);
5628 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 3);
5629 VTListMap.InsertNode(Result, IP);
5631 return Result->getSDVTList();
5634 SDVTList SelectionDAG::getVTList(EVT VT1, EVT VT2, EVT VT3, EVT VT4) {
5635 FoldingSetNodeID ID;
5637 ID.AddInteger(VT1.getRawBits());
5638 ID.AddInteger(VT2.getRawBits());
5639 ID.AddInteger(VT3.getRawBits());
5640 ID.AddInteger(VT4.getRawBits());
5643 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5645 EVT *Array = Allocator.Allocate<EVT>(4);
5650 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, 4);
5651 VTListMap.InsertNode(Result, IP);
5653 return Result->getSDVTList();
5656 SDVTList SelectionDAG::getVTList(ArrayRef<EVT> VTs) {
5657 unsigned NumVTs = VTs.size();
5658 FoldingSetNodeID ID;
5659 ID.AddInteger(NumVTs);
5660 for (unsigned index = 0; index < NumVTs; index++) {
5661 ID.AddInteger(VTs[index].getRawBits());
5665 SDVTListNode *Result = VTListMap.FindNodeOrInsertPos(ID, IP);
5667 EVT *Array = Allocator.Allocate<EVT>(NumVTs);
5668 std::copy(VTs.begin(), VTs.end(), Array);
5669 Result = new (Allocator) SDVTListNode(ID.Intern(Allocator), Array, NumVTs);
5670 VTListMap.InsertNode(Result, IP);
5672 return Result->getSDVTList();
5676 /// UpdateNodeOperands - *Mutate* the specified node in-place to have the
5677 /// specified operands. If the resultant node already exists in the DAG,
5678 /// this does not modify the specified node, instead it returns the node that
5679 /// already exists. If the resultant node does not exist in the DAG, the
5680 /// input node is returned. As a degenerate case, if you specify the same
5681 /// input operands as the node already has, the input node is returned.
5682 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op) {
5683 assert(N->getNumOperands() == 1 && "Update with wrong number of operands");
5685 // Check to see if there is no change.
5686 if (Op == N->getOperand(0)) return N;
5688 // See if the modified node already exists.
5689 void *InsertPos = nullptr;
5690 if (SDNode *Existing = FindModifiedNodeSlot(N, Op, InsertPos))
5693 // Nope it doesn't. Remove the node from its current place in the maps.
5695 if (!RemoveNodeFromCSEMaps(N))
5696 InsertPos = nullptr;
5698 // Now we update the operands.
5699 N->OperandList[0].set(Op);
5701 // If this gets put into a CSE map, add it.
5702 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5706 SDNode *SelectionDAG::UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2) {
5707 assert(N->getNumOperands() == 2 && "Update with wrong number of operands");
5709 // Check to see if there is no change.
5710 if (Op1 == N->getOperand(0) && Op2 == N->getOperand(1))
5711 return N; // No operands changed, just return the input node.
5713 // See if the modified node already exists.
5714 void *InsertPos = nullptr;
5715 if (SDNode *Existing = FindModifiedNodeSlot(N, Op1, Op2, InsertPos))
5718 // Nope it doesn't. Remove the node from its current place in the maps.
5720 if (!RemoveNodeFromCSEMaps(N))
5721 InsertPos = nullptr;
5723 // Now we update the operands.
5724 if (N->OperandList[0] != Op1)
5725 N->OperandList[0].set(Op1);
5726 if (N->OperandList[1] != Op2)
5727 N->OperandList[1].set(Op2);
5729 // If this gets put into a CSE map, add it.
5730 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5734 SDNode *SelectionDAG::
5735 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2, SDValue Op3) {
5736 SDValue Ops[] = { Op1, Op2, Op3 };
5737 return UpdateNodeOperands(N, Ops);
5740 SDNode *SelectionDAG::
5741 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5742 SDValue Op3, SDValue Op4) {
5743 SDValue Ops[] = { Op1, Op2, Op3, Op4 };
5744 return UpdateNodeOperands(N, Ops);
5747 SDNode *SelectionDAG::
5748 UpdateNodeOperands(SDNode *N, SDValue Op1, SDValue Op2,
5749 SDValue Op3, SDValue Op4, SDValue Op5) {
5750 SDValue Ops[] = { Op1, Op2, Op3, Op4, Op5 };
5751 return UpdateNodeOperands(N, Ops);
5754 SDNode *SelectionDAG::
5755 UpdateNodeOperands(SDNode *N, ArrayRef<SDValue> Ops) {
5756 unsigned NumOps = Ops.size();
5757 assert(N->getNumOperands() == NumOps &&
5758 "Update with wrong number of operands");
5760 // If no operands changed just return the input node.
5761 if (std::equal(Ops.begin(), Ops.end(), N->op_begin()))
5764 // See if the modified node already exists.
5765 void *InsertPos = nullptr;
5766 if (SDNode *Existing = FindModifiedNodeSlot(N, Ops, InsertPos))
5769 // Nope it doesn't. Remove the node from its current place in the maps.
5771 if (!RemoveNodeFromCSEMaps(N))
5772 InsertPos = nullptr;
5774 // Now we update the operands.
5775 for (unsigned i = 0; i != NumOps; ++i)
5776 if (N->OperandList[i] != Ops[i])
5777 N->OperandList[i].set(Ops[i]);
5779 // If this gets put into a CSE map, add it.
5780 if (InsertPos) CSEMap.InsertNode(N, InsertPos);
5784 /// DropOperands - Release the operands and set this node to have
5786 void SDNode::DropOperands() {
5787 // Unlike the code in MorphNodeTo that does this, we don't need to
5788 // watch for dead nodes here.
5789 for (op_iterator I = op_begin(), E = op_end(); I != E; ) {
5795 /// SelectNodeTo - These are wrappers around MorphNodeTo that accept a
5798 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5800 SDVTList VTs = getVTList(VT);
5801 return SelectNodeTo(N, MachineOpc, VTs, None);
5804 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5805 EVT VT, SDValue Op1) {
5806 SDVTList VTs = getVTList(VT);
5807 SDValue Ops[] = { Op1 };
5808 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5811 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5812 EVT VT, SDValue Op1,
5814 SDVTList VTs = getVTList(VT);
5815 SDValue Ops[] = { Op1, Op2 };
5816 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5819 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5820 EVT VT, SDValue Op1,
5821 SDValue Op2, SDValue Op3) {
5822 SDVTList VTs = getVTList(VT);
5823 SDValue Ops[] = { Op1, Op2, Op3 };
5824 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5827 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5828 EVT VT, ArrayRef<SDValue> Ops) {
5829 SDVTList VTs = getVTList(VT);
5830 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5833 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5834 EVT VT1, EVT VT2, ArrayRef<SDValue> Ops) {
5835 SDVTList VTs = getVTList(VT1, VT2);
5836 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5839 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5841 SDVTList VTs = getVTList(VT1, VT2);
5842 return SelectNodeTo(N, MachineOpc, VTs, None);
5845 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5846 EVT VT1, EVT VT2, EVT VT3,
5847 ArrayRef<SDValue> Ops) {
5848 SDVTList VTs = getVTList(VT1, VT2, VT3);
5849 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5852 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5853 EVT VT1, EVT VT2, EVT VT3, EVT VT4,
5854 ArrayRef<SDValue> Ops) {
5855 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
5856 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5859 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5862 SDVTList VTs = getVTList(VT1, VT2);
5863 SDValue Ops[] = { Op1 };
5864 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5867 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5869 SDValue Op1, SDValue Op2) {
5870 SDVTList VTs = getVTList(VT1, VT2);
5871 SDValue Ops[] = { Op1, Op2 };
5872 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5875 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5877 SDValue Op1, SDValue Op2,
5879 SDVTList VTs = getVTList(VT1, VT2);
5880 SDValue Ops[] = { Op1, Op2, Op3 };
5881 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5884 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5885 EVT VT1, EVT VT2, EVT VT3,
5886 SDValue Op1, SDValue Op2,
5888 SDVTList VTs = getVTList(VT1, VT2, VT3);
5889 SDValue Ops[] = { Op1, Op2, Op3 };
5890 return SelectNodeTo(N, MachineOpc, VTs, Ops);
5893 SDNode *SelectionDAG::SelectNodeTo(SDNode *N, unsigned MachineOpc,
5894 SDVTList VTs,ArrayRef<SDValue> Ops) {
5895 N = MorphNodeTo(N, ~MachineOpc, VTs, Ops);
5896 // Reset the NodeID to -1.
5901 /// UpdadeSDLocOnMergedSDNode - If the opt level is -O0 then it throws away
5902 /// the line number information on the merged node since it is not possible to
5903 /// preserve the information that operation is associated with multiple lines.
5904 /// This will make the debugger working better at -O0, were there is a higher
5905 /// probability having other instructions associated with that line.
5907 /// For IROrder, we keep the smaller of the two
5908 SDNode *SelectionDAG::UpdadeSDLocOnMergedSDNode(SDNode *N, SDLoc OLoc) {
5909 DebugLoc NLoc = N->getDebugLoc();
5910 if (NLoc && OptLevel == CodeGenOpt::None && OLoc.getDebugLoc() != NLoc) {
5911 N->setDebugLoc(DebugLoc());
5913 unsigned Order = std::min(N->getIROrder(), OLoc.getIROrder());
5914 N->setIROrder(Order);
5918 /// MorphNodeTo - This *mutates* the specified node to have the specified
5919 /// return type, opcode, and operands.
5921 /// Note that MorphNodeTo returns the resultant node. If there is already a
5922 /// node of the specified opcode and operands, it returns that node instead of
5923 /// the current one. Note that the SDLoc need not be the same.
5925 /// Using MorphNodeTo is faster than creating a new node and swapping it in
5926 /// with ReplaceAllUsesWith both because it often avoids allocating a new
5927 /// node, and because it doesn't require CSE recalculation for any of
5928 /// the node's users.
5930 /// However, note that MorphNodeTo recursively deletes dead nodes from the DAG.
5931 /// As a consequence it isn't appropriate to use from within the DAG combiner or
5932 /// the legalizer which maintain worklists that would need to be updated when
5933 /// deleting things.
5934 SDNode *SelectionDAG::MorphNodeTo(SDNode *N, unsigned Opc,
5935 SDVTList VTs, ArrayRef<SDValue> Ops) {
5936 unsigned NumOps = Ops.size();
5937 // If an identical node already exists, use it.
5939 if (VTs.VTs[VTs.NumVTs-1] != MVT::Glue) {
5940 FoldingSetNodeID ID;
5941 AddNodeIDNode(ID, Opc, VTs, Ops);
5942 if (SDNode *ON = FindNodeOrInsertPos(ID, N->getDebugLoc(), IP))
5943 return UpdadeSDLocOnMergedSDNode(ON, SDLoc(N));
5946 if (!RemoveNodeFromCSEMaps(N))
5949 // Start the morphing.
5951 N->ValueList = VTs.VTs;
5952 N->NumValues = VTs.NumVTs;
5954 // Clear the operands list, updating used nodes to remove this from their
5955 // use list. Keep track of any operands that become dead as a result.
5956 SmallPtrSet<SDNode*, 16> DeadNodeSet;
5957 for (SDNode::op_iterator I = N->op_begin(), E = N->op_end(); I != E; ) {
5959 SDNode *Used = Use.getNode();
5961 if (Used->use_empty())
5962 DeadNodeSet.insert(Used);
5965 if (MachineSDNode *MN = dyn_cast<MachineSDNode>(N)) {
5966 // Initialize the memory references information.
5967 MN->setMemRefs(nullptr, nullptr);
5968 // If NumOps is larger than the # of operands we can have in a
5969 // MachineSDNode, reallocate the operand list.
5970 if (NumOps > MN->NumOperands || !MN->OperandsNeedDelete) {
5971 if (MN->OperandsNeedDelete)
5972 delete[] MN->OperandList;
5973 if (NumOps > array_lengthof(MN->LocalOperands))
5974 // We're creating a final node that will live unmorphed for the
5975 // remainder of the current SelectionDAG iteration, so we can allocate
5976 // the operands directly out of a pool with no recycling metadata.
5977 MN->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
5978 Ops.data(), NumOps);
5980 MN->InitOperands(MN->LocalOperands, Ops.data(), NumOps);
5981 MN->OperandsNeedDelete = false;
5983 MN->InitOperands(MN->OperandList, Ops.data(), NumOps);
5985 // If NumOps is larger than the # of operands we currently have, reallocate
5986 // the operand list.
5987 if (NumOps > N->NumOperands) {
5988 if (N->OperandsNeedDelete)
5989 delete[] N->OperandList;
5990 N->InitOperands(new SDUse[NumOps], Ops.data(), NumOps);
5991 N->OperandsNeedDelete = true;
5993 N->InitOperands(N->OperandList, Ops.data(), NumOps);
5996 // Delete any nodes that are still dead after adding the uses for the
5998 if (!DeadNodeSet.empty()) {
5999 SmallVector<SDNode *, 16> DeadNodes;
6000 for (SDNode *N : DeadNodeSet)
6002 DeadNodes.push_back(N);
6003 RemoveDeadNodes(DeadNodes);
6007 CSEMap.InsertNode(N, IP); // Memoize the new node.
6012 /// getMachineNode - These are used for target selectors to create a new node
6013 /// with specified return type(s), MachineInstr opcode, and operands.
6015 /// Note that getMachineNode returns the resultant node. If there is already a
6016 /// node of the specified opcode and operands, it returns that node instead of
6017 /// the current one.
6019 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) {
6020 SDVTList VTs = getVTList(VT);
6021 return getMachineNode(Opcode, dl, VTs, None);
6025 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) {
6026 SDVTList VTs = getVTList(VT);
6027 SDValue Ops[] = { Op1 };
6028 return getMachineNode(Opcode, dl, VTs, Ops);
6032 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6033 SDValue Op1, SDValue Op2) {
6034 SDVTList VTs = getVTList(VT);
6035 SDValue Ops[] = { Op1, Op2 };
6036 return getMachineNode(Opcode, dl, VTs, Ops);
6040 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6041 SDValue Op1, SDValue Op2, SDValue Op3) {
6042 SDVTList VTs = getVTList(VT);
6043 SDValue Ops[] = { Op1, Op2, Op3 };
6044 return getMachineNode(Opcode, dl, VTs, Ops);
6048 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT,
6049 ArrayRef<SDValue> Ops) {
6050 SDVTList VTs = getVTList(VT);
6051 return getMachineNode(Opcode, dl, VTs, Ops);
6055 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1, EVT VT2) {
6056 SDVTList VTs = getVTList(VT1, VT2);
6057 return getMachineNode(Opcode, dl, VTs, None);
6061 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6062 EVT VT1, EVT VT2, SDValue Op1) {
6063 SDVTList VTs = getVTList(VT1, VT2);
6064 SDValue Ops[] = { Op1 };
6065 return getMachineNode(Opcode, dl, VTs, Ops);
6069 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6070 EVT VT1, EVT VT2, SDValue Op1, SDValue Op2) {
6071 SDVTList VTs = getVTList(VT1, VT2);
6072 SDValue Ops[] = { Op1, Op2 };
6073 return getMachineNode(Opcode, dl, VTs, Ops);
6077 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6078 EVT VT1, EVT VT2, SDValue Op1,
6079 SDValue Op2, SDValue Op3) {
6080 SDVTList VTs = getVTList(VT1, VT2);
6081 SDValue Ops[] = { Op1, Op2, Op3 };
6082 return getMachineNode(Opcode, dl, VTs, Ops);
6086 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6088 ArrayRef<SDValue> Ops) {
6089 SDVTList VTs = getVTList(VT1, VT2);
6090 return getMachineNode(Opcode, dl, VTs, Ops);
6094 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6095 EVT VT1, EVT VT2, EVT VT3,
6096 SDValue Op1, SDValue Op2) {
6097 SDVTList VTs = getVTList(VT1, VT2, VT3);
6098 SDValue Ops[] = { Op1, Op2 };
6099 return getMachineNode(Opcode, dl, VTs, Ops);
6103 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6104 EVT VT1, EVT VT2, EVT VT3,
6105 SDValue Op1, SDValue Op2, SDValue Op3) {
6106 SDVTList VTs = getVTList(VT1, VT2, VT3);
6107 SDValue Ops[] = { Op1, Op2, Op3 };
6108 return getMachineNode(Opcode, dl, VTs, Ops);
6112 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6113 EVT VT1, EVT VT2, EVT VT3,
6114 ArrayRef<SDValue> Ops) {
6115 SDVTList VTs = getVTList(VT1, VT2, VT3);
6116 return getMachineNode(Opcode, dl, VTs, Ops);
6120 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl, EVT VT1,
6121 EVT VT2, EVT VT3, EVT VT4,
6122 ArrayRef<SDValue> Ops) {
6123 SDVTList VTs = getVTList(VT1, VT2, VT3, VT4);
6124 return getMachineNode(Opcode, dl, VTs, Ops);
6128 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc dl,
6129 ArrayRef<EVT> ResultTys,
6130 ArrayRef<SDValue> Ops) {
6131 SDVTList VTs = getVTList(ResultTys);
6132 return getMachineNode(Opcode, dl, VTs, Ops);
6136 SelectionDAG::getMachineNode(unsigned Opcode, SDLoc DL, SDVTList VTs,
6137 ArrayRef<SDValue> OpsArray) {
6138 bool DoCSE = VTs.VTs[VTs.NumVTs-1] != MVT::Glue;
6141 const SDValue *Ops = OpsArray.data();
6142 unsigned NumOps = OpsArray.size();
6145 FoldingSetNodeID ID;
6146 AddNodeIDNode(ID, ~Opcode, VTs, OpsArray);
6148 if (SDNode *E = FindNodeOrInsertPos(ID, DL.getDebugLoc(), IP)) {
6149 return cast<MachineSDNode>(UpdadeSDLocOnMergedSDNode(E, DL));
6153 // Allocate a new MachineSDNode.
6154 N = new (NodeAllocator) MachineSDNode(~Opcode, DL.getIROrder(),
6155 DL.getDebugLoc(), VTs);
6157 // Initialize the operands list.
6158 if (NumOps > array_lengthof(N->LocalOperands))
6159 // We're creating a final node that will live unmorphed for the
6160 // remainder of the current SelectionDAG iteration, so we can allocate
6161 // the operands directly out of a pool with no recycling metadata.
6162 N->InitOperands(OperandAllocator.Allocate<SDUse>(NumOps),
6165 N->InitOperands(N->LocalOperands, Ops, NumOps);
6166 N->OperandsNeedDelete = false;
6169 CSEMap.InsertNode(N, IP);
6175 /// getTargetExtractSubreg - A convenience function for creating
6176 /// TargetOpcode::EXTRACT_SUBREG nodes.
6178 SelectionDAG::getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT,
6180 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6181 SDNode *Subreg = getMachineNode(TargetOpcode::EXTRACT_SUBREG, DL,
6182 VT, Operand, SRIdxVal);
6183 return SDValue(Subreg, 0);
6186 /// getTargetInsertSubreg - A convenience function for creating
6187 /// TargetOpcode::INSERT_SUBREG nodes.
6189 SelectionDAG::getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT,
6190 SDValue Operand, SDValue Subreg) {
6191 SDValue SRIdxVal = getTargetConstant(SRIdx, DL, MVT::i32);
6192 SDNode *Result = getMachineNode(TargetOpcode::INSERT_SUBREG, DL,
6193 VT, Operand, Subreg, SRIdxVal);
6194 return SDValue(Result, 0);
6197 /// getNodeIfExists - Get the specified node if it's already available, or
6198 /// else return NULL.
6199 SDNode *SelectionDAG::getNodeIfExists(unsigned Opcode, SDVTList VTList,
6200 ArrayRef<SDValue> Ops,
6201 const SDNodeFlags *Flags) {
6202 if (VTList.VTs[VTList.NumVTs - 1] != MVT::Glue) {
6203 FoldingSetNodeID ID;
6204 AddNodeIDNode(ID, Opcode, VTList, Ops);
6205 AddNodeIDFlags(ID, Opcode, Flags);
6207 if (SDNode *E = FindNodeOrInsertPos(ID, DebugLoc(), IP))
6213 /// getDbgValue - Creates a SDDbgValue node.
6216 SDDbgValue *SelectionDAG::getDbgValue(MDNode *Var, MDNode *Expr, SDNode *N,
6217 unsigned R, bool IsIndirect, uint64_t Off,
6218 DebugLoc DL, unsigned O) {
6219 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6220 "Expected inlined-at fields to agree");
6221 return new (DbgInfo->getAlloc())
6222 SDDbgValue(Var, Expr, N, R, IsIndirect, Off, DL, O);
6226 SDDbgValue *SelectionDAG::getConstantDbgValue(MDNode *Var, MDNode *Expr,
6227 const Value *C, uint64_t Off,
6228 DebugLoc DL, unsigned O) {
6229 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6230 "Expected inlined-at fields to agree");
6231 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, C, Off, DL, O);
6235 SDDbgValue *SelectionDAG::getFrameIndexDbgValue(MDNode *Var, MDNode *Expr,
6236 unsigned FI, uint64_t Off,
6237 DebugLoc DL, unsigned O) {
6238 assert(cast<DILocalVariable>(Var)->isValidLocationForIntrinsic(DL) &&
6239 "Expected inlined-at fields to agree");
6240 return new (DbgInfo->getAlloc()) SDDbgValue(Var, Expr, FI, Off, DL, O);
6245 /// RAUWUpdateListener - Helper for ReplaceAllUsesWith - When the node
6246 /// pointed to by a use iterator is deleted, increment the use iterator
6247 /// so that it doesn't dangle.
6249 class RAUWUpdateListener : public SelectionDAG::DAGUpdateListener {
6250 SDNode::use_iterator &UI;
6251 SDNode::use_iterator &UE;
6253 void NodeDeleted(SDNode *N, SDNode *E) override {
6254 // Increment the iterator as needed.
6255 while (UI != UE && N == *UI)
6260 RAUWUpdateListener(SelectionDAG &d,
6261 SDNode::use_iterator &ui,
6262 SDNode::use_iterator &ue)
6263 : SelectionDAG::DAGUpdateListener(d), UI(ui), UE(ue) {}
6268 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6269 /// This can cause recursive merging of nodes in the DAG.
6271 /// This version assumes From has a single result value.
6273 void SelectionDAG::ReplaceAllUsesWith(SDValue FromN, SDValue To) {
6274 SDNode *From = FromN.getNode();
6275 assert(From->getNumValues() == 1 && FromN.getResNo() == 0 &&
6276 "Cannot replace with this method!");
6277 assert(From != To.getNode() && "Cannot replace uses of with self");
6279 // Iterate over all the existing uses of From. New uses will be added
6280 // to the beginning of the use list, which we avoid visiting.
6281 // This specifically avoids visiting uses of From that arise while the
6282 // replacement is happening, because any such uses would be the result
6283 // of CSE: If an existing node looks like From after one of its operands
6284 // is replaced by To, we don't want to replace of all its users with To
6285 // too. See PR3018 for more info.
6286 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6287 RAUWUpdateListener Listener(*this, UI, UE);
6291 // This node is about to morph, remove its old self from the CSE maps.
6292 RemoveNodeFromCSEMaps(User);
6294 // A user can appear in a use list multiple times, and when this
6295 // happens the uses are usually next to each other in the list.
6296 // To help reduce the number of CSE recomputations, process all
6297 // the uses of this user that we can find this way.
6299 SDUse &Use = UI.getUse();
6302 } while (UI != UE && *UI == User);
6304 // Now that we have modified User, add it back to the CSE maps. If it
6305 // already exists there, recursively merge the results together.
6306 AddModifiedNodeToCSEMaps(User);
6309 // If we just RAUW'd the root, take note.
6310 if (FromN == getRoot())
6314 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6315 /// This can cause recursive merging of nodes in the DAG.
6317 /// This version assumes that for each value of From, there is a
6318 /// corresponding value in To in the same position with the same type.
6320 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, SDNode *To) {
6322 for (unsigned i = 0, e = From->getNumValues(); i != e; ++i)
6323 assert((!From->hasAnyUseOfValue(i) ||
6324 From->getValueType(i) == To->getValueType(i)) &&
6325 "Cannot use this version of ReplaceAllUsesWith!");
6328 // Handle the trivial case.
6332 // Iterate over just the existing users of From. See the comments in
6333 // the ReplaceAllUsesWith above.
6334 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6335 RAUWUpdateListener Listener(*this, UI, UE);
6339 // This node is about to morph, remove its old self from the CSE maps.
6340 RemoveNodeFromCSEMaps(User);
6342 // A user can appear in a use list multiple times, and when this
6343 // happens the uses are usually next to each other in the list.
6344 // To help reduce the number of CSE recomputations, process all
6345 // the uses of this user that we can find this way.
6347 SDUse &Use = UI.getUse();
6350 } while (UI != UE && *UI == User);
6352 // Now that we have modified User, add it back to the CSE maps. If it
6353 // already exists there, recursively merge the results together.
6354 AddModifiedNodeToCSEMaps(User);
6357 // If we just RAUW'd the root, take note.
6358 if (From == getRoot().getNode())
6359 setRoot(SDValue(To, getRoot().getResNo()));
6362 /// ReplaceAllUsesWith - Modify anything using 'From' to use 'To' instead.
6363 /// This can cause recursive merging of nodes in the DAG.
6365 /// This version can replace From with any result values. To must match the
6366 /// number and types of values returned by From.
6367 void SelectionDAG::ReplaceAllUsesWith(SDNode *From, const SDValue *To) {
6368 if (From->getNumValues() == 1) // Handle the simple case efficiently.
6369 return ReplaceAllUsesWith(SDValue(From, 0), To[0]);
6371 // Iterate over just the existing users of From. See the comments in
6372 // the ReplaceAllUsesWith above.
6373 SDNode::use_iterator UI = From->use_begin(), UE = From->use_end();
6374 RAUWUpdateListener Listener(*this, UI, UE);
6378 // This node is about to morph, remove its old self from the CSE maps.
6379 RemoveNodeFromCSEMaps(User);
6381 // A user can appear in a use list multiple times, and when this
6382 // happens the uses are usually next to each other in the list.
6383 // To help reduce the number of CSE recomputations, process all
6384 // the uses of this user that we can find this way.
6386 SDUse &Use = UI.getUse();
6387 const SDValue &ToOp = To[Use.getResNo()];
6390 } while (UI != UE && *UI == User);
6392 // Now that we have modified User, add it back to the CSE maps. If it
6393 // already exists there, recursively merge the results together.
6394 AddModifiedNodeToCSEMaps(User);
6397 // If we just RAUW'd the root, take note.
6398 if (From == getRoot().getNode())
6399 setRoot(SDValue(To[getRoot().getResNo()]));
6402 /// ReplaceAllUsesOfValueWith - Replace any uses of From with To, leaving
6403 /// uses of other values produced by From.getNode() alone. The Deleted
6404 /// vector is handled the same way as for ReplaceAllUsesWith.
6405 void SelectionDAG::ReplaceAllUsesOfValueWith(SDValue From, SDValue To){
6406 // Handle the really simple, really trivial case efficiently.
6407 if (From == To) return;
6409 // Handle the simple, trivial, case efficiently.
6410 if (From.getNode()->getNumValues() == 1) {
6411 ReplaceAllUsesWith(From, To);
6415 // Iterate over just the existing users of From. See the comments in
6416 // the ReplaceAllUsesWith above.
6417 SDNode::use_iterator UI = From.getNode()->use_begin(),
6418 UE = From.getNode()->use_end();
6419 RAUWUpdateListener Listener(*this, UI, UE);
6422 bool UserRemovedFromCSEMaps = false;
6424 // A user can appear in a use list multiple times, and when this
6425 // happens the uses are usually next to each other in the list.
6426 // To help reduce the number of CSE recomputations, process all
6427 // the uses of this user that we can find this way.
6429 SDUse &Use = UI.getUse();
6431 // Skip uses of different values from the same node.
6432 if (Use.getResNo() != From.getResNo()) {
6437 // If this node hasn't been modified yet, it's still in the CSE maps,
6438 // so remove its old self from the CSE maps.
6439 if (!UserRemovedFromCSEMaps) {
6440 RemoveNodeFromCSEMaps(User);
6441 UserRemovedFromCSEMaps = true;
6446 } while (UI != UE && *UI == User);
6448 // We are iterating over all uses of the From node, so if a use
6449 // doesn't use the specific value, no changes are made.
6450 if (!UserRemovedFromCSEMaps)
6453 // Now that we have modified User, add it back to the CSE maps. If it
6454 // already exists there, recursively merge the results together.
6455 AddModifiedNodeToCSEMaps(User);
6458 // If we just RAUW'd the root, take note.
6459 if (From == getRoot())
6464 /// UseMemo - This class is used by SelectionDAG::ReplaceAllUsesOfValuesWith
6465 /// to record information about a use.
6472 /// operator< - Sort Memos by User.
6473 bool operator<(const UseMemo &L, const UseMemo &R) {
6474 return (intptr_t)L.User < (intptr_t)R.User;
6478 /// ReplaceAllUsesOfValuesWith - Replace any uses of From with To, leaving
6479 /// uses of other values produced by From.getNode() alone. The same value
6480 /// may appear in both the From and To list. The Deleted vector is
6481 /// handled the same way as for ReplaceAllUsesWith.
6482 void SelectionDAG::ReplaceAllUsesOfValuesWith(const SDValue *From,
6485 // Handle the simple, trivial case efficiently.
6487 return ReplaceAllUsesOfValueWith(*From, *To);
6489 // Read up all the uses and make records of them. This helps
6490 // processing new uses that are introduced during the
6491 // replacement process.
6492 SmallVector<UseMemo, 4> Uses;
6493 for (unsigned i = 0; i != Num; ++i) {
6494 unsigned FromResNo = From[i].getResNo();
6495 SDNode *FromNode = From[i].getNode();
6496 for (SDNode::use_iterator UI = FromNode->use_begin(),
6497 E = FromNode->use_end(); UI != E; ++UI) {
6498 SDUse &Use = UI.getUse();
6499 if (Use.getResNo() == FromResNo) {
6500 UseMemo Memo = { *UI, i, &Use };
6501 Uses.push_back(Memo);
6506 // Sort the uses, so that all the uses from a given User are together.
6507 std::sort(Uses.begin(), Uses.end());
6509 for (unsigned UseIndex = 0, UseIndexEnd = Uses.size();
6510 UseIndex != UseIndexEnd; ) {
6511 // We know that this user uses some value of From. If it is the right
6512 // value, update it.
6513 SDNode *User = Uses[UseIndex].User;
6515 // This node is about to morph, remove its old self from the CSE maps.
6516 RemoveNodeFromCSEMaps(User);
6518 // The Uses array is sorted, so all the uses for a given User
6519 // are next to each other in the list.
6520 // To help reduce the number of CSE recomputations, process all
6521 // the uses of this user that we can find this way.
6523 unsigned i = Uses[UseIndex].Index;
6524 SDUse &Use = *Uses[UseIndex].Use;
6528 } while (UseIndex != UseIndexEnd && Uses[UseIndex].User == User);
6530 // Now that we have modified User, add it back to the CSE maps. If it
6531 // already exists there, recursively merge the results together.
6532 AddModifiedNodeToCSEMaps(User);
6536 /// AssignTopologicalOrder - Assign a unique node id for each node in the DAG
6537 /// based on their topological order. It returns the maximum id and a vector
6538 /// of the SDNodes* in assigned order by reference.
6539 unsigned SelectionDAG::AssignTopologicalOrder() {
6541 unsigned DAGSize = 0;
6543 // SortedPos tracks the progress of the algorithm. Nodes before it are
6544 // sorted, nodes after it are unsorted. When the algorithm completes
6545 // it is at the end of the list.
6546 allnodes_iterator SortedPos = allnodes_begin();
6548 // Visit all the nodes. Move nodes with no operands to the front of
6549 // the list immediately. Annotate nodes that do have operands with their
6550 // operand count. Before we do this, the Node Id fields of the nodes
6551 // may contain arbitrary values. After, the Node Id fields for nodes
6552 // before SortedPos will contain the topological sort index, and the
6553 // Node Id fields for nodes At SortedPos and after will contain the
6554 // count of outstanding operands.
6555 for (allnodes_iterator I = allnodes_begin(),E = allnodes_end(); I != E; ) {
6557 checkForCycles(N, this);
6558 unsigned Degree = N->getNumOperands();
6560 // A node with no uses, add it to the result array immediately.
6561 N->setNodeId(DAGSize++);
6562 allnodes_iterator Q(N);
6564 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(Q));
6565 assert(SortedPos != AllNodes.end() && "Overran node list");
6568 // Temporarily use the Node Id as scratch space for the degree count.
6569 N->setNodeId(Degree);
6573 // Visit all the nodes. As we iterate, move nodes into sorted order,
6574 // such that by the time the end is reached all nodes will be sorted.
6575 for (SDNode &Node : allnodes()) {
6577 checkForCycles(N, this);
6578 // N is in sorted position, so all its uses have one less operand
6579 // that needs to be sorted.
6580 for (SDNode::use_iterator UI = N->use_begin(), UE = N->use_end();
6583 unsigned Degree = P->getNodeId();
6584 assert(Degree != 0 && "Invalid node degree");
6587 // All of P's operands are sorted, so P may sorted now.
6588 P->setNodeId(DAGSize++);
6590 SortedPos = AllNodes.insert(SortedPos, AllNodes.remove(P));
6591 assert(SortedPos != AllNodes.end() && "Overran node list");
6594 // Update P's outstanding operand count.
6595 P->setNodeId(Degree);
6598 if (&Node == SortedPos) {
6600 allnodes_iterator I(N);
6602 dbgs() << "Overran sorted position:\n";
6603 S->dumprFull(this); dbgs() << "\n";
6604 dbgs() << "Checking if this is due to cycles\n";
6605 checkForCycles(this, true);
6607 llvm_unreachable(nullptr);
6611 assert(SortedPos == AllNodes.end() &&
6612 "Topological sort incomplete!");
6613 assert(AllNodes.front().getOpcode() == ISD::EntryToken &&
6614 "First node in topological sort is not the entry token!");
6615 assert(AllNodes.front().getNodeId() == 0 &&
6616 "First node in topological sort has non-zero id!");
6617 assert(AllNodes.front().getNumOperands() == 0 &&
6618 "First node in topological sort has operands!");
6619 assert(AllNodes.back().getNodeId() == (int)DAGSize-1 &&
6620 "Last node in topologic sort has unexpected id!");
6621 assert(AllNodes.back().use_empty() &&
6622 "Last node in topologic sort has users!");
6623 assert(DAGSize == allnodes_size() && "Node count mismatch!");
6627 /// AddDbgValue - Add a dbg_value SDNode. If SD is non-null that means the
6628 /// value is produced by SD.
6629 void SelectionDAG::AddDbgValue(SDDbgValue *DB, SDNode *SD, bool isParameter) {
6631 assert(DbgInfo->getSDDbgValues(SD).empty() || SD->getHasDebugValue());
6632 SD->setHasDebugValue(true);
6634 DbgInfo->add(DB, SD, isParameter);
6637 /// TransferDbgValues - Transfer SDDbgValues.
6638 void SelectionDAG::TransferDbgValues(SDValue From, SDValue To) {
6639 if (From == To || !From.getNode()->getHasDebugValue())
6641 SDNode *FromNode = From.getNode();
6642 SDNode *ToNode = To.getNode();
6643 ArrayRef<SDDbgValue *> DVs = GetDbgValues(FromNode);
6644 SmallVector<SDDbgValue *, 2> ClonedDVs;
6645 for (ArrayRef<SDDbgValue *>::iterator I = DVs.begin(), E = DVs.end();
6647 SDDbgValue *Dbg = *I;
6648 if (Dbg->getKind() == SDDbgValue::SDNODE) {
6650 getDbgValue(Dbg->getVariable(), Dbg->getExpression(), ToNode,
6651 To.getResNo(), Dbg->isIndirect(), Dbg->getOffset(),
6652 Dbg->getDebugLoc(), Dbg->getOrder());
6653 ClonedDVs.push_back(Clone);
6656 for (SmallVectorImpl<SDDbgValue *>::iterator I = ClonedDVs.begin(),
6657 E = ClonedDVs.end(); I != E; ++I)
6658 AddDbgValue(*I, ToNode, false);
6661 //===----------------------------------------------------------------------===//
6663 //===----------------------------------------------------------------------===//
6665 HandleSDNode::~HandleSDNode() {
6669 GlobalAddressSDNode::GlobalAddressSDNode(unsigned Opc, unsigned Order,
6670 DebugLoc DL, const GlobalValue *GA,
6671 EVT VT, int64_t o, unsigned char TF)
6672 : SDNode(Opc, Order, DL, getSDVTList(VT)), Offset(o), TargetFlags(TF) {
6676 AddrSpaceCastSDNode::AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT,
6677 SDValue X, unsigned SrcAS,
6679 : UnarySDNode(ISD::ADDRSPACECAST, Order, dl, getSDVTList(VT), X),
6680 SrcAddrSpace(SrcAS), DestAddrSpace(DestAS) {}
6682 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6683 EVT memvt, MachineMemOperand *mmo)
6684 : SDNode(Opc, Order, dl, VTs), MemoryVT(memvt), MMO(mmo) {
6685 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6686 MMO->isNonTemporal(), MMO->isInvariant());
6687 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6688 assert(isNonTemporal() == MMO->isNonTemporal() &&
6689 "Non-temporal encoding error!");
6690 // We check here that the size of the memory operand fits within the size of
6691 // the MMO. This is because the MMO might indicate only a possible address
6692 // range instead of specifying the affected memory addresses precisely.
6693 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6696 MemSDNode::MemSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs,
6697 ArrayRef<SDValue> Ops, EVT memvt, MachineMemOperand *mmo)
6698 : SDNode(Opc, Order, dl, VTs, Ops),
6699 MemoryVT(memvt), MMO(mmo) {
6700 SubclassData = encodeMemSDNodeFlags(0, ISD::UNINDEXED, MMO->isVolatile(),
6701 MMO->isNonTemporal(), MMO->isInvariant());
6702 assert(isVolatile() == MMO->isVolatile() && "Volatile encoding error!");
6703 assert(memvt.getStoreSize() <= MMO->getSize() && "Size mismatch!");
6706 /// Profile - Gather unique data for the node.
6708 void SDNode::Profile(FoldingSetNodeID &ID) const {
6709 AddNodeIDNode(ID, this);
6714 std::vector<EVT> VTs;
6717 VTs.reserve(MVT::LAST_VALUETYPE);
6718 for (unsigned i = 0; i < MVT::LAST_VALUETYPE; ++i)
6719 VTs.push_back(MVT((MVT::SimpleValueType)i));
6724 static ManagedStatic<std::set<EVT, EVT::compareRawBits> > EVTs;
6725 static ManagedStatic<EVTArray> SimpleVTArray;
6726 static ManagedStatic<sys::SmartMutex<true> > VTMutex;
6728 /// getValueTypeList - Return a pointer to the specified value type.
6730 const EVT *SDNode::getValueTypeList(EVT VT) {
6731 if (VT.isExtended()) {
6732 sys::SmartScopedLock<true> Lock(*VTMutex);
6733 return &(*EVTs->insert(VT).first);
6735 assert(VT.getSimpleVT() < MVT::LAST_VALUETYPE &&
6736 "Value type out of range!");
6737 return &SimpleVTArray->VTs[VT.getSimpleVT().SimpleTy];
6741 /// hasNUsesOfValue - Return true if there are exactly NUSES uses of the
6742 /// indicated value. This method ignores uses of other values defined by this
6744 bool SDNode::hasNUsesOfValue(unsigned NUses, unsigned Value) const {
6745 assert(Value < getNumValues() && "Bad value!");
6747 // TODO: Only iterate over uses of a given value of the node
6748 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI) {
6749 if (UI.getUse().getResNo() == Value) {
6756 // Found exactly the right number of uses?
6761 /// hasAnyUseOfValue - Return true if there are any use of the indicated
6762 /// value. This method ignores uses of other values defined by this operation.
6763 bool SDNode::hasAnyUseOfValue(unsigned Value) const {
6764 assert(Value < getNumValues() && "Bad value!");
6766 for (SDNode::use_iterator UI = use_begin(), E = use_end(); UI != E; ++UI)
6767 if (UI.getUse().getResNo() == Value)
6774 /// isOnlyUserOf - Return true if this node is the only use of N.
6776 bool SDNode::isOnlyUserOf(const SDNode *N) const {
6778 for (SDNode::use_iterator I = N->use_begin(), E = N->use_end(); I != E; ++I) {
6789 /// isOperand - Return true if this node is an operand of N.
6791 bool SDValue::isOperandOf(const SDNode *N) const {
6792 for (const SDValue &Op : N->op_values())
6798 bool SDNode::isOperandOf(const SDNode *N) const {
6799 for (const SDValue &Op : N->op_values())
6800 if (this == Op.getNode())
6805 /// reachesChainWithoutSideEffects - Return true if this operand (which must
6806 /// be a chain) reaches the specified operand without crossing any
6807 /// side-effecting instructions on any chain path. In practice, this looks
6808 /// through token factors and non-volatile loads. In order to remain efficient,
6809 /// this only looks a couple of nodes in, it does not do an exhaustive search.
6810 bool SDValue::reachesChainWithoutSideEffects(SDValue Dest,
6811 unsigned Depth) const {
6812 if (*this == Dest) return true;
6814 // Don't search too deeply, we just want to be able to see through
6815 // TokenFactor's etc.
6816 if (Depth == 0) return false;
6818 // If this is a token factor, all inputs to the TF happen in parallel. If any
6819 // of the operands of the TF does not reach dest, then we cannot do the xform.
6820 if (getOpcode() == ISD::TokenFactor) {
6821 for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
6822 if (!getOperand(i).reachesChainWithoutSideEffects(Dest, Depth-1))
6827 // Loads don't have side effects, look through them.
6828 if (LoadSDNode *Ld = dyn_cast<LoadSDNode>(*this)) {
6829 if (!Ld->isVolatile())
6830 return Ld->getChain().reachesChainWithoutSideEffects(Dest, Depth-1);
6835 /// hasPredecessor - Return true if N is a predecessor of this node.
6836 /// N is either an operand of this node, or can be reached by recursively
6837 /// traversing up the operands.
6838 /// NOTE: This is an expensive method. Use it carefully.
6839 bool SDNode::hasPredecessor(const SDNode *N) const {
6840 SmallPtrSet<const SDNode *, 32> Visited;
6841 SmallVector<const SDNode *, 16> Worklist;
6842 return hasPredecessorHelper(N, Visited, Worklist);
6846 SDNode::hasPredecessorHelper(const SDNode *N,
6847 SmallPtrSetImpl<const SDNode *> &Visited,
6848 SmallVectorImpl<const SDNode *> &Worklist) const {
6849 if (Visited.empty()) {
6850 Worklist.push_back(this);
6852 // Take a look in the visited set. If we've already encountered this node
6853 // we needn't search further.
6854 if (Visited.count(N))
6858 // Haven't visited N yet. Continue the search.
6859 while (!Worklist.empty()) {
6860 const SDNode *M = Worklist.pop_back_val();
6861 for (const SDValue &OpV : M->op_values()) {
6862 SDNode *Op = OpV.getNode();
6863 if (Visited.insert(Op).second)
6864 Worklist.push_back(Op);
6873 uint64_t SDNode::getConstantOperandVal(unsigned Num) const {
6874 assert(Num < NumOperands && "Invalid child # of SDNode!");
6875 return cast<ConstantSDNode>(OperandList[Num])->getZExtValue();
6878 const SDNodeFlags *SDNode::getFlags() const {
6879 if (auto *FlagsNode = dyn_cast<BinaryWithFlagsSDNode>(this))
6880 return &FlagsNode->Flags;
6884 SDValue SelectionDAG::UnrollVectorOp(SDNode *N, unsigned ResNE) {
6885 assert(N->getNumValues() == 1 &&
6886 "Can't unroll a vector with multiple results!");
6888 EVT VT = N->getValueType(0);
6889 unsigned NE = VT.getVectorNumElements();
6890 EVT EltVT = VT.getVectorElementType();
6893 SmallVector<SDValue, 8> Scalars;
6894 SmallVector<SDValue, 4> Operands(N->getNumOperands());
6896 // If ResNE is 0, fully unroll the vector op.
6899 else if (NE > ResNE)
6903 for (i= 0; i != NE; ++i) {
6904 for (unsigned j = 0, e = N->getNumOperands(); j != e; ++j) {
6905 SDValue Operand = N->getOperand(j);
6906 EVT OperandVT = Operand.getValueType();
6907 if (OperandVT.isVector()) {
6908 // A vector operand; extract a single element.
6909 EVT OperandEltVT = OperandVT.getVectorElementType();
6911 getNode(ISD::EXTRACT_VECTOR_ELT, dl, OperandEltVT, Operand,
6912 getConstant(i, dl, TLI->getVectorIdxTy(getDataLayout())));
6914 // A scalar operand; just use it as is.
6915 Operands[j] = Operand;
6919 switch (N->getOpcode()) {
6921 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands,
6926 Scalars.push_back(getNode(ISD::SELECT, dl, EltVT, Operands));
6933 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT, Operands[0],
6934 getShiftAmountOperand(Operands[0].getValueType(),
6937 case ISD::SIGN_EXTEND_INREG:
6938 case ISD::FP_ROUND_INREG: {
6939 EVT ExtVT = cast<VTSDNode>(Operands[1])->getVT().getVectorElementType();
6940 Scalars.push_back(getNode(N->getOpcode(), dl, EltVT,
6942 getValueType(ExtVT)));
6947 for (; i < ResNE; ++i)
6948 Scalars.push_back(getUNDEF(EltVT));
6950 return getNode(ISD::BUILD_VECTOR, dl,
6951 EVT::getVectorVT(*getContext(), EltVT, ResNE), Scalars);
6955 /// isConsecutiveLoad - Return true if LD is loading 'Bytes' bytes from a
6956 /// location that is 'Dist' units away from the location that the 'Base' load
6957 /// is loading from.
6958 bool SelectionDAG::isConsecutiveLoad(LoadSDNode *LD, LoadSDNode *Base,
6959 unsigned Bytes, int Dist) const {
6960 if (LD->getChain() != Base->getChain())
6962 EVT VT = LD->getValueType(0);
6963 if (VT.getSizeInBits() / 8 != Bytes)
6966 SDValue Loc = LD->getOperand(1);
6967 SDValue BaseLoc = Base->getOperand(1);
6968 if (Loc.getOpcode() == ISD::FrameIndex) {
6969 if (BaseLoc.getOpcode() != ISD::FrameIndex)
6971 const MachineFrameInfo *MFI = getMachineFunction().getFrameInfo();
6972 int FI = cast<FrameIndexSDNode>(Loc)->getIndex();
6973 int BFI = cast<FrameIndexSDNode>(BaseLoc)->getIndex();
6974 int FS = MFI->getObjectSize(FI);
6975 int BFS = MFI->getObjectSize(BFI);
6976 if (FS != BFS || FS != (int)Bytes) return false;
6977 return MFI->getObjectOffset(FI) == (MFI->getObjectOffset(BFI) + Dist*Bytes);
6981 if (isBaseWithConstantOffset(Loc)) {
6982 int64_t LocOffset = cast<ConstantSDNode>(Loc.getOperand(1))->getSExtValue();
6983 if (Loc.getOperand(0) == BaseLoc) {
6984 // If the base location is a simple address with no offset itself, then
6985 // the second load's first add operand should be the base address.
6986 if (LocOffset == Dist * (int)Bytes)
6988 } else if (isBaseWithConstantOffset(BaseLoc)) {
6989 // The base location itself has an offset, so subtract that value from the
6990 // second load's offset before comparing to distance * size.
6992 cast<ConstantSDNode>(BaseLoc.getOperand(1))->getSExtValue();
6993 if (Loc.getOperand(0) == BaseLoc.getOperand(0)) {
6994 if ((LocOffset - BOffset) == Dist * (int)Bytes)
6999 const GlobalValue *GV1 = nullptr;
7000 const GlobalValue *GV2 = nullptr;
7001 int64_t Offset1 = 0;
7002 int64_t Offset2 = 0;
7003 bool isGA1 = TLI->isGAPlusOffset(Loc.getNode(), GV1, Offset1);
7004 bool isGA2 = TLI->isGAPlusOffset(BaseLoc.getNode(), GV2, Offset2);
7005 if (isGA1 && isGA2 && GV1 == GV2)
7006 return Offset1 == (Offset2 + Dist*Bytes);
7011 /// InferPtrAlignment - Infer alignment of a load / store address. Return 0 if
7012 /// it cannot be inferred.
7013 unsigned SelectionDAG::InferPtrAlignment(SDValue Ptr) const {
7014 // If this is a GlobalAddress + cst, return the alignment.
7015 const GlobalValue *GV;
7016 int64_t GVOffset = 0;
7017 if (TLI->isGAPlusOffset(Ptr.getNode(), GV, GVOffset)) {
7018 unsigned PtrWidth = getDataLayout().getPointerTypeSizeInBits(GV->getType());
7019 APInt KnownZero(PtrWidth, 0), KnownOne(PtrWidth, 0);
7020 llvm::computeKnownBits(const_cast<GlobalValue *>(GV), KnownZero, KnownOne,
7022 unsigned AlignBits = KnownZero.countTrailingOnes();
7023 unsigned Align = AlignBits ? 1 << std::min(31U, AlignBits) : 0;
7025 return MinAlign(Align, GVOffset);
7028 // If this is a direct reference to a stack slot, use information about the
7029 // stack slot's alignment.
7030 int FrameIdx = 1 << 31;
7031 int64_t FrameOffset = 0;
7032 if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(Ptr)) {
7033 FrameIdx = FI->getIndex();
7034 } else if (isBaseWithConstantOffset(Ptr) &&
7035 isa<FrameIndexSDNode>(Ptr.getOperand(0))) {
7037 FrameIdx = cast<FrameIndexSDNode>(Ptr.getOperand(0))->getIndex();
7038 FrameOffset = Ptr.getConstantOperandVal(1);
7041 if (FrameIdx != (1 << 31)) {
7042 const MachineFrameInfo &MFI = *getMachineFunction().getFrameInfo();
7043 unsigned FIInfoAlign = MinAlign(MFI.getObjectAlignment(FrameIdx),
7051 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type
7052 /// which is split (or expanded) into two not necessarily identical pieces.
7053 std::pair<EVT, EVT> SelectionDAG::GetSplitDestVTs(const EVT &VT) const {
7054 // Currently all types are split in half.
7056 if (!VT.isVector()) {
7057 LoVT = HiVT = TLI->getTypeToTransformTo(*getContext(), VT);
7059 unsigned NumElements = VT.getVectorNumElements();
7060 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
7061 LoVT = HiVT = EVT::getVectorVT(*getContext(), VT.getVectorElementType(),
7064 return std::make_pair(LoVT, HiVT);
7067 /// SplitVector - Split the vector with EXTRACT_SUBVECTOR and return the
7069 std::pair<SDValue, SDValue>
7070 SelectionDAG::SplitVector(const SDValue &N, const SDLoc &DL, const EVT &LoVT,
7072 assert(LoVT.getVectorNumElements() + HiVT.getVectorNumElements() <=
7073 N.getValueType().getVectorNumElements() &&
7074 "More vector elements requested than available!");
7076 Lo = getNode(ISD::EXTRACT_SUBVECTOR, DL, LoVT, N,
7077 getConstant(0, DL, TLI->getVectorIdxTy(getDataLayout())));
7078 Hi = getNode(ISD::EXTRACT_SUBVECTOR, DL, HiVT, N,
7079 getConstant(LoVT.getVectorNumElements(), DL,
7080 TLI->getVectorIdxTy(getDataLayout())));
7081 return std::make_pair(Lo, Hi);
7084 void SelectionDAG::ExtractVectorElements(SDValue Op,
7085 SmallVectorImpl<SDValue> &Args,
7086 unsigned Start, unsigned Count) {
7087 EVT VT = Op.getValueType();
7089 Count = VT.getVectorNumElements();
7091 EVT EltVT = VT.getVectorElementType();
7092 EVT IdxTy = TLI->getVectorIdxTy(getDataLayout());
7094 for (unsigned i = Start, e = Start + Count; i != e; ++i) {
7095 Args.push_back(getNode(ISD::EXTRACT_VECTOR_ELT, SL, EltVT,
7096 Op, getConstant(i, SL, IdxTy)));
7100 // getAddressSpace - Return the address space this GlobalAddress belongs to.
7101 unsigned GlobalAddressSDNode::getAddressSpace() const {
7102 return getGlobal()->getType()->getAddressSpace();
7106 Type *ConstantPoolSDNode::getType() const {
7107 if (isMachineConstantPoolEntry())
7108 return Val.MachineCPVal->getType();
7109 return Val.ConstVal->getType();
7112 bool BuildVectorSDNode::isConstantSplat(APInt &SplatValue,
7114 unsigned &SplatBitSize,
7116 unsigned MinSplatBits,
7117 bool isBigEndian) const {
7118 EVT VT = getValueType(0);
7119 assert(VT.isVector() && "Expected a vector type");
7120 unsigned sz = VT.getSizeInBits();
7121 if (MinSplatBits > sz)
7124 SplatValue = APInt(sz, 0);
7125 SplatUndef = APInt(sz, 0);
7127 // Get the bits. Bits with undefined values (when the corresponding element
7128 // of the vector is an ISD::UNDEF value) are set in SplatUndef and cleared
7129 // in SplatValue. If any of the values are not constant, give up and return
7131 unsigned int nOps = getNumOperands();
7132 assert(nOps > 0 && "isConstantSplat has 0-size build vector");
7133 unsigned EltBitSize = VT.getVectorElementType().getSizeInBits();
7135 for (unsigned j = 0; j < nOps; ++j) {
7136 unsigned i = isBigEndian ? nOps-1-j : j;
7137 SDValue OpVal = getOperand(i);
7138 unsigned BitPos = j * EltBitSize;
7140 if (OpVal.getOpcode() == ISD::UNDEF)
7141 SplatUndef |= APInt::getBitsSet(sz, BitPos, BitPos + EltBitSize);
7142 else if (ConstantSDNode *CN = dyn_cast<ConstantSDNode>(OpVal))
7143 SplatValue |= CN->getAPIntValue().zextOrTrunc(EltBitSize).
7144 zextOrTrunc(sz) << BitPos;
7145 else if (ConstantFPSDNode *CN = dyn_cast<ConstantFPSDNode>(OpVal))
7146 SplatValue |= CN->getValueAPF().bitcastToAPInt().zextOrTrunc(sz) <<BitPos;
7151 // The build_vector is all constants or undefs. Find the smallest element
7152 // size that splats the vector.
7154 HasAnyUndefs = (SplatUndef != 0);
7157 unsigned HalfSize = sz / 2;
7158 APInt HighValue = SplatValue.lshr(HalfSize).trunc(HalfSize);
7159 APInt LowValue = SplatValue.trunc(HalfSize);
7160 APInt HighUndef = SplatUndef.lshr(HalfSize).trunc(HalfSize);
7161 APInt LowUndef = SplatUndef.trunc(HalfSize);
7163 // If the two halves do not match (ignoring undef bits), stop here.
7164 if ((HighValue & ~LowUndef) != (LowValue & ~HighUndef) ||
7165 MinSplatBits > HalfSize)
7168 SplatValue = HighValue | LowValue;
7169 SplatUndef = HighUndef & LowUndef;
7178 SDValue BuildVectorSDNode::getSplatValue(BitVector *UndefElements) const {
7179 if (UndefElements) {
7180 UndefElements->clear();
7181 UndefElements->resize(getNumOperands());
7184 for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
7185 SDValue Op = getOperand(i);
7186 if (Op.getOpcode() == ISD::UNDEF) {
7188 (*UndefElements)[i] = true;
7189 } else if (!Splatted) {
7191 } else if (Splatted != Op) {
7197 assert(getOperand(0).getOpcode() == ISD::UNDEF &&
7198 "Can only have a splat without a constant for all undefs.");
7199 return getOperand(0);
7206 BuildVectorSDNode::getConstantSplatNode(BitVector *UndefElements) const {
7207 return dyn_cast_or_null<ConstantSDNode>(getSplatValue(UndefElements));
7211 BuildVectorSDNode::getConstantFPSplatNode(BitVector *UndefElements) const {
7212 return dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements));
7216 BuildVectorSDNode::getConstantFPSplatPow2ToLog2Int(BitVector *UndefElements,
7217 uint32_t BitWidth) const {
7218 if (ConstantFPSDNode *CN =
7219 dyn_cast_or_null<ConstantFPSDNode>(getSplatValue(UndefElements))) {
7221 APSInt IntVal(BitWidth);
7222 APFloat APF = CN->getValueAPF();
7223 if (APF.convertToInteger(IntVal, APFloat::rmTowardZero, &IsExact) !=
7228 return IntVal.exactLogBase2();
7233 bool BuildVectorSDNode::isConstant() const {
7234 for (const SDValue &Op : op_values()) {
7235 unsigned Opc = Op.getOpcode();
7236 if (Opc != ISD::UNDEF && Opc != ISD::Constant && Opc != ISD::ConstantFP)
7242 bool ShuffleVectorSDNode::isSplatMask(const int *Mask, EVT VT) {
7243 // Find the first non-undef value in the shuffle mask.
7245 for (i = 0, e = VT.getVectorNumElements(); i != e && Mask[i] < 0; ++i)
7248 assert(i != e && "VECTOR_SHUFFLE node with all undef indices!");
7250 // Make sure all remaining elements are either undef or the same as the first
7252 for (int Idx = Mask[i]; i != e; ++i)
7253 if (Mask[i] >= 0 && Mask[i] != Idx)
7259 static void checkForCyclesHelper(const SDNode *N,
7260 SmallPtrSetImpl<const SDNode*> &Visited,
7261 SmallPtrSetImpl<const SDNode*> &Checked,
7262 const llvm::SelectionDAG *DAG) {
7263 // If this node has already been checked, don't check it again.
7264 if (Checked.count(N))
7267 // If a node has already been visited on this depth-first walk, reject it as
7269 if (!Visited.insert(N).second) {
7270 errs() << "Detected cycle in SelectionDAG\n";
7271 dbgs() << "Offending node:\n";
7272 N->dumprFull(DAG); dbgs() << "\n";
7276 for (const SDValue &Op : N->op_values())
7277 checkForCyclesHelper(Op.getNode(), Visited, Checked, DAG);
7284 void llvm::checkForCycles(const llvm::SDNode *N,
7285 const llvm::SelectionDAG *DAG,
7293 assert(N && "Checking nonexistent SDNode");
7294 SmallPtrSet<const SDNode*, 32> visited;
7295 SmallPtrSet<const SDNode*, 32> checked;
7296 checkForCyclesHelper(N, visited, checked, DAG);
7301 void llvm::checkForCycles(const llvm::SelectionDAG *DAG, bool force) {
7302 checkForCycles(DAG->getRoot().getNode(), DAG, force);