1 //===------- LegalizeVectorTypes.cpp - Legalization of vector types -------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file performs vector type splitting and scalarization for LegalizeTypes.
11 // Scalarization is the act of changing a computation in an illegal one-element
12 // vector type to be a computation in its scalar element type. For example,
13 // implementing <1 x f32> arithmetic in a scalar f32 register. This is needed
14 // as a base case when scalarizing vector arithmetic like <4 x f32>, which
15 // eventually decomposes to scalars if the target doesn't support v4f32 or v2f32
17 // Splitting is the act of changing a computation in an invalid vector type to
18 // be a computation in two vectors of half the size. For example, implementing
19 // <128 x f32> operations in terms of two <64 x f32> operations.
21 //===----------------------------------------------------------------------===//
23 #include "LegalizeTypes.h"
24 #include "llvm/IR/DataLayout.h"
25 #include "llvm/Support/ErrorHandling.h"
26 #include "llvm/Support/raw_ostream.h"
29 #define DEBUG_TYPE "legalize-types"
31 //===----------------------------------------------------------------------===//
32 // Result Vector Scalarization: <1 x ty> -> ty.
33 //===----------------------------------------------------------------------===//
35 void DAGTypeLegalizer::ScalarizeVectorResult(SDNode *N, unsigned ResNo) {
36 DEBUG(dbgs() << "Scalarize node result " << ResNo << ": ";
39 SDValue R = SDValue();
41 switch (N->getOpcode()) {
44 dbgs() << "ScalarizeVectorResult #" << ResNo << ": ";
48 report_fatal_error("Do not know how to scalarize the result of this "
51 case ISD::MERGE_VALUES: R = ScalarizeVecRes_MERGE_VALUES(N, ResNo);break;
52 case ISD::BITCAST: R = ScalarizeVecRes_BITCAST(N); break;
53 case ISD::BUILD_VECTOR: R = ScalarizeVecRes_BUILD_VECTOR(N); break;
54 case ISD::CONVERT_RNDSAT: R = ScalarizeVecRes_CONVERT_RNDSAT(N); break;
55 case ISD::EXTRACT_SUBVECTOR: R = ScalarizeVecRes_EXTRACT_SUBVECTOR(N); break;
56 case ISD::FP_ROUND: R = ScalarizeVecRes_FP_ROUND(N); break;
57 case ISD::FP_ROUND_INREG: R = ScalarizeVecRes_InregOp(N); break;
58 case ISD::FPOWI: R = ScalarizeVecRes_FPOWI(N); break;
59 case ISD::INSERT_VECTOR_ELT: R = ScalarizeVecRes_INSERT_VECTOR_ELT(N); break;
60 case ISD::LOAD: R = ScalarizeVecRes_LOAD(cast<LoadSDNode>(N));break;
61 case ISD::SCALAR_TO_VECTOR: R = ScalarizeVecRes_SCALAR_TO_VECTOR(N); break;
62 case ISD::SIGN_EXTEND_INREG: R = ScalarizeVecRes_InregOp(N); break;
63 case ISD::VSELECT: R = ScalarizeVecRes_VSELECT(N); break;
64 case ISD::SELECT: R = ScalarizeVecRes_SELECT(N); break;
65 case ISD::SELECT_CC: R = ScalarizeVecRes_SELECT_CC(N); break;
66 case ISD::SETCC: R = ScalarizeVecRes_SETCC(N); break;
67 case ISD::UNDEF: R = ScalarizeVecRes_UNDEF(N); break;
68 case ISD::VECTOR_SHUFFLE: R = ScalarizeVecRes_VECTOR_SHUFFLE(N); break;
93 case ISD::SIGN_EXTEND:
97 case ISD::ZERO_EXTEND:
98 R = ScalarizeVecRes_UnaryOp(N);
121 R = ScalarizeVecRes_BinOp(N);
124 R = ScalarizeVecRes_TernaryOp(N);
128 // If R is null, the sub-method took care of registering the result.
130 SetScalarizedVector(SDValue(N, ResNo), R);
133 SDValue DAGTypeLegalizer::ScalarizeVecRes_BinOp(SDNode *N) {
134 SDValue LHS = GetScalarizedVector(N->getOperand(0));
135 SDValue RHS = GetScalarizedVector(N->getOperand(1));
136 return DAG.getNode(N->getOpcode(), SDLoc(N),
137 LHS.getValueType(), LHS, RHS);
140 SDValue DAGTypeLegalizer::ScalarizeVecRes_TernaryOp(SDNode *N) {
141 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
142 SDValue Op1 = GetScalarizedVector(N->getOperand(1));
143 SDValue Op2 = GetScalarizedVector(N->getOperand(2));
144 return DAG.getNode(N->getOpcode(), SDLoc(N),
145 Op0.getValueType(), Op0, Op1, Op2);
148 SDValue DAGTypeLegalizer::ScalarizeVecRes_MERGE_VALUES(SDNode *N,
150 SDValue Op = DisintegrateMERGE_VALUES(N, ResNo);
151 return GetScalarizedVector(Op);
154 SDValue DAGTypeLegalizer::ScalarizeVecRes_BITCAST(SDNode *N) {
155 EVT NewVT = N->getValueType(0).getVectorElementType();
156 return DAG.getNode(ISD::BITCAST, SDLoc(N),
157 NewVT, N->getOperand(0));
160 SDValue DAGTypeLegalizer::ScalarizeVecRes_BUILD_VECTOR(SDNode *N) {
161 EVT EltVT = N->getValueType(0).getVectorElementType();
162 SDValue InOp = N->getOperand(0);
163 // The BUILD_VECTOR operands may be of wider element types and
164 // we may need to truncate them back to the requested return type.
165 if (EltVT.isInteger())
166 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
170 SDValue DAGTypeLegalizer::ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N) {
171 EVT NewVT = N->getValueType(0).getVectorElementType();
172 SDValue Op0 = GetScalarizedVector(N->getOperand(0));
173 return DAG.getConvertRndSat(NewVT, SDLoc(N),
174 Op0, DAG.getValueType(NewVT),
175 DAG.getValueType(Op0.getValueType()),
178 cast<CvtRndSatSDNode>(N)->getCvtCode());
181 SDValue DAGTypeLegalizer::ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
182 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
183 N->getValueType(0).getVectorElementType(),
184 N->getOperand(0), N->getOperand(1));
187 SDValue DAGTypeLegalizer::ScalarizeVecRes_FP_ROUND(SDNode *N) {
188 EVT NewVT = N->getValueType(0).getVectorElementType();
189 SDValue Op = GetScalarizedVector(N->getOperand(0));
190 return DAG.getNode(ISD::FP_ROUND, SDLoc(N),
191 NewVT, Op, N->getOperand(1));
194 SDValue DAGTypeLegalizer::ScalarizeVecRes_FPOWI(SDNode *N) {
195 SDValue Op = GetScalarizedVector(N->getOperand(0));
196 return DAG.getNode(ISD::FPOWI, SDLoc(N),
197 Op.getValueType(), Op, N->getOperand(1));
200 SDValue DAGTypeLegalizer::ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N) {
201 // The value to insert may have a wider type than the vector element type,
202 // so be sure to truncate it to the element type if necessary.
203 SDValue Op = N->getOperand(1);
204 EVT EltVT = N->getValueType(0).getVectorElementType();
205 if (Op.getValueType() != EltVT)
206 // FIXME: Can this happen for floating point types?
207 Op = DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, Op);
211 SDValue DAGTypeLegalizer::ScalarizeVecRes_LOAD(LoadSDNode *N) {
212 assert(N->isUnindexed() && "Indexed vector load?");
214 SDValue Result = DAG.getLoad(ISD::UNINDEXED,
215 N->getExtensionType(),
216 N->getValueType(0).getVectorElementType(),
218 N->getChain(), N->getBasePtr(),
219 DAG.getUNDEF(N->getBasePtr().getValueType()),
221 N->getMemoryVT().getVectorElementType(),
222 N->isVolatile(), N->isNonTemporal(),
223 N->isInvariant(), N->getOriginalAlignment(),
226 // Legalized the chain result - switch anything that used the old chain to
228 ReplaceValueWith(SDValue(N, 1), Result.getValue(1));
232 SDValue DAGTypeLegalizer::ScalarizeVecRes_UnaryOp(SDNode *N) {
233 // Get the dest type - it doesn't always match the input type, e.g. int_to_fp.
234 EVT DestVT = N->getValueType(0).getVectorElementType();
235 SDValue Op = GetScalarizedVector(N->getOperand(0));
236 return DAG.getNode(N->getOpcode(), SDLoc(N), DestVT, Op);
239 SDValue DAGTypeLegalizer::ScalarizeVecRes_InregOp(SDNode *N) {
240 EVT EltVT = N->getValueType(0).getVectorElementType();
241 EVT ExtVT = cast<VTSDNode>(N->getOperand(1))->getVT().getVectorElementType();
242 SDValue LHS = GetScalarizedVector(N->getOperand(0));
243 return DAG.getNode(N->getOpcode(), SDLoc(N), EltVT,
244 LHS, DAG.getValueType(ExtVT));
247 SDValue DAGTypeLegalizer::ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N) {
248 // If the operand is wider than the vector element type then it is implicitly
249 // truncated. Make that explicit here.
250 EVT EltVT = N->getValueType(0).getVectorElementType();
251 SDValue InOp = N->getOperand(0);
252 if (InOp.getValueType() != EltVT)
253 return DAG.getNode(ISD::TRUNCATE, SDLoc(N), EltVT, InOp);
257 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSELECT(SDNode *N) {
258 SDValue Cond = GetScalarizedVector(N->getOperand(0));
259 SDValue LHS = GetScalarizedVector(N->getOperand(1));
260 TargetLowering::BooleanContent ScalarBool = TLI.getBooleanContents(false);
261 TargetLowering::BooleanContent VecBool = TLI.getBooleanContents(true);
262 if (ScalarBool != VecBool) {
263 EVT CondVT = Cond.getValueType();
264 switch (ScalarBool) {
265 case TargetLowering::UndefinedBooleanContent:
267 case TargetLowering::ZeroOrOneBooleanContent:
268 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
269 VecBool == TargetLowering::ZeroOrNegativeOneBooleanContent);
270 // Vector read from all ones, scalar expects a single 1 so mask.
271 Cond = DAG.getNode(ISD::AND, SDLoc(N), CondVT,
272 Cond, DAG.getConstant(1, CondVT));
274 case TargetLowering::ZeroOrNegativeOneBooleanContent:
275 assert(VecBool == TargetLowering::UndefinedBooleanContent ||
276 VecBool == TargetLowering::ZeroOrOneBooleanContent);
277 // Vector reads from a one, scalar from all ones so sign extend.
278 Cond = DAG.getNode(ISD::SIGN_EXTEND_INREG, SDLoc(N), CondVT,
279 Cond, DAG.getValueType(MVT::i1));
284 return DAG.getSelect(SDLoc(N),
285 LHS.getValueType(), Cond, LHS,
286 GetScalarizedVector(N->getOperand(2)));
289 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT(SDNode *N) {
290 SDValue LHS = GetScalarizedVector(N->getOperand(1));
291 return DAG.getSelect(SDLoc(N),
292 LHS.getValueType(), N->getOperand(0), LHS,
293 GetScalarizedVector(N->getOperand(2)));
296 SDValue DAGTypeLegalizer::ScalarizeVecRes_SELECT_CC(SDNode *N) {
297 SDValue LHS = GetScalarizedVector(N->getOperand(2));
298 return DAG.getNode(ISD::SELECT_CC, SDLoc(N), LHS.getValueType(),
299 N->getOperand(0), N->getOperand(1),
300 LHS, GetScalarizedVector(N->getOperand(3)),
304 SDValue DAGTypeLegalizer::ScalarizeVecRes_SETCC(SDNode *N) {
305 assert(N->getValueType(0).isVector() ==
306 N->getOperand(0).getValueType().isVector() &&
307 "Scalar/Vector type mismatch");
309 if (N->getValueType(0).isVector()) return ScalarizeVecRes_VSETCC(N);
311 SDValue LHS = GetScalarizedVector(N->getOperand(0));
312 SDValue RHS = GetScalarizedVector(N->getOperand(1));
315 // Turn it into a scalar SETCC.
316 return DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS, N->getOperand(2));
319 SDValue DAGTypeLegalizer::ScalarizeVecRes_UNDEF(SDNode *N) {
320 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
323 SDValue DAGTypeLegalizer::ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N) {
324 // Figure out if the scalar is the LHS or RHS and return it.
325 SDValue Arg = N->getOperand(2).getOperand(0);
326 if (Arg.getOpcode() == ISD::UNDEF)
327 return DAG.getUNDEF(N->getValueType(0).getVectorElementType());
328 unsigned Op = !cast<ConstantSDNode>(Arg)->isNullValue();
329 return GetScalarizedVector(N->getOperand(Op));
332 SDValue DAGTypeLegalizer::ScalarizeVecRes_VSETCC(SDNode *N) {
333 assert(N->getValueType(0).isVector() &&
334 N->getOperand(0).getValueType().isVector() &&
335 "Operand types must be vectors");
336 SDValue LHS = N->getOperand(0);
337 SDValue RHS = N->getOperand(1);
338 EVT OpVT = LHS.getValueType();
339 EVT NVT = N->getValueType(0).getVectorElementType();
342 // The result needs scalarizing, but it's not a given that the source does.
343 if (getTypeAction(OpVT) == TargetLowering::TypeScalarizeVector) {
344 LHS = GetScalarizedVector(LHS);
345 RHS = GetScalarizedVector(RHS);
347 EVT VT = OpVT.getVectorElementType();
348 LHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, LHS,
349 DAG.getConstant(0, TLI.getVectorIdxTy()));
350 RHS = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, VT, RHS,
351 DAG.getConstant(0, TLI.getVectorIdxTy()));
354 // Turn it into a scalar SETCC.
355 SDValue Res = DAG.getNode(ISD::SETCC, DL, MVT::i1, LHS, RHS,
357 // Vectors may have a different boolean contents to scalars. Promote the
358 // value appropriately.
359 ISD::NodeType ExtendCode =
360 TargetLowering::getExtendForContent(TLI.getBooleanContents(true));
361 return DAG.getNode(ExtendCode, DL, NVT, Res);
365 //===----------------------------------------------------------------------===//
366 // Operand Vector Scalarization <1 x ty> -> ty.
367 //===----------------------------------------------------------------------===//
369 bool DAGTypeLegalizer::ScalarizeVectorOperand(SDNode *N, unsigned OpNo) {
370 DEBUG(dbgs() << "Scalarize node operand " << OpNo << ": ";
373 SDValue Res = SDValue();
375 if (!Res.getNode()) {
376 switch (N->getOpcode()) {
379 dbgs() << "ScalarizeVectorOperand Op #" << OpNo << ": ";
383 llvm_unreachable("Do not know how to scalarize this operator's operand!");
385 Res = ScalarizeVecOp_BITCAST(N);
387 case ISD::ANY_EXTEND:
388 case ISD::ZERO_EXTEND:
389 case ISD::SIGN_EXTEND:
391 Res = ScalarizeVecOp_UnaryOp(N);
393 case ISD::CONCAT_VECTORS:
394 Res = ScalarizeVecOp_CONCAT_VECTORS(N);
396 case ISD::EXTRACT_VECTOR_ELT:
397 Res = ScalarizeVecOp_EXTRACT_VECTOR_ELT(N);
400 Res = ScalarizeVecOp_VSELECT(N);
403 Res = ScalarizeVecOp_STORE(cast<StoreSDNode>(N), OpNo);
406 Res = ScalarizeVecOp_FP_ROUND(N, OpNo);
411 // If the result is null, the sub-method took care of registering results etc.
412 if (!Res.getNode()) return false;
414 // If the result is N, the sub-method updated N in place. Tell the legalizer
416 if (Res.getNode() == N)
419 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
420 "Invalid operand expansion");
422 ReplaceValueWith(SDValue(N, 0), Res);
426 /// ScalarizeVecOp_BITCAST - If the value to convert is a vector that needs
427 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
428 SDValue DAGTypeLegalizer::ScalarizeVecOp_BITCAST(SDNode *N) {
429 SDValue Elt = GetScalarizedVector(N->getOperand(0));
430 return DAG.getNode(ISD::BITCAST, SDLoc(N),
431 N->getValueType(0), Elt);
434 /// ScalarizeVecOp_EXTEND - If the value to extend is a vector that needs
435 /// to be scalarized, it must be <1 x ty>. Extend the element instead.
436 SDValue DAGTypeLegalizer::ScalarizeVecOp_UnaryOp(SDNode *N) {
437 assert(N->getValueType(0).getVectorNumElements() == 1 &&
438 "Unexected vector type!");
439 SDValue Elt = GetScalarizedVector(N->getOperand(0));
440 SDValue Op = DAG.getNode(N->getOpcode(), SDLoc(N),
441 N->getValueType(0).getScalarType(), Elt);
442 // Revectorize the result so the types line up with what the uses of this
443 // expression expect.
444 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Op);
447 /// ScalarizeVecOp_CONCAT_VECTORS - The vectors to concatenate have length one -
448 /// use a BUILD_VECTOR instead.
449 SDValue DAGTypeLegalizer::ScalarizeVecOp_CONCAT_VECTORS(SDNode *N) {
450 SmallVector<SDValue, 8> Ops(N->getNumOperands());
451 for (unsigned i = 0, e = N->getNumOperands(); i < e; ++i)
452 Ops[i] = GetScalarizedVector(N->getOperand(i));
453 return DAG.getNode(ISD::BUILD_VECTOR, SDLoc(N), N->getValueType(0), Ops);
456 /// ScalarizeVecOp_EXTRACT_VECTOR_ELT - If the input is a vector that needs to
457 /// be scalarized, it must be <1 x ty>, so just return the element, ignoring the
459 SDValue DAGTypeLegalizer::ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
460 SDValue Res = GetScalarizedVector(N->getOperand(0));
461 if (Res.getValueType() != N->getValueType(0))
462 Res = DAG.getNode(ISD::ANY_EXTEND, SDLoc(N), N->getValueType(0),
468 /// ScalarizeVecOp_VSELECT - If the input condition is a vector that needs to be
469 /// scalarized, it must be <1 x i1>, so just convert to a normal ISD::SELECT
470 /// (still with vector output type since that was acceptable if we got here).
471 SDValue DAGTypeLegalizer::ScalarizeVecOp_VSELECT(SDNode *N) {
472 SDValue ScalarCond = GetScalarizedVector(N->getOperand(0));
473 EVT VT = N->getValueType(0);
475 return DAG.getNode(ISD::SELECT, SDLoc(N), VT, ScalarCond, N->getOperand(1),
479 /// ScalarizeVecOp_STORE - If the value to store is a vector that needs to be
480 /// scalarized, it must be <1 x ty>. Just store the element.
481 SDValue DAGTypeLegalizer::ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo){
482 assert(N->isUnindexed() && "Indexed store of one-element vector?");
483 assert(OpNo == 1 && "Do not know how to scalarize this operand!");
486 if (N->isTruncatingStore())
487 return DAG.getTruncStore(N->getChain(), dl,
488 GetScalarizedVector(N->getOperand(1)),
489 N->getBasePtr(), N->getPointerInfo(),
490 N->getMemoryVT().getVectorElementType(),
491 N->isVolatile(), N->isNonTemporal(),
492 N->getAlignment(), N->getTBAAInfo());
494 return DAG.getStore(N->getChain(), dl, GetScalarizedVector(N->getOperand(1)),
495 N->getBasePtr(), N->getPointerInfo(),
496 N->isVolatile(), N->isNonTemporal(),
497 N->getOriginalAlignment(), N->getTBAAInfo());
500 /// ScalarizeVecOp_FP_ROUND - If the value to round is a vector that needs
501 /// to be scalarized, it must be <1 x ty>. Convert the element instead.
502 SDValue DAGTypeLegalizer::ScalarizeVecOp_FP_ROUND(SDNode *N, unsigned OpNo) {
503 SDValue Elt = GetScalarizedVector(N->getOperand(0));
504 SDValue Res = DAG.getNode(ISD::FP_ROUND, SDLoc(N),
505 N->getValueType(0).getVectorElementType(), Elt,
507 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N), N->getValueType(0), Res);
510 //===----------------------------------------------------------------------===//
511 // Result Vector Splitting
512 //===----------------------------------------------------------------------===//
514 /// SplitVectorResult - This method is called when the specified result of the
515 /// specified node is found to need vector splitting. At this point, the node
516 /// may also have invalid operands or may have other results that need
517 /// legalization, we just know that (at least) one result needs vector
519 void DAGTypeLegalizer::SplitVectorResult(SDNode *N, unsigned ResNo) {
520 DEBUG(dbgs() << "Split node result: ";
525 // See if the target wants to custom expand this node.
526 if (CustomLowerNode(N, N->getValueType(ResNo), true))
529 switch (N->getOpcode()) {
532 dbgs() << "SplitVectorResult #" << ResNo << ": ";
536 report_fatal_error("Do not know how to split the result of this "
539 case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, ResNo, Lo, Hi); break;
541 case ISD::SELECT: SplitRes_SELECT(N, Lo, Hi); break;
542 case ISD::SELECT_CC: SplitRes_SELECT_CC(N, Lo, Hi); break;
543 case ISD::UNDEF: SplitRes_UNDEF(N, Lo, Hi); break;
544 case ISD::BITCAST: SplitVecRes_BITCAST(N, Lo, Hi); break;
545 case ISD::BUILD_VECTOR: SplitVecRes_BUILD_VECTOR(N, Lo, Hi); break;
546 case ISD::CONCAT_VECTORS: SplitVecRes_CONCAT_VECTORS(N, Lo, Hi); break;
547 case ISD::EXTRACT_SUBVECTOR: SplitVecRes_EXTRACT_SUBVECTOR(N, Lo, Hi); break;
548 case ISD::FP_ROUND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
549 case ISD::FPOWI: SplitVecRes_FPOWI(N, Lo, Hi); break;
550 case ISD::INSERT_VECTOR_ELT: SplitVecRes_INSERT_VECTOR_ELT(N, Lo, Hi); break;
551 case ISD::SCALAR_TO_VECTOR: SplitVecRes_SCALAR_TO_VECTOR(N, Lo, Hi); break;
552 case ISD::SIGN_EXTEND_INREG: SplitVecRes_InregOp(N, Lo, Hi); break;
554 SplitVecRes_LOAD(cast<LoadSDNode>(N), Lo, Hi);
557 SplitVecRes_SETCC(N, Lo, Hi);
559 case ISD::VECTOR_SHUFFLE:
560 SplitVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N), Lo, Hi);
564 case ISD::CONVERT_RNDSAT:
567 case ISD::CTLZ_ZERO_UNDEF:
568 case ISD::CTTZ_ZERO_UNDEF:
579 case ISD::FNEARBYINT:
583 case ISD::FP_TO_SINT:
584 case ISD::FP_TO_UINT:
590 case ISD::SINT_TO_FP:
592 case ISD::UINT_TO_FP:
593 SplitVecRes_UnaryOp(N, Lo, Hi);
596 case ISD::ANY_EXTEND:
597 case ISD::SIGN_EXTEND:
598 case ISD::ZERO_EXTEND:
599 SplitVecRes_ExtendOp(N, Lo, Hi);
622 SplitVecRes_BinOp(N, Lo, Hi);
625 SplitVecRes_TernaryOp(N, Lo, Hi);
629 // If Lo/Hi is null, the sub-method took care of registering results etc.
631 SetSplitVector(SDValue(N, ResNo), Lo, Hi);
634 void DAGTypeLegalizer::SplitVecRes_BinOp(SDNode *N, SDValue &Lo,
636 SDValue LHSLo, LHSHi;
637 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
638 SDValue RHSLo, RHSHi;
639 GetSplitVector(N->getOperand(1), RHSLo, RHSHi);
642 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo, RHSLo);
643 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi, RHSHi);
646 void DAGTypeLegalizer::SplitVecRes_TernaryOp(SDNode *N, SDValue &Lo,
648 SDValue Op0Lo, Op0Hi;
649 GetSplitVector(N->getOperand(0), Op0Lo, Op0Hi);
650 SDValue Op1Lo, Op1Hi;
651 GetSplitVector(N->getOperand(1), Op1Lo, Op1Hi);
652 SDValue Op2Lo, Op2Hi;
653 GetSplitVector(N->getOperand(2), Op2Lo, Op2Hi);
656 Lo = DAG.getNode(N->getOpcode(), dl, Op0Lo.getValueType(),
657 Op0Lo, Op1Lo, Op2Lo);
658 Hi = DAG.getNode(N->getOpcode(), dl, Op0Hi.getValueType(),
659 Op0Hi, Op1Hi, Op2Hi);
662 void DAGTypeLegalizer::SplitVecRes_BITCAST(SDNode *N, SDValue &Lo,
664 // We know the result is a vector. The input may be either a vector or a
667 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
670 SDValue InOp = N->getOperand(0);
671 EVT InVT = InOp.getValueType();
673 // Handle some special cases efficiently.
674 switch (getTypeAction(InVT)) {
675 case TargetLowering::TypeLegal:
676 case TargetLowering::TypePromoteInteger:
677 case TargetLowering::TypeSoftenFloat:
678 case TargetLowering::TypeScalarizeVector:
679 case TargetLowering::TypeWidenVector:
681 case TargetLowering::TypeExpandInteger:
682 case TargetLowering::TypeExpandFloat:
683 // A scalar to vector conversion, where the scalar needs expansion.
684 // If the vector is being split in two then we can just convert the
687 GetExpandedOp(InOp, Lo, Hi);
688 if (TLI.isBigEndian())
690 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
691 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
695 case TargetLowering::TypeSplitVector:
696 // If the input is a vector that needs to be split, convert each split
697 // piece of the input now.
698 GetSplitVector(InOp, Lo, Hi);
699 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
700 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
704 // In the general case, convert the input to an integer and split it by hand.
705 EVT LoIntVT = EVT::getIntegerVT(*DAG.getContext(), LoVT.getSizeInBits());
706 EVT HiIntVT = EVT::getIntegerVT(*DAG.getContext(), HiVT.getSizeInBits());
707 if (TLI.isBigEndian())
708 std::swap(LoIntVT, HiIntVT);
710 SplitInteger(BitConvertToInteger(InOp), LoIntVT, HiIntVT, Lo, Hi);
712 if (TLI.isBigEndian())
714 Lo = DAG.getNode(ISD::BITCAST, dl, LoVT, Lo);
715 Hi = DAG.getNode(ISD::BITCAST, dl, HiVT, Hi);
718 void DAGTypeLegalizer::SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo,
722 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
723 unsigned LoNumElts = LoVT.getVectorNumElements();
724 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+LoNumElts);
725 Lo = DAG.getNode(ISD::BUILD_VECTOR, dl, LoVT, LoOps);
727 SmallVector<SDValue, 8> HiOps(N->op_begin()+LoNumElts, N->op_end());
728 Hi = DAG.getNode(ISD::BUILD_VECTOR, dl, HiVT, HiOps);
731 void DAGTypeLegalizer::SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo,
733 assert(!(N->getNumOperands() & 1) && "Unsupported CONCAT_VECTORS");
735 unsigned NumSubvectors = N->getNumOperands() / 2;
736 if (NumSubvectors == 1) {
737 Lo = N->getOperand(0);
738 Hi = N->getOperand(1);
743 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
745 SmallVector<SDValue, 8> LoOps(N->op_begin(), N->op_begin()+NumSubvectors);
746 Lo = DAG.getNode(ISD::CONCAT_VECTORS, dl, LoVT, LoOps);
748 SmallVector<SDValue, 8> HiOps(N->op_begin()+NumSubvectors, N->op_end());
749 Hi = DAG.getNode(ISD::CONCAT_VECTORS, dl, HiVT, HiOps);
752 void DAGTypeLegalizer::SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo,
754 SDValue Vec = N->getOperand(0);
755 SDValue Idx = N->getOperand(1);
759 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
761 Lo = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, LoVT, Vec, Idx);
762 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
763 Hi = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, HiVT, Vec,
764 DAG.getConstant(IdxVal + LoVT.getVectorNumElements(),
765 TLI.getVectorIdxTy()));
768 void DAGTypeLegalizer::SplitVecRes_FPOWI(SDNode *N, SDValue &Lo,
771 GetSplitVector(N->getOperand(0), Lo, Hi);
772 Lo = DAG.getNode(ISD::FPOWI, dl, Lo.getValueType(), Lo, N->getOperand(1));
773 Hi = DAG.getNode(ISD::FPOWI, dl, Hi.getValueType(), Hi, N->getOperand(1));
776 void DAGTypeLegalizer::SplitVecRes_InregOp(SDNode *N, SDValue &Lo,
778 SDValue LHSLo, LHSHi;
779 GetSplitVector(N->getOperand(0), LHSLo, LHSHi);
783 std::tie(LoVT, HiVT) =
784 DAG.GetSplitDestVTs(cast<VTSDNode>(N->getOperand(1))->getVT());
786 Lo = DAG.getNode(N->getOpcode(), dl, LHSLo.getValueType(), LHSLo,
787 DAG.getValueType(LoVT));
788 Hi = DAG.getNode(N->getOpcode(), dl, LHSHi.getValueType(), LHSHi,
789 DAG.getValueType(HiVT));
792 void DAGTypeLegalizer::SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo,
794 SDValue Vec = N->getOperand(0);
795 SDValue Elt = N->getOperand(1);
796 SDValue Idx = N->getOperand(2);
798 GetSplitVector(Vec, Lo, Hi);
800 if (ConstantSDNode *CIdx = dyn_cast<ConstantSDNode>(Idx)) {
801 unsigned IdxVal = CIdx->getZExtValue();
802 unsigned LoNumElts = Lo.getValueType().getVectorNumElements();
803 if (IdxVal < LoNumElts)
804 Lo = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl,
805 Lo.getValueType(), Lo, Elt, Idx);
807 Hi = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, Hi.getValueType(), Hi, Elt,
808 DAG.getConstant(IdxVal - LoNumElts,
809 TLI.getVectorIdxTy()));
813 // Spill the vector to the stack.
814 EVT VecVT = Vec.getValueType();
815 EVT EltVT = VecVT.getVectorElementType();
816 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
817 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
818 MachinePointerInfo(), false, false, 0);
820 // Store the new element. This may be larger than the vector element type,
821 // so use a truncating store.
822 SDValue EltPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
823 Type *VecType = VecVT.getTypeForEVT(*DAG.getContext());
825 TLI.getDataLayout()->getPrefTypeAlignment(VecType);
826 Store = DAG.getTruncStore(Store, dl, Elt, EltPtr, MachinePointerInfo(), EltVT,
829 // Load the Lo part from the stack slot.
830 Lo = DAG.getLoad(Lo.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
831 false, false, false, 0);
833 // Increment the pointer to the other part.
834 unsigned IncrementSize = Lo.getValueType().getSizeInBits() / 8;
835 StackPtr = DAG.getNode(ISD::ADD, dl, StackPtr.getValueType(), StackPtr,
836 DAG.getConstant(IncrementSize, StackPtr.getValueType()));
838 // Load the Hi part from the stack slot.
839 Hi = DAG.getLoad(Hi.getValueType(), dl, Store, StackPtr, MachinePointerInfo(),
840 false, false, false, MinAlign(Alignment, IncrementSize));
843 void DAGTypeLegalizer::SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo,
847 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
848 Lo = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, LoVT, N->getOperand(0));
849 Hi = DAG.getUNDEF(HiVT);
852 void DAGTypeLegalizer::SplitVecRes_LOAD(LoadSDNode *LD, SDValue &Lo,
854 assert(ISD::isUNINDEXEDLoad(LD) && "Indexed load during type legalization!");
857 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(LD->getValueType(0));
859 ISD::LoadExtType ExtType = LD->getExtensionType();
860 SDValue Ch = LD->getChain();
861 SDValue Ptr = LD->getBasePtr();
862 SDValue Offset = DAG.getUNDEF(Ptr.getValueType());
863 EVT MemoryVT = LD->getMemoryVT();
864 unsigned Alignment = LD->getOriginalAlignment();
865 bool isVolatile = LD->isVolatile();
866 bool isNonTemporal = LD->isNonTemporal();
867 bool isInvariant = LD->isInvariant();
868 const MDNode *TBAAInfo = LD->getTBAAInfo();
870 EVT LoMemVT, HiMemVT;
871 std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
873 Lo = DAG.getLoad(ISD::UNINDEXED, ExtType, LoVT, dl, Ch, Ptr, Offset,
874 LD->getPointerInfo(), LoMemVT, isVolatile, isNonTemporal,
875 isInvariant, Alignment, TBAAInfo);
877 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
878 Ptr = DAG.getNode(ISD::ADD, dl, Ptr.getValueType(), Ptr,
879 DAG.getConstant(IncrementSize, Ptr.getValueType()));
880 Hi = DAG.getLoad(ISD::UNINDEXED, ExtType, HiVT, dl, Ch, Ptr, Offset,
881 LD->getPointerInfo().getWithOffset(IncrementSize),
882 HiMemVT, isVolatile, isNonTemporal, isInvariant, Alignment,
885 // Build a factor node to remember that this load is independent of the
887 Ch = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, Lo.getValue(1),
890 // Legalized the chain result - switch anything that used the old chain to
892 ReplaceValueWith(SDValue(LD, 1), Ch);
895 void DAGTypeLegalizer::SplitVecRes_SETCC(SDNode *N, SDValue &Lo, SDValue &Hi) {
896 assert(N->getValueType(0).isVector() &&
897 N->getOperand(0).getValueType().isVector() &&
898 "Operand types must be vectors");
902 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
905 SDValue LL, LH, RL, RH;
906 std::tie(LL, LH) = DAG.SplitVectorOperand(N, 0);
907 std::tie(RL, RH) = DAG.SplitVectorOperand(N, 1);
909 Lo = DAG.getNode(N->getOpcode(), DL, LoVT, LL, RL, N->getOperand(2));
910 Hi = DAG.getNode(N->getOpcode(), DL, HiVT, LH, RH, N->getOperand(2));
913 void DAGTypeLegalizer::SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo,
915 // Get the dest types - they may not match the input types, e.g. int_to_fp.
918 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(N->getValueType(0));
920 // If the input also splits, handle it directly for a compile time speedup.
921 // Otherwise split it by hand.
922 EVT InVT = N->getOperand(0).getValueType();
923 if (getTypeAction(InVT) == TargetLowering::TypeSplitVector)
924 GetSplitVector(N->getOperand(0), Lo, Hi);
926 std::tie(Lo, Hi) = DAG.SplitVectorOperand(N, 0);
928 if (N->getOpcode() == ISD::FP_ROUND) {
929 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo, N->getOperand(1));
930 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi, N->getOperand(1));
931 } else if (N->getOpcode() == ISD::CONVERT_RNDSAT) {
932 SDValue DTyOpLo = DAG.getValueType(LoVT);
933 SDValue DTyOpHi = DAG.getValueType(HiVT);
934 SDValue STyOpLo = DAG.getValueType(Lo.getValueType());
935 SDValue STyOpHi = DAG.getValueType(Hi.getValueType());
936 SDValue RndOp = N->getOperand(3);
937 SDValue SatOp = N->getOperand(4);
938 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
939 Lo = DAG.getConvertRndSat(LoVT, dl, Lo, DTyOpLo, STyOpLo, RndOp, SatOp,
941 Hi = DAG.getConvertRndSat(HiVT, dl, Hi, DTyOpHi, STyOpHi, RndOp, SatOp,
944 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
945 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
949 void DAGTypeLegalizer::SplitVecRes_ExtendOp(SDNode *N, SDValue &Lo,
952 EVT SrcVT = N->getOperand(0).getValueType();
953 EVT DestVT = N->getValueType(0);
955 std::tie(LoVT, HiVT) = DAG.GetSplitDestVTs(DestVT);
957 // We can do better than a generic split operation if the extend is doing
958 // more than just doubling the width of the elements and the following are
960 // - The number of vector elements is even,
961 // - the source type is legal,
962 // - the type of a split source is illegal,
963 // - the type of an extended (by doubling element size) source is legal, and
964 // - the type of that extended source when split is legal.
966 // This won't necessarily completely legalize the operation, but it will
967 // more effectively move in the right direction and prevent falling down
968 // to scalarization in many cases due to the input vector being split too
970 unsigned NumElements = SrcVT.getVectorNumElements();
971 if ((NumElements & 1) == 0 &&
972 SrcVT.getSizeInBits() * 2 < DestVT.getSizeInBits()) {
973 LLVMContext &Ctx = *DAG.getContext();
974 EVT NewSrcVT = EVT::getVectorVT(
975 Ctx, EVT::getIntegerVT(
976 Ctx, SrcVT.getVectorElementType().getSizeInBits() * 2),
979 EVT::getVectorVT(Ctx, SrcVT.getVectorElementType(), NumElements / 2);
980 EVT SplitLoVT, SplitHiVT;
981 std::tie(SplitLoVT, SplitHiVT) = DAG.GetSplitDestVTs(NewSrcVT);
982 if (TLI.isTypeLegal(SrcVT) && !TLI.isTypeLegal(SplitSrcVT) &&
983 TLI.isTypeLegal(NewSrcVT) && TLI.isTypeLegal(SplitLoVT)) {
984 DEBUG(dbgs() << "Split vector extend via incremental extend:";
985 N->dump(&DAG); dbgs() << "\n");
986 // Extend the source vector by one step.
988 DAG.getNode(N->getOpcode(), dl, NewSrcVT, N->getOperand(0));
989 // Get the low and high halves of the new, extended one step, vector.
990 std::tie(Lo, Hi) = DAG.SplitVector(NewSrc, dl);
991 // Extend those vector halves the rest of the way.
992 Lo = DAG.getNode(N->getOpcode(), dl, LoVT, Lo);
993 Hi = DAG.getNode(N->getOpcode(), dl, HiVT, Hi);
997 // Fall back to the generic unary operator splitting otherwise.
998 SplitVecRes_UnaryOp(N, Lo, Hi);
1001 void DAGTypeLegalizer::SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N,
1002 SDValue &Lo, SDValue &Hi) {
1003 // The low and high parts of the original input give four input vectors.
1006 GetSplitVector(N->getOperand(0), Inputs[0], Inputs[1]);
1007 GetSplitVector(N->getOperand(1), Inputs[2], Inputs[3]);
1008 EVT NewVT = Inputs[0].getValueType();
1009 unsigned NewElts = NewVT.getVectorNumElements();
1011 // If Lo or Hi uses elements from at most two of the four input vectors, then
1012 // express it as a vector shuffle of those two inputs. Otherwise extract the
1013 // input elements by hand and construct the Lo/Hi output using a BUILD_VECTOR.
1014 SmallVector<int, 16> Ops;
1015 for (unsigned High = 0; High < 2; ++High) {
1016 SDValue &Output = High ? Hi : Lo;
1018 // Build a shuffle mask for the output, discovering on the fly which
1019 // input vectors to use as shuffle operands (recorded in InputUsed).
1020 // If building a suitable shuffle vector proves too hard, then bail
1021 // out with useBuildVector set.
1022 unsigned InputUsed[2] = { -1U, -1U }; // Not yet discovered.
1023 unsigned FirstMaskIdx = High * NewElts;
1024 bool useBuildVector = false;
1025 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
1026 // The mask element. This indexes into the input.
1027 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1029 // The input vector this mask element indexes into.
1030 unsigned Input = (unsigned)Idx / NewElts;
1032 if (Input >= array_lengthof(Inputs)) {
1033 // The mask element does not index into any input vector.
1038 // Turn the index into an offset from the start of the input vector.
1039 Idx -= Input * NewElts;
1041 // Find or create a shuffle vector operand to hold this input.
1043 for (OpNo = 0; OpNo < array_lengthof(InputUsed); ++OpNo) {
1044 if (InputUsed[OpNo] == Input) {
1045 // This input vector is already an operand.
1047 } else if (InputUsed[OpNo] == -1U) {
1048 // Create a new operand for this input vector.
1049 InputUsed[OpNo] = Input;
1054 if (OpNo >= array_lengthof(InputUsed)) {
1055 // More than two input vectors used! Give up on trying to create a
1056 // shuffle vector. Insert all elements into a BUILD_VECTOR instead.
1057 useBuildVector = true;
1061 // Add the mask index for the new shuffle vector.
1062 Ops.push_back(Idx + OpNo * NewElts);
1065 if (useBuildVector) {
1066 EVT EltVT = NewVT.getVectorElementType();
1067 SmallVector<SDValue, 16> SVOps;
1069 // Extract the input elements by hand.
1070 for (unsigned MaskOffset = 0; MaskOffset < NewElts; ++MaskOffset) {
1071 // The mask element. This indexes into the input.
1072 int Idx = N->getMaskElt(FirstMaskIdx + MaskOffset);
1074 // The input vector this mask element indexes into.
1075 unsigned Input = (unsigned)Idx / NewElts;
1077 if (Input >= array_lengthof(Inputs)) {
1078 // The mask element is "undef" or indexes off the end of the input.
1079 SVOps.push_back(DAG.getUNDEF(EltVT));
1083 // Turn the index into an offset from the start of the input vector.
1084 Idx -= Input * NewElts;
1086 // Extract the vector element by hand.
1087 SVOps.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT,
1088 Inputs[Input], DAG.getConstant(Idx,
1089 TLI.getVectorIdxTy())));
1092 // Construct the Lo/Hi output using a BUILD_VECTOR.
1093 Output = DAG.getNode(ISD::BUILD_VECTOR, dl, NewVT, SVOps);
1094 } else if (InputUsed[0] == -1U) {
1095 // No input vectors were used! The result is undefined.
1096 Output = DAG.getUNDEF(NewVT);
1098 SDValue Op0 = Inputs[InputUsed[0]];
1099 // If only one input was used, use an undefined vector for the other.
1100 SDValue Op1 = InputUsed[1] == -1U ?
1101 DAG.getUNDEF(NewVT) : Inputs[InputUsed[1]];
1102 // At least one input vector was used. Create a new shuffle vector.
1103 Output = DAG.getVectorShuffle(NewVT, dl, Op0, Op1, &Ops[0]);
1111 //===----------------------------------------------------------------------===//
1112 // Operand Vector Splitting
1113 //===----------------------------------------------------------------------===//
1115 /// SplitVectorOperand - This method is called when the specified operand of the
1116 /// specified node is found to need vector splitting. At this point, all of the
1117 /// result types of the node are known to be legal, but other operands of the
1118 /// node may need legalization as well as the specified one.
1119 bool DAGTypeLegalizer::SplitVectorOperand(SDNode *N, unsigned OpNo) {
1120 DEBUG(dbgs() << "Split node operand: ";
1123 SDValue Res = SDValue();
1125 // See if the target wants to custom split this node.
1126 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
1129 if (!Res.getNode()) {
1130 switch (N->getOpcode()) {
1133 dbgs() << "SplitVectorOperand Op #" << OpNo << ": ";
1137 report_fatal_error("Do not know how to split this operator's "
1140 case ISD::SETCC: Res = SplitVecOp_VSETCC(N); break;
1141 case ISD::BITCAST: Res = SplitVecOp_BITCAST(N); break;
1142 case ISD::EXTRACT_SUBVECTOR: Res = SplitVecOp_EXTRACT_SUBVECTOR(N); break;
1143 case ISD::EXTRACT_VECTOR_ELT:Res = SplitVecOp_EXTRACT_VECTOR_ELT(N); break;
1144 case ISD::CONCAT_VECTORS: Res = SplitVecOp_CONCAT_VECTORS(N); break;
1145 case ISD::TRUNCATE: Res = SplitVecOp_TRUNCATE(N); break;
1146 case ISD::FP_ROUND: Res = SplitVecOp_FP_ROUND(N); break;
1148 Res = SplitVecOp_STORE(cast<StoreSDNode>(N), OpNo);
1151 Res = SplitVecOp_VSELECT(N, OpNo);
1156 case ISD::FP_EXTEND:
1157 case ISD::FP_TO_SINT:
1158 case ISD::FP_TO_UINT:
1159 case ISD::SINT_TO_FP:
1160 case ISD::UINT_TO_FP:
1162 case ISD::SIGN_EXTEND:
1163 case ISD::ZERO_EXTEND:
1164 case ISD::ANY_EXTEND:
1165 Res = SplitVecOp_UnaryOp(N);
1170 // If the result is null, the sub-method took care of registering results etc.
1171 if (!Res.getNode()) return false;
1173 // If the result is N, the sub-method updated N in place. Tell the legalizer
1175 if (Res.getNode() == N)
1178 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1179 "Invalid operand expansion");
1181 ReplaceValueWith(SDValue(N, 0), Res);
1185 SDValue DAGTypeLegalizer::SplitVecOp_VSELECT(SDNode *N, unsigned OpNo) {
1186 // The only possibility for an illegal operand is the mask, since result type
1187 // legalization would have handled this node already otherwise.
1188 assert(OpNo == 0 && "Illegal operand must be mask");
1190 SDValue Mask = N->getOperand(0);
1191 SDValue Src0 = N->getOperand(1);
1192 SDValue Src1 = N->getOperand(2);
1193 EVT Src0VT = Src0.getValueType();
1195 assert(Mask.getValueType().isVector() && "VSELECT without a vector mask?");
1198 GetSplitVector(N->getOperand(0), Lo, Hi);
1199 assert(Lo.getValueType() == Hi.getValueType() &&
1200 "Lo and Hi have differing types");
1203 std::tie(LoOpVT, HiOpVT) = DAG.GetSplitDestVTs(Src0VT);
1204 assert(LoOpVT == HiOpVT && "Asymmetric vector split?");
1206 SDValue LoOp0, HiOp0, LoOp1, HiOp1, LoMask, HiMask;
1207 std::tie(LoOp0, HiOp0) = DAG.SplitVector(Src0, DL);
1208 std::tie(LoOp1, HiOp1) = DAG.SplitVector(Src1, DL);
1209 std::tie(LoMask, HiMask) = DAG.SplitVector(Mask, DL);
1212 DAG.getNode(ISD::VSELECT, DL, LoOpVT, LoMask, LoOp0, LoOp1);
1214 DAG.getNode(ISD::VSELECT, DL, HiOpVT, HiMask, HiOp0, HiOp1);
1216 return DAG.getNode(ISD::CONCAT_VECTORS, DL, Src0VT, LoSelect, HiSelect);
1219 SDValue DAGTypeLegalizer::SplitVecOp_UnaryOp(SDNode *N) {
1220 // The result has a legal vector type, but the input needs splitting.
1221 EVT ResVT = N->getValueType(0);
1224 GetSplitVector(N->getOperand(0), Lo, Hi);
1225 EVT InVT = Lo.getValueType();
1227 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1228 InVT.getVectorNumElements());
1230 Lo = DAG.getNode(N->getOpcode(), dl, OutVT, Lo);
1231 Hi = DAG.getNode(N->getOpcode(), dl, OutVT, Hi);
1233 return DAG.getNode(ISD::CONCAT_VECTORS, dl, ResVT, Lo, Hi);
1236 SDValue DAGTypeLegalizer::SplitVecOp_BITCAST(SDNode *N) {
1237 // For example, i64 = BITCAST v4i16 on alpha. Typically the vector will
1238 // end up being split all the way down to individual components. Convert the
1239 // split pieces into integers and reassemble.
1241 GetSplitVector(N->getOperand(0), Lo, Hi);
1242 Lo = BitConvertToInteger(Lo);
1243 Hi = BitConvertToInteger(Hi);
1245 if (TLI.isBigEndian())
1248 return DAG.getNode(ISD::BITCAST, SDLoc(N), N->getValueType(0),
1249 JoinIntegers(Lo, Hi));
1252 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
1253 // We know that the extracted result type is legal.
1254 EVT SubVT = N->getValueType(0);
1255 SDValue Idx = N->getOperand(1);
1258 GetSplitVector(N->getOperand(0), Lo, Hi);
1260 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1261 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1263 if (IdxVal < LoElts) {
1264 assert(IdxVal + SubVT.getVectorNumElements() <= LoElts &&
1265 "Extracted subvector crosses vector split!");
1266 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Lo, Idx);
1268 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, SubVT, Hi,
1269 DAG.getConstant(IdxVal - LoElts, Idx.getValueType()));
1273 SDValue DAGTypeLegalizer::SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
1274 SDValue Vec = N->getOperand(0);
1275 SDValue Idx = N->getOperand(1);
1276 EVT VecVT = Vec.getValueType();
1278 if (isa<ConstantSDNode>(Idx)) {
1279 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
1280 assert(IdxVal < VecVT.getVectorNumElements() && "Invalid vector index!");
1283 GetSplitVector(Vec, Lo, Hi);
1285 uint64_t LoElts = Lo.getValueType().getVectorNumElements();
1287 if (IdxVal < LoElts)
1288 return SDValue(DAG.UpdateNodeOperands(N, Lo, Idx), 0);
1289 return SDValue(DAG.UpdateNodeOperands(N, Hi,
1290 DAG.getConstant(IdxVal - LoElts,
1291 Idx.getValueType())), 0);
1294 // Store the vector to the stack.
1295 EVT EltVT = VecVT.getVectorElementType();
1297 SDValue StackPtr = DAG.CreateStackTemporary(VecVT);
1298 SDValue Store = DAG.getStore(DAG.getEntryNode(), dl, Vec, StackPtr,
1299 MachinePointerInfo(), false, false, 0);
1301 // Load back the required element.
1302 StackPtr = GetVectorElementPointer(StackPtr, EltVT, Idx);
1303 return DAG.getExtLoad(ISD::EXTLOAD, dl, N->getValueType(0), Store, StackPtr,
1304 MachinePointerInfo(), EltVT, false, false, 0);
1307 SDValue DAGTypeLegalizer::SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo) {
1308 assert(N->isUnindexed() && "Indexed store of vector?");
1309 assert(OpNo == 1 && "Can only split the stored value");
1312 bool isTruncating = N->isTruncatingStore();
1313 SDValue Ch = N->getChain();
1314 SDValue Ptr = N->getBasePtr();
1315 EVT MemoryVT = N->getMemoryVT();
1316 unsigned Alignment = N->getOriginalAlignment();
1317 bool isVol = N->isVolatile();
1318 bool isNT = N->isNonTemporal();
1319 const MDNode *TBAAInfo = N->getTBAAInfo();
1321 GetSplitVector(N->getOperand(1), Lo, Hi);
1323 EVT LoMemVT, HiMemVT;
1324 std::tie(LoMemVT, HiMemVT) = DAG.GetSplitDestVTs(MemoryVT);
1326 unsigned IncrementSize = LoMemVT.getSizeInBits()/8;
1329 Lo = DAG.getTruncStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1330 LoMemVT, isVol, isNT, Alignment, TBAAInfo);
1332 Lo = DAG.getStore(Ch, DL, Lo, Ptr, N->getPointerInfo(),
1333 isVol, isNT, Alignment, TBAAInfo);
1335 // Increment the pointer to the other half.
1336 Ptr = DAG.getNode(ISD::ADD, DL, Ptr.getValueType(), Ptr,
1337 DAG.getConstant(IncrementSize, Ptr.getValueType()));
1340 Hi = DAG.getTruncStore(Ch, DL, Hi, Ptr,
1341 N->getPointerInfo().getWithOffset(IncrementSize),
1342 HiMemVT, isVol, isNT, Alignment, TBAAInfo);
1344 Hi = DAG.getStore(Ch, DL, Hi, Ptr,
1345 N->getPointerInfo().getWithOffset(IncrementSize),
1346 isVol, isNT, Alignment, TBAAInfo);
1348 return DAG.getNode(ISD::TokenFactor, DL, MVT::Other, Lo, Hi);
1351 SDValue DAGTypeLegalizer::SplitVecOp_CONCAT_VECTORS(SDNode *N) {
1354 // The input operands all must have the same type, and we know the result
1355 // type is valid. Convert this to a buildvector which extracts all the
1357 // TODO: If the input elements are power-two vectors, we could convert this to
1358 // a new CONCAT_VECTORS node with elements that are half-wide.
1359 SmallVector<SDValue, 32> Elts;
1360 EVT EltVT = N->getValueType(0).getVectorElementType();
1361 for (unsigned op = 0, e = N->getNumOperands(); op != e; ++op) {
1362 SDValue Op = N->getOperand(op);
1363 for (unsigned i = 0, e = Op.getValueType().getVectorNumElements();
1365 Elts.push_back(DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, EltVT,
1366 Op, DAG.getConstant(i, TLI.getVectorIdxTy())));
1371 return DAG.getNode(ISD::BUILD_VECTOR, DL, N->getValueType(0), Elts);
1374 SDValue DAGTypeLegalizer::SplitVecOp_TRUNCATE(SDNode *N) {
1375 // The result type is legal, but the input type is illegal. If splitting
1376 // ends up with the result type of each half still being legal, just
1377 // do that. If, however, that would result in an illegal result type,
1378 // we can try to get more clever with power-two vectors. Specifically,
1379 // split the input type, but also widen the result element size, then
1380 // concatenate the halves and truncate again. For example, consider a target
1381 // where v8i8 is legal and v8i32 is not (ARM, which doesn't have 256-bit
1382 // vectors). To perform a "%res = v8i8 trunc v8i32 %in" we do:
1383 // %inlo = v4i32 extract_subvector %in, 0
1384 // %inhi = v4i32 extract_subvector %in, 4
1385 // %lo16 = v4i16 trunc v4i32 %inlo
1386 // %hi16 = v4i16 trunc v4i32 %inhi
1387 // %in16 = v8i16 concat_vectors v4i16 %lo16, v4i16 %hi16
1388 // %res = v8i8 trunc v8i16 %in16
1390 // Without this transform, the original truncate would end up being
1391 // scalarized, which is pretty much always a last resort.
1392 SDValue InVec = N->getOperand(0);
1393 EVT InVT = InVec->getValueType(0);
1394 EVT OutVT = N->getValueType(0);
1395 unsigned NumElements = OutVT.getVectorNumElements();
1396 // Widening should have already made sure this is a power-two vector
1397 // if we're trying to split it at all. assert() that's true, just in case.
1398 assert(!(NumElements & 1) && "Splitting vector, but not in half!");
1400 unsigned InElementSize = InVT.getVectorElementType().getSizeInBits();
1401 unsigned OutElementSize = OutVT.getVectorElementType().getSizeInBits();
1403 // If the input elements are only 1/2 the width of the result elements,
1404 // just use the normal splitting. Our trick only work if there's room
1405 // to split more than once.
1406 if (InElementSize <= OutElementSize * 2)
1407 return SplitVecOp_UnaryOp(N);
1410 // Extract the halves of the input via extract_subvector.
1411 SDValue InLoVec, InHiVec;
1412 std::tie(InLoVec, InHiVec) = DAG.SplitVector(InVec, DL);
1413 // Truncate them to 1/2 the element size.
1414 EVT HalfElementVT = EVT::getIntegerVT(*DAG.getContext(), InElementSize/2);
1415 EVT HalfVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT,
1417 SDValue HalfLo = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InLoVec);
1418 SDValue HalfHi = DAG.getNode(ISD::TRUNCATE, DL, HalfVT, InHiVec);
1419 // Concatenate them to get the full intermediate truncation result.
1420 EVT InterVT = EVT::getVectorVT(*DAG.getContext(), HalfElementVT, NumElements);
1421 SDValue InterVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InterVT, HalfLo,
1423 // Now finish up by truncating all the way down to the original result
1424 // type. This should normally be something that ends up being legal directly,
1425 // but in theory if a target has very wide vectors and an annoyingly
1426 // restricted set of legal types, this split can chain to build things up.
1427 return DAG.getNode(ISD::TRUNCATE, DL, OutVT, InterVec);
1430 SDValue DAGTypeLegalizer::SplitVecOp_VSETCC(SDNode *N) {
1431 assert(N->getValueType(0).isVector() &&
1432 N->getOperand(0).getValueType().isVector() &&
1433 "Operand types must be vectors");
1434 // The result has a legal vector type, but the input needs splitting.
1435 SDValue Lo0, Hi0, Lo1, Hi1, LoRes, HiRes;
1437 GetSplitVector(N->getOperand(0), Lo0, Hi0);
1438 GetSplitVector(N->getOperand(1), Lo1, Hi1);
1439 unsigned PartElements = Lo0.getValueType().getVectorNumElements();
1440 EVT PartResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, PartElements);
1441 EVT WideResVT = EVT::getVectorVT(*DAG.getContext(), MVT::i1, 2*PartElements);
1443 LoRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Lo0, Lo1, N->getOperand(2));
1444 HiRes = DAG.getNode(ISD::SETCC, DL, PartResVT, Hi0, Hi1, N->getOperand(2));
1445 SDValue Con = DAG.getNode(ISD::CONCAT_VECTORS, DL, WideResVT, LoRes, HiRes);
1446 return PromoteTargetBoolean(Con, N->getValueType(0));
1450 SDValue DAGTypeLegalizer::SplitVecOp_FP_ROUND(SDNode *N) {
1451 // The result has a legal vector type, but the input needs splitting.
1452 EVT ResVT = N->getValueType(0);
1455 GetSplitVector(N->getOperand(0), Lo, Hi);
1456 EVT InVT = Lo.getValueType();
1458 EVT OutVT = EVT::getVectorVT(*DAG.getContext(), ResVT.getVectorElementType(),
1459 InVT.getVectorNumElements());
1461 Lo = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Lo, N->getOperand(1));
1462 Hi = DAG.getNode(ISD::FP_ROUND, DL, OutVT, Hi, N->getOperand(1));
1464 return DAG.getNode(ISD::CONCAT_VECTORS, DL, ResVT, Lo, Hi);
1469 //===----------------------------------------------------------------------===//
1470 // Result Vector Widening
1471 //===----------------------------------------------------------------------===//
1473 void DAGTypeLegalizer::WidenVectorResult(SDNode *N, unsigned ResNo) {
1474 DEBUG(dbgs() << "Widen node result " << ResNo << ": ";
1478 // See if the target wants to custom widen this node.
1479 if (CustomWidenLowerNode(N, N->getValueType(ResNo)))
1482 SDValue Res = SDValue();
1483 switch (N->getOpcode()) {
1486 dbgs() << "WidenVectorResult #" << ResNo << ": ";
1490 llvm_unreachable("Do not know how to widen the result of this operator!");
1492 case ISD::MERGE_VALUES: Res = WidenVecRes_MERGE_VALUES(N, ResNo); break;
1493 case ISD::BITCAST: Res = WidenVecRes_BITCAST(N); break;
1494 case ISD::BUILD_VECTOR: Res = WidenVecRes_BUILD_VECTOR(N); break;
1495 case ISD::CONCAT_VECTORS: Res = WidenVecRes_CONCAT_VECTORS(N); break;
1496 case ISD::CONVERT_RNDSAT: Res = WidenVecRes_CONVERT_RNDSAT(N); break;
1497 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecRes_EXTRACT_SUBVECTOR(N); break;
1498 case ISD::FP_ROUND_INREG: Res = WidenVecRes_InregOp(N); break;
1499 case ISD::INSERT_VECTOR_ELT: Res = WidenVecRes_INSERT_VECTOR_ELT(N); break;
1500 case ISD::LOAD: Res = WidenVecRes_LOAD(N); break;
1501 case ISD::SCALAR_TO_VECTOR: Res = WidenVecRes_SCALAR_TO_VECTOR(N); break;
1502 case ISD::SIGN_EXTEND_INREG: Res = WidenVecRes_InregOp(N); break;
1504 case ISD::SELECT: Res = WidenVecRes_SELECT(N); break;
1505 case ISD::SELECT_CC: Res = WidenVecRes_SELECT_CC(N); break;
1506 case ISD::SETCC: Res = WidenVecRes_SETCC(N); break;
1507 case ISD::UNDEF: Res = WidenVecRes_UNDEF(N); break;
1508 case ISD::VECTOR_SHUFFLE:
1509 Res = WidenVecRes_VECTOR_SHUFFLE(cast<ShuffleVectorSDNode>(N));
1521 Res = WidenVecRes_Binary(N);
1525 case ISD::FCOPYSIGN:
1535 Res = WidenVecRes_BinaryCanTrap(N);
1539 Res = WidenVecRes_POWI(N);
1545 Res = WidenVecRes_Shift(N);
1548 case ISD::ANY_EXTEND:
1549 case ISD::FP_EXTEND:
1551 case ISD::FP_TO_SINT:
1552 case ISD::FP_TO_UINT:
1553 case ISD::SIGN_EXTEND:
1554 case ISD::SINT_TO_FP:
1556 case ISD::UINT_TO_FP:
1557 case ISD::ZERO_EXTEND:
1558 Res = WidenVecRes_Convert(N);
1573 case ISD::FNEARBYINT:
1580 Res = WidenVecRes_Unary(N);
1583 Res = WidenVecRes_Ternary(N);
1587 // If Res is null, the sub-method took care of registering the result.
1589 SetWidenedVector(SDValue(N, ResNo), Res);
1592 SDValue DAGTypeLegalizer::WidenVecRes_Ternary(SDNode *N) {
1593 // Ternary op widening.
1595 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1596 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1597 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1598 SDValue InOp3 = GetWidenedVector(N->getOperand(2));
1599 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2, InOp3);
1602 SDValue DAGTypeLegalizer::WidenVecRes_Binary(SDNode *N) {
1603 // Binary op widening.
1605 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1606 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1607 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1608 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1611 SDValue DAGTypeLegalizer::WidenVecRes_BinaryCanTrap(SDNode *N) {
1612 // Binary op widening for operations that can trap.
1613 unsigned Opcode = N->getOpcode();
1615 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1616 EVT WidenEltVT = WidenVT.getVectorElementType();
1618 unsigned NumElts = VT.getVectorNumElements();
1619 while (!TLI.isTypeLegal(VT) && NumElts != 1) {
1620 NumElts = NumElts / 2;
1621 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1624 if (NumElts != 1 && !TLI.canOpTrap(N->getOpcode(), VT)) {
1625 // Operation doesn't trap so just widen as normal.
1626 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1627 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1628 return DAG.getNode(N->getOpcode(), dl, WidenVT, InOp1, InOp2);
1631 // No legal vector version so unroll the vector operation and then widen.
1633 return DAG.UnrollVectorOp(N, WidenVT.getVectorNumElements());
1635 // Since the operation can trap, apply operation on the original vector.
1637 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
1638 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
1639 unsigned CurNumElts = N->getValueType(0).getVectorNumElements();
1641 SmallVector<SDValue, 16> ConcatOps(CurNumElts);
1642 unsigned ConcatEnd = 0; // Current ConcatOps index.
1643 int Idx = 0; // Current Idx into input vectors.
1645 // NumElts := greatest legal vector size (at most WidenVT)
1646 // while (orig. vector has unhandled elements) {
1647 // take munches of size NumElts from the beginning and add to ConcatOps
1648 // NumElts := next smaller supported vector size or 1
1650 while (CurNumElts != 0) {
1651 while (CurNumElts >= NumElts) {
1652 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp1,
1653 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1654 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, VT, InOp2,
1655 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
1656 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, VT, EOp1, EOp2);
1658 CurNumElts -= NumElts;
1661 NumElts = NumElts / 2;
1662 VT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NumElts);
1663 } while (!TLI.isTypeLegal(VT) && NumElts != 1);
1666 for (unsigned i = 0; i != CurNumElts; ++i, ++Idx) {
1667 SDValue EOp1 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1668 InOp1, DAG.getConstant(Idx,
1669 TLI.getVectorIdxTy()));
1670 SDValue EOp2 = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, WidenEltVT,
1671 InOp2, DAG.getConstant(Idx,
1672 TLI.getVectorIdxTy()));
1673 ConcatOps[ConcatEnd++] = DAG.getNode(Opcode, dl, WidenEltVT,
1680 // Check to see if we have a single operation with the widen type.
1681 if (ConcatEnd == 1) {
1682 VT = ConcatOps[0].getValueType();
1684 return ConcatOps[0];
1687 // while (Some element of ConcatOps is not of type MaxVT) {
1688 // From the end of ConcatOps, collect elements of the same type and put
1689 // them into an op of the next larger supported type
1691 while (ConcatOps[ConcatEnd-1].getValueType() != MaxVT) {
1692 Idx = ConcatEnd - 1;
1693 VT = ConcatOps[Idx--].getValueType();
1694 while (Idx >= 0 && ConcatOps[Idx].getValueType() == VT)
1697 int NextSize = VT.isVector() ? VT.getVectorNumElements() : 1;
1701 NextVT = EVT::getVectorVT(*DAG.getContext(), WidenEltVT, NextSize);
1702 } while (!TLI.isTypeLegal(NextVT));
1704 if (!VT.isVector()) {
1705 // Scalar type, create an INSERT_VECTOR_ELEMENT of type NextVT
1706 SDValue VecOp = DAG.getUNDEF(NextVT);
1707 unsigned NumToInsert = ConcatEnd - Idx - 1;
1708 for (unsigned i = 0, OpIdx = Idx+1; i < NumToInsert; i++, OpIdx++) {
1709 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NextVT, VecOp,
1710 ConcatOps[OpIdx], DAG.getConstant(i,
1711 TLI.getVectorIdxTy()));
1713 ConcatOps[Idx+1] = VecOp;
1714 ConcatEnd = Idx + 2;
1716 // Vector type, create a CONCAT_VECTORS of type NextVT
1717 SDValue undefVec = DAG.getUNDEF(VT);
1718 unsigned OpsToConcat = NextSize/VT.getVectorNumElements();
1719 SmallVector<SDValue, 16> SubConcatOps(OpsToConcat);
1720 unsigned RealVals = ConcatEnd - Idx - 1;
1721 unsigned SubConcatEnd = 0;
1722 unsigned SubConcatIdx = Idx + 1;
1723 while (SubConcatEnd < RealVals)
1724 SubConcatOps[SubConcatEnd++] = ConcatOps[++Idx];
1725 while (SubConcatEnd < OpsToConcat)
1726 SubConcatOps[SubConcatEnd++] = undefVec;
1727 ConcatOps[SubConcatIdx] = DAG.getNode(ISD::CONCAT_VECTORS, dl,
1728 NextVT, SubConcatOps);
1729 ConcatEnd = SubConcatIdx + 1;
1733 // Check to see if we have a single operation with the widen type.
1734 if (ConcatEnd == 1) {
1735 VT = ConcatOps[0].getValueType();
1737 return ConcatOps[0];
1740 // add undefs of size MaxVT until ConcatOps grows to length of WidenVT
1741 unsigned NumOps = WidenVT.getVectorNumElements()/MaxVT.getVectorNumElements();
1742 if (NumOps != ConcatEnd ) {
1743 SDValue UndefVal = DAG.getUNDEF(MaxVT);
1744 for (unsigned j = ConcatEnd; j < NumOps; ++j)
1745 ConcatOps[j] = UndefVal;
1747 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
1748 ArrayRef<SDValue>(&ConcatOps[0], NumOps));
1751 SDValue DAGTypeLegalizer::WidenVecRes_Convert(SDNode *N) {
1752 SDValue InOp = N->getOperand(0);
1755 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1756 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1758 EVT InVT = InOp.getValueType();
1759 EVT InEltVT = InVT.getVectorElementType();
1760 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
1762 unsigned Opcode = N->getOpcode();
1763 unsigned InVTNumElts = InVT.getVectorNumElements();
1765 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
1766 InOp = GetWidenedVector(N->getOperand(0));
1767 InVT = InOp.getValueType();
1768 InVTNumElts = InVT.getVectorNumElements();
1769 if (InVTNumElts == WidenNumElts) {
1770 if (N->getNumOperands() == 1)
1771 return DAG.getNode(Opcode, DL, WidenVT, InOp);
1772 return DAG.getNode(Opcode, DL, WidenVT, InOp, N->getOperand(1));
1776 if (TLI.isTypeLegal(InWidenVT)) {
1777 // Because the result and the input are different vector types, widening
1778 // the result could create a legal type but widening the input might make
1779 // it an illegal type that might lead to repeatedly splitting the input
1780 // and then widening it. To avoid this, we widen the input only if
1781 // it results in a legal type.
1782 if (WidenNumElts % InVTNumElts == 0) {
1783 // Widen the input and call convert on the widened input vector.
1784 unsigned NumConcat = WidenNumElts/InVTNumElts;
1785 SmallVector<SDValue, 16> Ops(NumConcat);
1787 SDValue UndefVal = DAG.getUNDEF(InVT);
1788 for (unsigned i = 1; i != NumConcat; ++i)
1790 SDValue InVec = DAG.getNode(ISD::CONCAT_VECTORS, DL, InWidenVT, Ops);
1791 if (N->getNumOperands() == 1)
1792 return DAG.getNode(Opcode, DL, WidenVT, InVec);
1793 return DAG.getNode(Opcode, DL, WidenVT, InVec, N->getOperand(1));
1796 if (InVTNumElts % WidenNumElts == 0) {
1797 SDValue InVal = DAG.getNode(ISD::EXTRACT_SUBVECTOR, DL, InWidenVT,
1798 InOp, DAG.getConstant(0,
1799 TLI.getVectorIdxTy()));
1800 // Extract the input and convert the shorten input vector.
1801 if (N->getNumOperands() == 1)
1802 return DAG.getNode(Opcode, DL, WidenVT, InVal);
1803 return DAG.getNode(Opcode, DL, WidenVT, InVal, N->getOperand(1));
1807 // Otherwise unroll into some nasty scalar code and rebuild the vector.
1808 SmallVector<SDValue, 16> Ops(WidenNumElts);
1809 EVT EltVT = WidenVT.getVectorElementType();
1810 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
1812 for (i=0; i < MinElts; ++i) {
1813 SDValue Val = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, DL, InEltVT, InOp,
1814 DAG.getConstant(i, TLI.getVectorIdxTy()));
1815 if (N->getNumOperands() == 1)
1816 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val);
1818 Ops[i] = DAG.getNode(Opcode, DL, EltVT, Val, N->getOperand(1));
1821 SDValue UndefVal = DAG.getUNDEF(EltVT);
1822 for (; i < WidenNumElts; ++i)
1825 return DAG.getNode(ISD::BUILD_VECTOR, DL, WidenVT, Ops);
1828 SDValue DAGTypeLegalizer::WidenVecRes_POWI(SDNode *N) {
1829 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1830 SDValue InOp = GetWidenedVector(N->getOperand(0));
1831 SDValue ShOp = N->getOperand(1);
1832 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1835 SDValue DAGTypeLegalizer::WidenVecRes_Shift(SDNode *N) {
1836 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1837 SDValue InOp = GetWidenedVector(N->getOperand(0));
1838 SDValue ShOp = N->getOperand(1);
1840 EVT ShVT = ShOp.getValueType();
1841 if (getTypeAction(ShVT) == TargetLowering::TypeWidenVector) {
1842 ShOp = GetWidenedVector(ShOp);
1843 ShVT = ShOp.getValueType();
1845 EVT ShWidenVT = EVT::getVectorVT(*DAG.getContext(),
1846 ShVT.getVectorElementType(),
1847 WidenVT.getVectorNumElements());
1848 if (ShVT != ShWidenVT)
1849 ShOp = ModifyToType(ShOp, ShWidenVT);
1851 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp, ShOp);
1854 SDValue DAGTypeLegalizer::WidenVecRes_Unary(SDNode *N) {
1855 // Unary op widening.
1856 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1857 SDValue InOp = GetWidenedVector(N->getOperand(0));
1858 return DAG.getNode(N->getOpcode(), SDLoc(N), WidenVT, InOp);
1861 SDValue DAGTypeLegalizer::WidenVecRes_InregOp(SDNode *N) {
1862 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1863 EVT ExtVT = EVT::getVectorVT(*DAG.getContext(),
1864 cast<VTSDNode>(N->getOperand(1))->getVT()
1865 .getVectorElementType(),
1866 WidenVT.getVectorNumElements());
1867 SDValue WidenLHS = GetWidenedVector(N->getOperand(0));
1868 return DAG.getNode(N->getOpcode(), SDLoc(N),
1869 WidenVT, WidenLHS, DAG.getValueType(ExtVT));
1872 SDValue DAGTypeLegalizer::WidenVecRes_MERGE_VALUES(SDNode *N, unsigned ResNo) {
1873 SDValue WidenVec = DisintegrateMERGE_VALUES(N, ResNo);
1874 return GetWidenedVector(WidenVec);
1877 SDValue DAGTypeLegalizer::WidenVecRes_BITCAST(SDNode *N) {
1878 SDValue InOp = N->getOperand(0);
1879 EVT InVT = InOp.getValueType();
1880 EVT VT = N->getValueType(0);
1881 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1884 switch (getTypeAction(InVT)) {
1885 case TargetLowering::TypeLegal:
1887 case TargetLowering::TypePromoteInteger:
1888 // If the incoming type is a vector that is being promoted, then
1889 // we know that the elements are arranged differently and that we
1890 // must perform the conversion using a stack slot.
1891 if (InVT.isVector())
1894 // If the InOp is promoted to the same size, convert it. Otherwise,
1895 // fall out of the switch and widen the promoted input.
1896 InOp = GetPromotedInteger(InOp);
1897 InVT = InOp.getValueType();
1898 if (WidenVT.bitsEq(InVT))
1899 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1901 case TargetLowering::TypeSoftenFloat:
1902 case TargetLowering::TypeExpandInteger:
1903 case TargetLowering::TypeExpandFloat:
1904 case TargetLowering::TypeScalarizeVector:
1905 case TargetLowering::TypeSplitVector:
1907 case TargetLowering::TypeWidenVector:
1908 // If the InOp is widened to the same size, convert it. Otherwise, fall
1909 // out of the switch and widen the widened input.
1910 InOp = GetWidenedVector(InOp);
1911 InVT = InOp.getValueType();
1912 if (WidenVT.bitsEq(InVT))
1913 // The input widens to the same size. Convert to the widen value.
1914 return DAG.getNode(ISD::BITCAST, dl, WidenVT, InOp);
1918 unsigned WidenSize = WidenVT.getSizeInBits();
1919 unsigned InSize = InVT.getSizeInBits();
1920 // x86mmx is not an acceptable vector element type, so don't try.
1921 if (WidenSize % InSize == 0 && InVT != MVT::x86mmx) {
1922 // Determine new input vector type. The new input vector type will use
1923 // the same element type (if its a vector) or use the input type as a
1924 // vector. It is the same size as the type to widen to.
1926 unsigned NewNumElts = WidenSize / InSize;
1927 if (InVT.isVector()) {
1928 EVT InEltVT = InVT.getVectorElementType();
1929 NewInVT = EVT::getVectorVT(*DAG.getContext(), InEltVT,
1930 WidenSize / InEltVT.getSizeInBits());
1932 NewInVT = EVT::getVectorVT(*DAG.getContext(), InVT, NewNumElts);
1935 if (TLI.isTypeLegal(NewInVT)) {
1936 // Because the result and the input are different vector types, widening
1937 // the result could create a legal type but widening the input might make
1938 // it an illegal type that might lead to repeatedly splitting the input
1939 // and then widening it. To avoid this, we widen the input only if
1940 // it results in a legal type.
1941 SmallVector<SDValue, 16> Ops(NewNumElts);
1942 SDValue UndefVal = DAG.getUNDEF(InVT);
1944 for (unsigned i = 1; i < NewNumElts; ++i)
1948 if (InVT.isVector())
1949 NewVec = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewInVT, Ops);
1951 NewVec = DAG.getNode(ISD::BUILD_VECTOR, dl, NewInVT, Ops);
1952 return DAG.getNode(ISD::BITCAST, dl, WidenVT, NewVec);
1956 return CreateStackStoreLoad(InOp, WidenVT);
1959 SDValue DAGTypeLegalizer::WidenVecRes_BUILD_VECTOR(SDNode *N) {
1961 // Build a vector with undefined for the new nodes.
1962 EVT VT = N->getValueType(0);
1964 // Integer BUILD_VECTOR operands may be larger than the node's vector element
1965 // type. The UNDEFs need to have the same type as the existing operands.
1966 EVT EltVT = N->getOperand(0).getValueType();
1967 unsigned NumElts = VT.getVectorNumElements();
1969 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
1970 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1972 SmallVector<SDValue, 16> NewOps(N->op_begin(), N->op_end());
1973 assert(WidenNumElts >= NumElts && "Shrinking vector instead of widening!");
1974 NewOps.append(WidenNumElts - NumElts, DAG.getUNDEF(EltVT));
1976 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, NewOps);
1979 SDValue DAGTypeLegalizer::WidenVecRes_CONCAT_VECTORS(SDNode *N) {
1980 EVT InVT = N->getOperand(0).getValueType();
1981 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
1983 unsigned WidenNumElts = WidenVT.getVectorNumElements();
1984 unsigned NumInElts = InVT.getVectorNumElements();
1985 unsigned NumOperands = N->getNumOperands();
1987 bool InputWidened = false; // Indicates we need to widen the input.
1988 if (getTypeAction(InVT) != TargetLowering::TypeWidenVector) {
1989 if (WidenVT.getVectorNumElements() % InVT.getVectorNumElements() == 0) {
1990 // Add undef vectors to widen to correct length.
1991 unsigned NumConcat = WidenVT.getVectorNumElements() /
1992 InVT.getVectorNumElements();
1993 SDValue UndefVal = DAG.getUNDEF(InVT);
1994 SmallVector<SDValue, 16> Ops(NumConcat);
1995 for (unsigned i=0; i < NumOperands; ++i)
1996 Ops[i] = N->getOperand(i);
1997 for (unsigned i = NumOperands; i != NumConcat; ++i)
1999 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, Ops);
2002 InputWidened = true;
2003 if (WidenVT == TLI.getTypeToTransformTo(*DAG.getContext(), InVT)) {
2004 // The inputs and the result are widen to the same value.
2006 for (i=1; i < NumOperands; ++i)
2007 if (N->getOperand(i).getOpcode() != ISD::UNDEF)
2010 if (i == NumOperands)
2011 // Everything but the first operand is an UNDEF so just return the
2012 // widened first operand.
2013 return GetWidenedVector(N->getOperand(0));
2015 if (NumOperands == 2) {
2016 // Replace concat of two operands with a shuffle.
2017 SmallVector<int, 16> MaskOps(WidenNumElts, -1);
2018 for (unsigned i = 0; i < NumInElts; ++i) {
2020 MaskOps[i + NumInElts] = i + WidenNumElts;
2022 return DAG.getVectorShuffle(WidenVT, dl,
2023 GetWidenedVector(N->getOperand(0)),
2024 GetWidenedVector(N->getOperand(1)),
2030 // Fall back to use extracts and build vector.
2031 EVT EltVT = WidenVT.getVectorElementType();
2032 SmallVector<SDValue, 16> Ops(WidenNumElts);
2034 for (unsigned i=0; i < NumOperands; ++i) {
2035 SDValue InOp = N->getOperand(i);
2037 InOp = GetWidenedVector(InOp);
2038 for (unsigned j=0; j < NumInElts; ++j)
2039 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2040 DAG.getConstant(j, TLI.getVectorIdxTy()));
2042 SDValue UndefVal = DAG.getUNDEF(EltVT);
2043 for (; Idx < WidenNumElts; ++Idx)
2044 Ops[Idx] = UndefVal;
2045 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2048 SDValue DAGTypeLegalizer::WidenVecRes_CONVERT_RNDSAT(SDNode *N) {
2050 SDValue InOp = N->getOperand(0);
2051 SDValue RndOp = N->getOperand(3);
2052 SDValue SatOp = N->getOperand(4);
2054 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2055 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2057 EVT InVT = InOp.getValueType();
2058 EVT InEltVT = InVT.getVectorElementType();
2059 EVT InWidenVT = EVT::getVectorVT(*DAG.getContext(), InEltVT, WidenNumElts);
2061 SDValue DTyOp = DAG.getValueType(WidenVT);
2062 SDValue STyOp = DAG.getValueType(InWidenVT);
2063 ISD::CvtCode CvtCode = cast<CvtRndSatSDNode>(N)->getCvtCode();
2065 unsigned InVTNumElts = InVT.getVectorNumElements();
2066 if (getTypeAction(InVT) == TargetLowering::TypeWidenVector) {
2067 InOp = GetWidenedVector(InOp);
2068 InVT = InOp.getValueType();
2069 InVTNumElts = InVT.getVectorNumElements();
2070 if (InVTNumElts == WidenNumElts)
2071 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2075 if (TLI.isTypeLegal(InWidenVT)) {
2076 // Because the result and the input are different vector types, widening
2077 // the result could create a legal type but widening the input might make
2078 // it an illegal type that might lead to repeatedly splitting the input
2079 // and then widening it. To avoid this, we widen the input only if
2080 // it results in a legal type.
2081 if (WidenNumElts % InVTNumElts == 0) {
2082 // Widen the input and call convert on the widened input vector.
2083 unsigned NumConcat = WidenNumElts/InVTNumElts;
2084 SmallVector<SDValue, 16> Ops(NumConcat);
2086 SDValue UndefVal = DAG.getUNDEF(InVT);
2087 for (unsigned i = 1; i != NumConcat; ++i)
2090 InOp = DAG.getNode(ISD::CONCAT_VECTORS, dl, InWidenVT, Ops);
2091 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2095 if (InVTNumElts % WidenNumElts == 0) {
2096 // Extract the input and convert the shorten input vector.
2097 InOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, InWidenVT, InOp,
2098 DAG.getConstant(0, TLI.getVectorIdxTy()));
2099 return DAG.getConvertRndSat(WidenVT, dl, InOp, DTyOp, STyOp, RndOp,
2104 // Otherwise unroll into some nasty scalar code and rebuild the vector.
2105 SmallVector<SDValue, 16> Ops(WidenNumElts);
2106 EVT EltVT = WidenVT.getVectorElementType();
2107 DTyOp = DAG.getValueType(EltVT);
2108 STyOp = DAG.getValueType(InEltVT);
2110 unsigned MinElts = std::min(InVTNumElts, WidenNumElts);
2112 for (i=0; i < MinElts; ++i) {
2113 SDValue ExtVal = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2114 DAG.getConstant(i, TLI.getVectorIdxTy()));
2115 Ops[i] = DAG.getConvertRndSat(WidenVT, dl, ExtVal, DTyOp, STyOp, RndOp,
2119 SDValue UndefVal = DAG.getUNDEF(EltVT);
2120 for (; i < WidenNumElts; ++i)
2123 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2126 SDValue DAGTypeLegalizer::WidenVecRes_EXTRACT_SUBVECTOR(SDNode *N) {
2127 EVT VT = N->getValueType(0);
2128 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2129 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2130 SDValue InOp = N->getOperand(0);
2131 SDValue Idx = N->getOperand(1);
2134 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2135 InOp = GetWidenedVector(InOp);
2137 EVT InVT = InOp.getValueType();
2139 // Check if we can just return the input vector after widening.
2140 uint64_t IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
2141 if (IdxVal == 0 && InVT == WidenVT)
2144 // Check if we can extract from the vector.
2145 unsigned InNumElts = InVT.getVectorNumElements();
2146 if (IdxVal % WidenNumElts == 0 && IdxVal + WidenNumElts < InNumElts)
2147 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, WidenVT, InOp, Idx);
2149 // We could try widening the input to the right length but for now, extract
2150 // the original elements, fill the rest with undefs and build a vector.
2151 SmallVector<SDValue, 16> Ops(WidenNumElts);
2152 EVT EltVT = VT.getVectorElementType();
2153 unsigned NumElts = VT.getVectorNumElements();
2155 for (i=0; i < NumElts; ++i)
2156 Ops[i] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2157 DAG.getConstant(IdxVal+i, TLI.getVectorIdxTy()));
2159 SDValue UndefVal = DAG.getUNDEF(EltVT);
2160 for (; i < WidenNumElts; ++i)
2162 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2165 SDValue DAGTypeLegalizer::WidenVecRes_INSERT_VECTOR_ELT(SDNode *N) {
2166 SDValue InOp = GetWidenedVector(N->getOperand(0));
2167 return DAG.getNode(ISD::INSERT_VECTOR_ELT, SDLoc(N),
2168 InOp.getValueType(), InOp,
2169 N->getOperand(1), N->getOperand(2));
2172 SDValue DAGTypeLegalizer::WidenVecRes_LOAD(SDNode *N) {
2173 LoadSDNode *LD = cast<LoadSDNode>(N);
2174 ISD::LoadExtType ExtType = LD->getExtensionType();
2177 SmallVector<SDValue, 16> LdChain; // Chain for the series of load
2178 if (ExtType != ISD::NON_EXTLOAD)
2179 Result = GenWidenVectorExtLoads(LdChain, LD, ExtType);
2181 Result = GenWidenVectorLoads(LdChain, LD);
2183 // If we generate a single load, we can use that for the chain. Otherwise,
2184 // build a factor node to remember the multiple loads are independent and
2187 if (LdChain.size() == 1)
2188 NewChain = LdChain[0];
2190 NewChain = DAG.getNode(ISD::TokenFactor, SDLoc(LD), MVT::Other, LdChain);
2192 // Modified the chain - switch anything that used the old chain to use
2194 ReplaceValueWith(SDValue(N, 1), NewChain);
2199 SDValue DAGTypeLegalizer::WidenVecRes_SCALAR_TO_VECTOR(SDNode *N) {
2200 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2201 return DAG.getNode(ISD::SCALAR_TO_VECTOR, SDLoc(N),
2202 WidenVT, N->getOperand(0));
2205 SDValue DAGTypeLegalizer::WidenVecRes_SELECT(SDNode *N) {
2206 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2207 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2209 SDValue Cond1 = N->getOperand(0);
2210 EVT CondVT = Cond1.getValueType();
2211 if (CondVT.isVector()) {
2212 EVT CondEltVT = CondVT.getVectorElementType();
2213 EVT CondWidenVT = EVT::getVectorVT(*DAG.getContext(),
2214 CondEltVT, WidenNumElts);
2215 if (getTypeAction(CondVT) == TargetLowering::TypeWidenVector)
2216 Cond1 = GetWidenedVector(Cond1);
2218 // If we have to split the condition there is no point in widening the
2219 // select. This would result in an cycle of widening the select ->
2220 // widening the condition operand -> splitting the condition operand ->
2221 // splitting the select -> widening the select. Instead split this select
2222 // further and widen the resulting type.
2223 if (getTypeAction(CondVT) == TargetLowering::TypeSplitVector) {
2224 SDValue SplitSelect = SplitVecOp_VSELECT(N, 0);
2225 SDValue Res = ModifyToType(SplitSelect, WidenVT);
2229 if (Cond1.getValueType() != CondWidenVT)
2230 Cond1 = ModifyToType(Cond1, CondWidenVT);
2233 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2234 SDValue InOp2 = GetWidenedVector(N->getOperand(2));
2235 assert(InOp1.getValueType() == WidenVT && InOp2.getValueType() == WidenVT);
2236 return DAG.getNode(N->getOpcode(), SDLoc(N),
2237 WidenVT, Cond1, InOp1, InOp2);
2240 SDValue DAGTypeLegalizer::WidenVecRes_SELECT_CC(SDNode *N) {
2241 SDValue InOp1 = GetWidenedVector(N->getOperand(2));
2242 SDValue InOp2 = GetWidenedVector(N->getOperand(3));
2243 return DAG.getNode(ISD::SELECT_CC, SDLoc(N),
2244 InOp1.getValueType(), N->getOperand(0),
2245 N->getOperand(1), InOp1, InOp2, N->getOperand(4));
2248 SDValue DAGTypeLegalizer::WidenVecRes_SETCC(SDNode *N) {
2249 assert(N->getValueType(0).isVector() ==
2250 N->getOperand(0).getValueType().isVector() &&
2251 "Scalar/Vector type mismatch");
2252 if (N->getValueType(0).isVector()) return WidenVecRes_VSETCC(N);
2254 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2255 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2256 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2257 return DAG.getNode(ISD::SETCC, SDLoc(N), WidenVT,
2258 InOp1, InOp2, N->getOperand(2));
2261 SDValue DAGTypeLegalizer::WidenVecRes_UNDEF(SDNode *N) {
2262 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2263 return DAG.getUNDEF(WidenVT);
2266 SDValue DAGTypeLegalizer::WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N) {
2267 EVT VT = N->getValueType(0);
2270 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), VT);
2271 unsigned NumElts = VT.getVectorNumElements();
2272 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2274 SDValue InOp1 = GetWidenedVector(N->getOperand(0));
2275 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2277 // Adjust mask based on new input vector length.
2278 SmallVector<int, 16> NewMask;
2279 for (unsigned i = 0; i != NumElts; ++i) {
2280 int Idx = N->getMaskElt(i);
2281 if (Idx < (int)NumElts)
2282 NewMask.push_back(Idx);
2284 NewMask.push_back(Idx - NumElts + WidenNumElts);
2286 for (unsigned i = NumElts; i != WidenNumElts; ++i)
2287 NewMask.push_back(-1);
2288 return DAG.getVectorShuffle(WidenVT, dl, InOp1, InOp2, &NewMask[0]);
2291 SDValue DAGTypeLegalizer::WidenVecRes_VSETCC(SDNode *N) {
2292 assert(N->getValueType(0).isVector() &&
2293 N->getOperand(0).getValueType().isVector() &&
2294 "Operands must be vectors");
2295 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(), N->getValueType(0));
2296 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2298 SDValue InOp1 = N->getOperand(0);
2299 EVT InVT = InOp1.getValueType();
2300 assert(InVT.isVector() && "can not widen non-vector type");
2301 EVT WidenInVT = EVT::getVectorVT(*DAG.getContext(),
2302 InVT.getVectorElementType(), WidenNumElts);
2303 InOp1 = GetWidenedVector(InOp1);
2304 SDValue InOp2 = GetWidenedVector(N->getOperand(1));
2306 // Assume that the input and output will be widen appropriately. If not,
2307 // we will have to unroll it at some point.
2308 assert(InOp1.getValueType() == WidenInVT &&
2309 InOp2.getValueType() == WidenInVT &&
2310 "Input not widened to expected type!");
2312 return DAG.getNode(ISD::SETCC, SDLoc(N),
2313 WidenVT, InOp1, InOp2, N->getOperand(2));
2317 //===----------------------------------------------------------------------===//
2318 // Widen Vector Operand
2319 //===----------------------------------------------------------------------===//
2320 bool DAGTypeLegalizer::WidenVectorOperand(SDNode *N, unsigned OpNo) {
2321 DEBUG(dbgs() << "Widen node operand " << OpNo << ": ";
2324 SDValue Res = SDValue();
2326 // See if the target wants to custom widen this node.
2327 if (CustomLowerNode(N, N->getOperand(OpNo).getValueType(), false))
2330 switch (N->getOpcode()) {
2333 dbgs() << "WidenVectorOperand op #" << OpNo << ": ";
2337 llvm_unreachable("Do not know how to widen this operator's operand!");
2339 case ISD::BITCAST: Res = WidenVecOp_BITCAST(N); break;
2340 case ISD::CONCAT_VECTORS: Res = WidenVecOp_CONCAT_VECTORS(N); break;
2341 case ISD::EXTRACT_SUBVECTOR: Res = WidenVecOp_EXTRACT_SUBVECTOR(N); break;
2342 case ISD::EXTRACT_VECTOR_ELT: Res = WidenVecOp_EXTRACT_VECTOR_ELT(N); break;
2343 case ISD::STORE: Res = WidenVecOp_STORE(N); break;
2344 case ISD::SETCC: Res = WidenVecOp_SETCC(N); break;
2346 case ISD::FP_EXTEND:
2347 case ISD::FP_TO_SINT:
2348 case ISD::FP_TO_UINT:
2349 case ISD::SINT_TO_FP:
2350 case ISD::UINT_TO_FP:
2352 case ISD::SIGN_EXTEND:
2353 case ISD::ZERO_EXTEND:
2354 case ISD::ANY_EXTEND:
2355 Res = WidenVecOp_Convert(N);
2359 // If Res is null, the sub-method took care of registering the result.
2360 if (!Res.getNode()) return false;
2362 // If the result is N, the sub-method updated N in place. Tell the legalizer
2364 if (Res.getNode() == N)
2368 assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
2369 "Invalid operand expansion");
2371 ReplaceValueWith(SDValue(N, 0), Res);
2375 SDValue DAGTypeLegalizer::WidenVecOp_Convert(SDNode *N) {
2376 // Since the result is legal and the input is illegal, it is unlikely
2377 // that we can fix the input to a legal type so unroll the convert
2378 // into some scalar code and create a nasty build vector.
2379 EVT VT = N->getValueType(0);
2380 EVT EltVT = VT.getVectorElementType();
2382 unsigned NumElts = VT.getVectorNumElements();
2383 SDValue InOp = N->getOperand(0);
2384 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2385 InOp = GetWidenedVector(InOp);
2386 EVT InVT = InOp.getValueType();
2387 EVT InEltVT = InVT.getVectorElementType();
2389 unsigned Opcode = N->getOpcode();
2390 SmallVector<SDValue, 16> Ops(NumElts);
2391 for (unsigned i=0; i < NumElts; ++i)
2392 Ops[i] = DAG.getNode(Opcode, dl, EltVT,
2393 DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, InEltVT, InOp,
2394 DAG.getConstant(i, TLI.getVectorIdxTy())));
2396 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
2399 SDValue DAGTypeLegalizer::WidenVecOp_BITCAST(SDNode *N) {
2400 EVT VT = N->getValueType(0);
2401 SDValue InOp = GetWidenedVector(N->getOperand(0));
2402 EVT InWidenVT = InOp.getValueType();
2405 // Check if we can convert between two legal vector types and extract.
2406 unsigned InWidenSize = InWidenVT.getSizeInBits();
2407 unsigned Size = VT.getSizeInBits();
2408 // x86mmx is not an acceptable vector element type, so don't try.
2409 if (InWidenSize % Size == 0 && !VT.isVector() && VT != MVT::x86mmx) {
2410 unsigned NewNumElts = InWidenSize / Size;
2411 EVT NewVT = EVT::getVectorVT(*DAG.getContext(), VT, NewNumElts);
2412 if (TLI.isTypeLegal(NewVT)) {
2413 SDValue BitOp = DAG.getNode(ISD::BITCAST, dl, NewVT, InOp);
2414 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, VT, BitOp,
2415 DAG.getConstant(0, TLI.getVectorIdxTy()));
2419 return CreateStackStoreLoad(InOp, VT);
2422 SDValue DAGTypeLegalizer::WidenVecOp_CONCAT_VECTORS(SDNode *N) {
2423 // If the input vector is not legal, it is likely that we will not find a
2424 // legal vector of the same size. Replace the concatenate vector with a
2425 // nasty build vector.
2426 EVT VT = N->getValueType(0);
2427 EVT EltVT = VT.getVectorElementType();
2429 unsigned NumElts = VT.getVectorNumElements();
2430 SmallVector<SDValue, 16> Ops(NumElts);
2432 EVT InVT = N->getOperand(0).getValueType();
2433 unsigned NumInElts = InVT.getVectorNumElements();
2436 unsigned NumOperands = N->getNumOperands();
2437 for (unsigned i=0; i < NumOperands; ++i) {
2438 SDValue InOp = N->getOperand(i);
2439 if (getTypeAction(InOp.getValueType()) == TargetLowering::TypeWidenVector)
2440 InOp = GetWidenedVector(InOp);
2441 for (unsigned j=0; j < NumInElts; ++j)
2442 Ops[Idx++] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2443 DAG.getConstant(j, TLI.getVectorIdxTy()));
2445 return DAG.getNode(ISD::BUILD_VECTOR, dl, VT, Ops);
2448 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_SUBVECTOR(SDNode *N) {
2449 SDValue InOp = GetWidenedVector(N->getOperand(0));
2450 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, SDLoc(N),
2451 N->getValueType(0), InOp, N->getOperand(1));
2454 SDValue DAGTypeLegalizer::WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N) {
2455 SDValue InOp = GetWidenedVector(N->getOperand(0));
2456 return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, SDLoc(N),
2457 N->getValueType(0), InOp, N->getOperand(1));
2460 SDValue DAGTypeLegalizer::WidenVecOp_STORE(SDNode *N) {
2461 // We have to widen the value but we want only to store the original
2463 StoreSDNode *ST = cast<StoreSDNode>(N);
2465 SmallVector<SDValue, 16> StChain;
2466 if (ST->isTruncatingStore())
2467 GenWidenVectorTruncStores(StChain, ST);
2469 GenWidenVectorStores(StChain, ST);
2471 if (StChain.size() == 1)
2474 return DAG.getNode(ISD::TokenFactor, SDLoc(ST), MVT::Other, StChain);
2477 SDValue DAGTypeLegalizer::WidenVecOp_SETCC(SDNode *N) {
2478 SDValue InOp0 = GetWidenedVector(N->getOperand(0));
2479 SDValue InOp1 = GetWidenedVector(N->getOperand(1));
2482 // WARNING: In this code we widen the compare instruction with garbage.
2483 // This garbage may contain denormal floats which may be slow. Is this a real
2484 // concern ? Should we zero the unused lanes if this is a float compare ?
2486 // Get a new SETCC node to compare the newly widened operands.
2487 // Only some of the compared elements are legal.
2488 EVT SVT = TLI.getSetCCResultType(*DAG.getContext(), InOp0.getValueType());
2489 SDValue WideSETCC = DAG.getNode(ISD::SETCC, SDLoc(N),
2490 SVT, InOp0, InOp1, N->getOperand(2));
2492 // Extract the needed results from the result vector.
2493 EVT ResVT = EVT::getVectorVT(*DAG.getContext(),
2494 SVT.getVectorElementType(),
2495 N->getValueType(0).getVectorNumElements());
2496 SDValue CC = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl,
2497 ResVT, WideSETCC, DAG.getConstant(0,
2498 TLI.getVectorIdxTy()));
2500 return PromoteTargetBoolean(CC, N->getValueType(0));
2504 //===----------------------------------------------------------------------===//
2505 // Vector Widening Utilities
2506 //===----------------------------------------------------------------------===//
2508 // Utility function to find the type to chop up a widen vector for load/store
2509 // TLI: Target lowering used to determine legal types.
2510 // Width: Width left need to load/store.
2511 // WidenVT: The widen vector type to load to/store from
2512 // Align: If 0, don't allow use of a wider type
2513 // WidenEx: If Align is not 0, the amount additional we can load/store from.
2515 static EVT FindMemType(SelectionDAG& DAG, const TargetLowering &TLI,
2516 unsigned Width, EVT WidenVT,
2517 unsigned Align = 0, unsigned WidenEx = 0) {
2518 EVT WidenEltVT = WidenVT.getVectorElementType();
2519 unsigned WidenWidth = WidenVT.getSizeInBits();
2520 unsigned WidenEltWidth = WidenEltVT.getSizeInBits();
2521 unsigned AlignInBits = Align*8;
2523 // If we have one element to load/store, return it.
2524 EVT RetVT = WidenEltVT;
2525 if (Width == WidenEltWidth)
2528 // See if there is larger legal integer than the element type to load/store
2530 for (VT = (unsigned)MVT::LAST_INTEGER_VALUETYPE;
2531 VT >= (unsigned)MVT::FIRST_INTEGER_VALUETYPE; --VT) {
2532 EVT MemVT((MVT::SimpleValueType) VT);
2533 unsigned MemVTWidth = MemVT.getSizeInBits();
2534 if (MemVT.getSizeInBits() <= WidenEltWidth)
2536 if (TLI.isTypeLegal(MemVT) && (WidenWidth % MemVTWidth) == 0 &&
2537 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2538 (MemVTWidth <= Width ||
2539 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2545 // See if there is a larger vector type to load/store that has the same vector
2546 // element type and is evenly divisible with the WidenVT.
2547 for (VT = (unsigned)MVT::LAST_VECTOR_VALUETYPE;
2548 VT >= (unsigned)MVT::FIRST_VECTOR_VALUETYPE; --VT) {
2549 EVT MemVT = (MVT::SimpleValueType) VT;
2550 unsigned MemVTWidth = MemVT.getSizeInBits();
2551 if (TLI.isTypeLegal(MemVT) && WidenEltVT == MemVT.getVectorElementType() &&
2552 (WidenWidth % MemVTWidth) == 0 &&
2553 isPowerOf2_32(WidenWidth / MemVTWidth) &&
2554 (MemVTWidth <= Width ||
2555 (Align!=0 && MemVTWidth<=AlignInBits && MemVTWidth<=Width+WidenEx))) {
2556 if (RetVT.getSizeInBits() < MemVTWidth || MemVT == WidenVT)
2564 // Builds a vector type from scalar loads
2565 // VecTy: Resulting Vector type
2566 // LDOps: Load operators to build a vector type
2567 // [Start,End) the list of loads to use.
2568 static SDValue BuildVectorFromScalar(SelectionDAG& DAG, EVT VecTy,
2569 SmallVectorImpl<SDValue> &LdOps,
2570 unsigned Start, unsigned End) {
2571 const TargetLowering &TLI = DAG.getTargetLoweringInfo();
2572 SDLoc dl(LdOps[Start]);
2573 EVT LdTy = LdOps[Start].getValueType();
2574 unsigned Width = VecTy.getSizeInBits();
2575 unsigned NumElts = Width / LdTy.getSizeInBits();
2576 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), LdTy, NumElts);
2579 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT,LdOps[Start]);
2581 for (unsigned i = Start + 1; i != End; ++i) {
2582 EVT NewLdTy = LdOps[i].getValueType();
2583 if (NewLdTy != LdTy) {
2584 NumElts = Width / NewLdTy.getSizeInBits();
2585 NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewLdTy, NumElts);
2586 VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, VecOp);
2587 // Readjust position and vector position based on new load type
2588 Idx = Idx * LdTy.getSizeInBits() / NewLdTy.getSizeInBits();
2591 VecOp = DAG.getNode(ISD::INSERT_VECTOR_ELT, dl, NewVecVT, VecOp, LdOps[i],
2592 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2594 return DAG.getNode(ISD::BITCAST, dl, VecTy, VecOp);
2597 SDValue DAGTypeLegalizer::GenWidenVectorLoads(SmallVectorImpl<SDValue> &LdChain,
2599 // The strategy assumes that we can efficiently load powers of two widths.
2600 // The routines chops the vector into the largest vector loads with the same
2601 // element type or scalar loads and then recombines it to the widen vector
2603 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2604 unsigned WidenWidth = WidenVT.getSizeInBits();
2605 EVT LdVT = LD->getMemoryVT();
2607 assert(LdVT.isVector() && WidenVT.isVector());
2608 assert(LdVT.getVectorElementType() == WidenVT.getVectorElementType());
2611 SDValue Chain = LD->getChain();
2612 SDValue BasePtr = LD->getBasePtr();
2613 unsigned Align = LD->getAlignment();
2614 bool isVolatile = LD->isVolatile();
2615 bool isNonTemporal = LD->isNonTemporal();
2616 bool isInvariant = LD->isInvariant();
2617 const MDNode *TBAAInfo = LD->getTBAAInfo();
2619 int LdWidth = LdVT.getSizeInBits();
2620 int WidthDiff = WidenWidth - LdWidth; // Difference
2621 unsigned LdAlign = (isVolatile) ? 0 : Align; // Allow wider loads
2623 // Find the vector type that can load from.
2624 EVT NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2625 int NewVTWidth = NewVT.getSizeInBits();
2626 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(),
2627 isVolatile, isNonTemporal, isInvariant, Align,
2629 LdChain.push_back(LdOp.getValue(1));
2631 // Check if we can load the element with one instruction
2632 if (LdWidth <= NewVTWidth) {
2633 if (!NewVT.isVector()) {
2634 unsigned NumElts = WidenWidth / NewVTWidth;
2635 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2636 SDValue VecOp = DAG.getNode(ISD::SCALAR_TO_VECTOR, dl, NewVecVT, LdOp);
2637 return DAG.getNode(ISD::BITCAST, dl, WidenVT, VecOp);
2639 if (NewVT == WidenVT)
2642 assert(WidenWidth % NewVTWidth == 0);
2643 unsigned NumConcat = WidenWidth / NewVTWidth;
2644 SmallVector<SDValue, 16> ConcatOps(NumConcat);
2645 SDValue UndefVal = DAG.getUNDEF(NewVT);
2646 ConcatOps[0] = LdOp;
2647 for (unsigned i = 1; i != NumConcat; ++i)
2648 ConcatOps[i] = UndefVal;
2649 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, ConcatOps);
2652 // Load vector by using multiple loads from largest vector to scalar
2653 SmallVector<SDValue, 16> LdOps;
2654 LdOps.push_back(LdOp);
2656 LdWidth -= NewVTWidth;
2657 unsigned Offset = 0;
2659 while (LdWidth > 0) {
2660 unsigned Increment = NewVTWidth / 8;
2661 Offset += Increment;
2662 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2663 DAG.getConstant(Increment, BasePtr.getValueType()));
2666 if (LdWidth < NewVTWidth) {
2667 // Our current type we are using is too large, find a better size
2668 NewVT = FindMemType(DAG, TLI, LdWidth, WidenVT, LdAlign, WidthDiff);
2669 NewVTWidth = NewVT.getSizeInBits();
2670 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2671 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2672 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2674 LdChain.push_back(L.getValue(1));
2675 if (L->getValueType(0).isVector()) {
2676 SmallVector<SDValue, 16> Loads;
2678 unsigned size = L->getValueSizeInBits(0);
2679 while (size < LdOp->getValueSizeInBits(0)) {
2680 Loads.push_back(DAG.getUNDEF(L->getValueType(0)));
2681 size += L->getValueSizeInBits(0);
2683 L = DAG.getNode(ISD::CONCAT_VECTORS, dl, LdOp->getValueType(0), Loads);
2686 L = DAG.getLoad(NewVT, dl, Chain, BasePtr,
2687 LD->getPointerInfo().getWithOffset(Offset), isVolatile,
2688 isNonTemporal, isInvariant, MinAlign(Align, Increment),
2690 LdChain.push_back(L.getValue(1));
2696 LdWidth -= NewVTWidth;
2699 // Build the vector from the loads operations
2700 unsigned End = LdOps.size();
2701 if (!LdOps[0].getValueType().isVector())
2702 // All the loads are scalar loads.
2703 return BuildVectorFromScalar(DAG, WidenVT, LdOps, 0, End);
2705 // If the load contains vectors, build the vector using concat vector.
2706 // All of the vectors used to loads are power of 2 and the scalars load
2707 // can be combined to make a power of 2 vector.
2708 SmallVector<SDValue, 16> ConcatOps(End);
2711 EVT LdTy = LdOps[i].getValueType();
2712 // First combine the scalar loads to a vector
2713 if (!LdTy.isVector()) {
2714 for (--i; i >= 0; --i) {
2715 LdTy = LdOps[i].getValueType();
2716 if (LdTy.isVector())
2719 ConcatOps[--Idx] = BuildVectorFromScalar(DAG, LdTy, LdOps, i+1, End);
2721 ConcatOps[--Idx] = LdOps[i];
2722 for (--i; i >= 0; --i) {
2723 EVT NewLdTy = LdOps[i].getValueType();
2724 if (NewLdTy != LdTy) {
2725 // Create a larger vector
2726 ConcatOps[End-1] = DAG.getNode(ISD::CONCAT_VECTORS, dl, NewLdTy,
2727 ArrayRef<SDValue>(&ConcatOps[Idx],
2732 ConcatOps[--Idx] = LdOps[i];
2735 if (WidenWidth == LdTy.getSizeInBits()*(End - Idx))
2736 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT,
2737 ArrayRef<SDValue>(&ConcatOps[Idx], End - Idx));
2739 // We need to fill the rest with undefs to build the vector
2740 unsigned NumOps = WidenWidth / LdTy.getSizeInBits();
2741 SmallVector<SDValue, 16> WidenOps(NumOps);
2742 SDValue UndefVal = DAG.getUNDEF(LdTy);
2745 for (; i != End-Idx; ++i)
2746 WidenOps[i] = ConcatOps[Idx+i];
2747 for (; i != NumOps; ++i)
2748 WidenOps[i] = UndefVal;
2750 return DAG.getNode(ISD::CONCAT_VECTORS, dl, WidenVT, WidenOps);
2754 DAGTypeLegalizer::GenWidenVectorExtLoads(SmallVectorImpl<SDValue> &LdChain,
2756 ISD::LoadExtType ExtType) {
2757 // For extension loads, it may not be more efficient to chop up the vector
2758 // and then extended it. Instead, we unroll the load and build a new vector.
2759 EVT WidenVT = TLI.getTypeToTransformTo(*DAG.getContext(),LD->getValueType(0));
2760 EVT LdVT = LD->getMemoryVT();
2762 assert(LdVT.isVector() && WidenVT.isVector());
2765 SDValue Chain = LD->getChain();
2766 SDValue BasePtr = LD->getBasePtr();
2767 unsigned Align = LD->getAlignment();
2768 bool isVolatile = LD->isVolatile();
2769 bool isNonTemporal = LD->isNonTemporal();
2770 const MDNode *TBAAInfo = LD->getTBAAInfo();
2772 EVT EltVT = WidenVT.getVectorElementType();
2773 EVT LdEltVT = LdVT.getVectorElementType();
2774 unsigned NumElts = LdVT.getVectorNumElements();
2776 // Load each element and widen
2777 unsigned WidenNumElts = WidenVT.getVectorNumElements();
2778 SmallVector<SDValue, 16> Ops(WidenNumElts);
2779 unsigned Increment = LdEltVT.getSizeInBits() / 8;
2780 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr,
2781 LD->getPointerInfo(),
2782 LdEltVT, isVolatile, isNonTemporal, Align, TBAAInfo);
2783 LdChain.push_back(Ops[0].getValue(1));
2784 unsigned i = 0, Offset = Increment;
2785 for (i=1; i < NumElts; ++i, Offset += Increment) {
2786 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2788 DAG.getConstant(Offset,
2789 BasePtr.getValueType()));
2790 Ops[i] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, NewBasePtr,
2791 LD->getPointerInfo().getWithOffset(Offset), LdEltVT,
2792 isVolatile, isNonTemporal, Align, TBAAInfo);
2793 LdChain.push_back(Ops[i].getValue(1));
2796 // Fill the rest with undefs
2797 SDValue UndefVal = DAG.getUNDEF(EltVT);
2798 for (; i != WidenNumElts; ++i)
2801 return DAG.getNode(ISD::BUILD_VECTOR, dl, WidenVT, Ops);
2805 void DAGTypeLegalizer::GenWidenVectorStores(SmallVectorImpl<SDValue> &StChain,
2807 // The strategy assumes that we can efficiently store powers of two widths.
2808 // The routines chops the vector into the largest vector stores with the same
2809 // element type or scalar stores.
2810 SDValue Chain = ST->getChain();
2811 SDValue BasePtr = ST->getBasePtr();
2812 unsigned Align = ST->getAlignment();
2813 bool isVolatile = ST->isVolatile();
2814 bool isNonTemporal = ST->isNonTemporal();
2815 const MDNode *TBAAInfo = ST->getTBAAInfo();
2816 SDValue ValOp = GetWidenedVector(ST->getValue());
2819 EVT StVT = ST->getMemoryVT();
2820 unsigned StWidth = StVT.getSizeInBits();
2821 EVT ValVT = ValOp.getValueType();
2822 unsigned ValWidth = ValVT.getSizeInBits();
2823 EVT ValEltVT = ValVT.getVectorElementType();
2824 unsigned ValEltWidth = ValEltVT.getSizeInBits();
2825 assert(StVT.getVectorElementType() == ValEltVT);
2827 int Idx = 0; // current index to store
2828 unsigned Offset = 0; // offset from base to store
2829 while (StWidth != 0) {
2830 // Find the largest vector type we can store with
2831 EVT NewVT = FindMemType(DAG, TLI, StWidth, ValVT);
2832 unsigned NewVTWidth = NewVT.getSizeInBits();
2833 unsigned Increment = NewVTWidth / 8;
2834 if (NewVT.isVector()) {
2835 unsigned NumVTElts = NewVT.getVectorNumElements();
2837 SDValue EOp = DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NewVT, ValOp,
2838 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2839 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2840 ST->getPointerInfo().getWithOffset(Offset),
2841 isVolatile, isNonTemporal,
2842 MinAlign(Align, Offset), TBAAInfo));
2843 StWidth -= NewVTWidth;
2844 Offset += Increment;
2846 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2847 DAG.getConstant(Increment, BasePtr.getValueType()));
2848 } while (StWidth != 0 && StWidth >= NewVTWidth);
2850 // Cast the vector to the scalar type we can store
2851 unsigned NumElts = ValWidth / NewVTWidth;
2852 EVT NewVecVT = EVT::getVectorVT(*DAG.getContext(), NewVT, NumElts);
2853 SDValue VecOp = DAG.getNode(ISD::BITCAST, dl, NewVecVT, ValOp);
2854 // Readjust index position based on new vector type
2855 Idx = Idx * ValEltWidth / NewVTWidth;
2857 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, NewVT, VecOp,
2858 DAG.getConstant(Idx++, TLI.getVectorIdxTy()));
2859 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr,
2860 ST->getPointerInfo().getWithOffset(Offset),
2861 isVolatile, isNonTemporal,
2862 MinAlign(Align, Offset), TBAAInfo));
2863 StWidth -= NewVTWidth;
2864 Offset += Increment;
2865 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr,
2866 DAG.getConstant(Increment, BasePtr.getValueType()));
2867 } while (StWidth != 0 && StWidth >= NewVTWidth);
2868 // Restore index back to be relative to the original widen element type
2869 Idx = Idx * NewVTWidth / ValEltWidth;
2875 DAGTypeLegalizer::GenWidenVectorTruncStores(SmallVectorImpl<SDValue> &StChain,
2877 // For extension loads, it may not be more efficient to truncate the vector
2878 // and then store it. Instead, we extract each element and then store it.
2879 SDValue Chain = ST->getChain();
2880 SDValue BasePtr = ST->getBasePtr();
2881 unsigned Align = ST->getAlignment();
2882 bool isVolatile = ST->isVolatile();
2883 bool isNonTemporal = ST->isNonTemporal();
2884 const MDNode *TBAAInfo = ST->getTBAAInfo();
2885 SDValue ValOp = GetWidenedVector(ST->getValue());
2888 EVT StVT = ST->getMemoryVT();
2889 EVT ValVT = ValOp.getValueType();
2891 // It must be true that we the widen vector type is bigger than where
2892 // we need to store.
2893 assert(StVT.isVector() && ValOp.getValueType().isVector());
2894 assert(StVT.bitsLT(ValOp.getValueType()));
2896 // For truncating stores, we can not play the tricks of chopping legal
2897 // vector types and bit cast it to the right type. Instead, we unroll
2899 EVT StEltVT = StVT.getVectorElementType();
2900 EVT ValEltVT = ValVT.getVectorElementType();
2901 unsigned Increment = ValEltVT.getSizeInBits() / 8;
2902 unsigned NumElts = StVT.getVectorNumElements();
2903 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2904 DAG.getConstant(0, TLI.getVectorIdxTy()));
2905 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, BasePtr,
2906 ST->getPointerInfo(), StEltVT,
2907 isVolatile, isNonTemporal, Align,
2909 unsigned Offset = Increment;
2910 for (unsigned i=1; i < NumElts; ++i, Offset += Increment) {
2911 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(),
2912 BasePtr, DAG.getConstant(Offset,
2913 BasePtr.getValueType()));
2914 SDValue EOp = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, ValEltVT, ValOp,
2915 DAG.getConstant(0, TLI.getVectorIdxTy()));
2916 StChain.push_back(DAG.getTruncStore(Chain, dl, EOp, NewBasePtr,
2917 ST->getPointerInfo().getWithOffset(Offset),
2918 StEltVT, isVolatile, isNonTemporal,
2919 MinAlign(Align, Offset), TBAAInfo));
2923 /// Modifies a vector input (widen or narrows) to a vector of NVT. The
2924 /// input vector must have the same element type as NVT.
2925 SDValue DAGTypeLegalizer::ModifyToType(SDValue InOp, EVT NVT) {
2926 // Note that InOp might have been widened so it might already have
2927 // the right width or it might need be narrowed.
2928 EVT InVT = InOp.getValueType();
2929 assert(InVT.getVectorElementType() == NVT.getVectorElementType() &&
2930 "input and widen element type must match");
2933 // Check if InOp already has the right width.
2937 unsigned InNumElts = InVT.getVectorNumElements();
2938 unsigned WidenNumElts = NVT.getVectorNumElements();
2939 if (WidenNumElts > InNumElts && WidenNumElts % InNumElts == 0) {
2940 unsigned NumConcat = WidenNumElts / InNumElts;
2941 SmallVector<SDValue, 16> Ops(NumConcat);
2942 SDValue UndefVal = DAG.getUNDEF(InVT);
2944 for (unsigned i = 1; i != NumConcat; ++i)
2947 return DAG.getNode(ISD::CONCAT_VECTORS, dl, NVT, Ops);
2950 if (WidenNumElts < InNumElts && InNumElts % WidenNumElts)
2951 return DAG.getNode(ISD::EXTRACT_SUBVECTOR, dl, NVT, InOp,
2952 DAG.getConstant(0, TLI.getVectorIdxTy()));
2954 // Fall back to extract and build.
2955 SmallVector<SDValue, 16> Ops(WidenNumElts);
2956 EVT EltVT = NVT.getVectorElementType();
2957 unsigned MinNumElts = std::min(WidenNumElts, InNumElts);
2959 for (Idx = 0; Idx < MinNumElts; ++Idx)
2960 Ops[Idx] = DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, EltVT, InOp,
2961 DAG.getConstant(Idx, TLI.getVectorIdxTy()));
2963 SDValue UndefVal = DAG.getUNDEF(EltVT);
2964 for ( ; Idx < WidenNumElts; ++Idx)
2965 Ops[Idx] = UndefVal;
2966 return DAG.getNode(ISD::BUILD_VECTOR, dl, NVT, Ops);