1 //===-- llvm/CodeGen/MachineInstr.h - MachineInstr class --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the declaration of the MachineInstr class, which is the
11 // basic representation for all target dependent machine instructions used by
14 //===----------------------------------------------------------------------===//
16 #ifndef LLVM_CODEGEN_MACHINEINSTR_H
17 #define LLVM_CODEGEN_MACHINEINSTR_H
19 #include "llvm/ADT/iterator"
28 class MachineBasicBlock;
32 template <typename T> class ilist_traits;
33 template <typename T> class ilist;
35 typedef short MachineOpCode;
37 //===----------------------------------------------------------------------===//
38 // class MachineOperand
41 // Representation of each machine instruction operand.
42 // This class is designed so that you can allocate a vector of operands
43 // first and initialize each one later.
45 // E.g, for this VM instruction:
46 // ptr = alloca type, numElements
47 // we generate 2 machine instructions on the SPARC:
49 // mul Constant, Numelements -> Reg
50 // add %sp, Reg -> Ptr
52 // Each instruction has 3 operands, listed above. Of those:
53 // - Reg, NumElements, and Ptr are of operand type MO_Register.
54 // - Constant is of operand type MO_SignExtendedImmed on the SPARC.
56 // For the register operands, the virtual register type is as follows:
58 // - Reg will be of virtual register type MO_MInstrVirtualReg. The field
59 // MachineInstr* minstr will point to the instruction that computes reg.
61 // - %sp will be of virtual register type MO_MachineReg.
62 // The field regNum identifies the machine register.
64 // - NumElements will be of virtual register type MO_VirtualReg.
65 // The field Value* value identifies the value.
67 // - Ptr will also be of virtual register type MO_VirtualReg.
68 // Again, the field Value* value identifies the value.
70 //===----------------------------------------------------------------------===//
72 struct MachineOperand {
74 // Bit fields of the flags variable used for different operand properties
76 DEFFLAG = 0x01, // this is a def of the operand
77 USEFLAG = 0x02, // this is a use of the operand
78 HIFLAG32 = 0x04, // operand is %hi32(value_or_immedVal)
79 LOFLAG32 = 0x08, // operand is %lo32(value_or_immedVal)
80 HIFLAG64 = 0x10, // operand is %hi64(value_or_immedVal)
81 LOFLAG64 = 0x20, // operand is %lo64(value_or_immedVal)
82 PCRELATIVE = 0x40, // Operand is relative to PC, not a global address
86 // UseType - This enum describes how the machine operand is used by
87 // the instruction. Note that the MachineInstr/Operator class
88 // currently uses bool arguments to represent this information
89 // instead of an enum. Eventually this should change over to use
90 // this _easier to read_ representation instead.
93 Use = USEFLAG, /// only read
94 Def = DEFFLAG, /// only written
95 UseAndDef = Use | Def /// read AND written
98 enum MachineOperandType {
99 MO_VirtualRegister, // virtual register for *value
100 MO_MachineRegister, // pre-assigned machine register `regNum'
102 MO_SignExtendedImmed,
105 MO_MachineBasicBlock, // MachineBasicBlock reference
106 MO_FrameIndex, // Abstract Stack Frame Index
107 MO_ConstantPoolIndex, // Address of indexed Constant in Constant Pool
108 MO_ExternalSymbol, // Name of external global symbol
109 MO_GlobalAddress, // Address of a global value
114 Value* value; // BasicBlockVal for a label operand.
115 // ConstantVal for a non-address immediate.
116 // Virtual register for an SSA operand,
117 // including hidden operands required for
118 // the generated machine code.
119 // LLVM global for MO_GlobalAddress.
121 int immedVal; // Constant value for an explicit constant
123 MachineBasicBlock *MBB; // For MO_MachineBasicBlock type
124 std::string *SymbolName; // For MO_ExternalSymbol type
127 char flags; // see bit field definitions above
128 MachineOperandType opType:8; // Pack into 8 bits efficiently after flags.
129 int regNum; // register number for an explicit register
130 // will be set for a value after reg allocation
132 void zeroContents () {
133 memset (&contents, 0, sizeof (contents));
136 MachineOperand(int ImmVal = 0, MachineOperandType OpTy = MO_VirtualRegister)
137 : flags(0), opType(OpTy), regNum(-1) {
139 contents.immedVal = ImmVal;
142 MachineOperand(int Reg, MachineOperandType OpTy, UseType UseTy)
143 : flags(UseTy), opType(OpTy), regNum(Reg) {
147 MachineOperand(Value *V, MachineOperandType OpTy, UseType UseTy,
148 bool isPCRelative = false)
149 : flags(UseTy | (isPCRelative?PCRELATIVE:0)), opType(OpTy), regNum(-1) {
154 MachineOperand(MachineBasicBlock *mbb)
155 : flags(0), opType(MO_MachineBasicBlock), regNum(-1) {
160 MachineOperand(const std::string &SymName, bool isPCRelative)
161 : flags(isPCRelative?PCRELATIVE:0), opType(MO_ExternalSymbol), regNum(-1) {
163 contents.SymbolName = new std::string (SymName);
167 MachineOperand(const MachineOperand &M)
168 : flags(M.flags), opType(M.opType), regNum(M.regNum) {
170 contents = M.contents;
171 if (isExternalSymbol())
172 contents.SymbolName = new std::string(M.getSymbolName());
177 if (isExternalSymbol())
178 delete contents.SymbolName;
181 const MachineOperand &operator=(const MachineOperand &MO) {
182 if (isExternalSymbol()) // if old operand had a symbol name,
183 delete contents.SymbolName; // release old memory
184 contents = MO.contents;
188 if (isExternalSymbol())
189 contents.SymbolName = new std::string(MO.getSymbolName());
193 /// getType - Returns the MachineOperandType for this operand.
195 MachineOperandType getType() const { return opType; }
197 /// getUseType - Returns the MachineOperandUseType of this operand.
199 UseType getUseType() const { return UseType(flags & (USEFLAG|DEFFLAG)); }
201 /// isPCRelative - This returns the value of the PCRELATIVE flag, which
202 /// indicates whether this operand should be emitted as a PC relative value
203 /// instead of a global address. This is used for operands of the forms:
204 /// MachineBasicBlock, GlobalAddress, ExternalSymbol
206 bool isPCRelative() const { return (flags & PCRELATIVE) != 0; }
208 /// isRegister - Return true if this operand is a register operand. The X86
209 /// backend currently can't decide whether to use MO_MR or MO_VR to represent
210 /// them, so we accept both.
212 /// Note: The sparc backend should not use this method.
214 bool isRegister() const {
215 return opType == MO_MachineRegister || opType == MO_VirtualRegister;
218 /// Accessors that tell you what kind of MachineOperand you're looking at.
220 bool isMachineBasicBlock() const { return opType == MO_MachineBasicBlock; }
221 bool isPCRelativeDisp() const { return opType == MO_PCRelativeDisp; }
222 bool isImmediate() const {
223 return opType == MO_SignExtendedImmed || opType == MO_UnextendedImmed;
225 bool isFrameIndex() const { return opType == MO_FrameIndex; }
226 bool isConstantPoolIndex() const { return opType == MO_ConstantPoolIndex; }
227 bool isGlobalAddress() const { return opType == MO_GlobalAddress; }
228 bool isExternalSymbol() const { return opType == MO_ExternalSymbol; }
230 /// getVRegValueOrNull - Get the Value* out of a MachineOperand if it
231 /// has one. This is deprecated and only used by the SPARC v9 backend.
233 Value* getVRegValueOrNull() const {
234 return (opType == MO_VirtualRegister || opType == MO_CCRegister ||
235 isPCRelativeDisp()) ? contents.value : NULL;
238 /// MachineOperand accessors that only work on certain types of
239 /// MachineOperand...
241 Value* getVRegValue() const {
242 assert ((opType == MO_VirtualRegister || opType == MO_CCRegister
243 || isPCRelativeDisp()) && "Wrong MachineOperand accessor");
244 return contents.value;
246 int getMachineRegNum() const {
247 assert(opType == MO_MachineRegister && "Wrong MachineOperand accessor");
250 int getImmedValue() const {
251 assert(isImmediate() && "Wrong MachineOperand accessor");
252 return contents.immedVal;
254 MachineBasicBlock *getMachineBasicBlock() const {
255 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
258 void setMachineBasicBlock(MachineBasicBlock *MBB) {
259 assert(isMachineBasicBlock() && "Wrong MachineOperand accessor");
262 int getFrameIndex() const {
263 assert(isFrameIndex() && "Wrong MachineOperand accessor");
264 return contents.immedVal;
266 unsigned getConstantPoolIndex() const {
267 assert(isConstantPoolIndex() && "Wrong MachineOperand accessor");
268 return contents.immedVal;
270 GlobalValue *getGlobal() const {
271 assert(isGlobalAddress() && "Wrong MachineOperand accessor");
272 return (GlobalValue*)contents.value;
274 const std::string &getSymbolName() const {
275 assert(isExternalSymbol() && "Wrong MachineOperand accessor");
276 return *contents.SymbolName;
279 /// MachineOperand methods for testing that work on any kind of
280 /// MachineOperand...
282 bool isUse () const { return flags & USEFLAG; }
283 MachineOperand& setUse () { flags |= USEFLAG; return *this; }
284 bool isDef () const { return flags & DEFFLAG; }
285 MachineOperand& setDef () { flags |= DEFFLAG; return *this; }
286 bool isHiBits32 () const { return flags & HIFLAG32; }
287 bool isLoBits32 () const { return flags & LOFLAG32; }
288 bool isHiBits64 () const { return flags & HIFLAG64; }
289 bool isLoBits64 () const { return flags & LOFLAG64; }
291 /// hasAllocatedReg - Returns true iff a machine register has been
292 /// allocated to this operand.
294 bool hasAllocatedReg() const {
295 return (regNum >= 0 &&
296 (opType == MO_VirtualRegister || opType == MO_CCRegister ||
297 opType == MO_MachineRegister));
300 /// getReg - Returns the register number. It is a runtime error to call this
301 /// if a register is not allocated.
303 unsigned getReg() const {
304 assert(hasAllocatedReg());
308 /// MachineOperand mutators...
310 void setReg(unsigned Reg) {
311 // This method's comment used to say: 'TODO: get rid of this duplicate
312 // code.' It's not clear where the duplication is.
313 assert(hasAllocatedReg() && "This operand cannot have a register number!");
317 void setValueReg(Value *val) {
318 assert(getVRegValueOrNull() != 0 && "Original operand must of type Value*");
319 contents.value = val;
322 void setImmedValue(int immVal) {
323 assert(isImmediate() && "Wrong MachineOperand mutator");
324 contents.immedVal = immVal;
327 friend std::ostream& operator<<(std::ostream& os, const MachineOperand& mop);
329 /// markHi32, markLo32, etc. - These methods are deprecated and only used by
330 /// the SPARC v9 back-end.
332 void markHi32() { flags |= HIFLAG32; }
333 void markLo32() { flags |= LOFLAG32; }
334 void markHi64() { flags |= HIFLAG64; }
335 void markLo64() { flags |= LOFLAG64; }
338 /// setRegForValue - Replaces the Value with its corresponding physical
339 /// register after register allocation is complete. This is deprecated
340 /// and only used by the SPARC v9 back-end.
342 void setRegForValue(int reg) {
343 assert(opType == MO_VirtualRegister || opType == MO_CCRegister ||
344 opType == MO_MachineRegister);
348 friend class MachineInstr;
352 //===----------------------------------------------------------------------===//
353 // class MachineInstr
356 // Representation of each machine instruction.
358 // MachineOpCode must be an enum, defined separately for each target.
359 // E.g., It is defined in SparcInstructionSelection.h for the SPARC.
361 // There are 2 kinds of operands:
363 // (1) Explicit operands of the machine instruction in vector operands[]
365 // (2) "Implicit operands" are values implicitly used or defined by the
366 // machine instruction, such as arguments to a CALL, return value of
367 // a CALL (if any), and return value of a RETURN.
368 //===----------------------------------------------------------------------===//
371 short Opcode; // the opcode
372 unsigned char numImplicitRefs; // number of implicit operands
373 std::vector<MachineOperand> operands; // the operands
374 MachineInstr* prev, *next; // links for our intrusive list
375 MachineBasicBlock* parent; // pointer to the owning basic block
377 // OperandComplete - Return true if it's illegal to add a new operand
378 bool OperandsComplete() const;
380 //Constructor used by clone() method
381 MachineInstr(const MachineInstr&);
383 void operator=(const MachineInstr&); // DO NOT IMPLEMENT
385 // Intrusive list support
387 friend class ilist_traits<MachineInstr>;
390 MachineInstr(short Opcode, unsigned numOperands);
392 /// MachineInstr ctor - This constructor only does a _reserve_ of the
393 /// operands, not a resize for them. It is expected that if you use this that
394 /// you call add* methods below to fill up the operands, instead of the Set
395 /// methods. Eventually, the "resizing" ctors will be phased out.
397 MachineInstr(short Opcode, unsigned numOperands, bool XX, bool YY);
399 /// MachineInstr ctor - Work exactly the same as the ctor above, except that
400 /// the MachineInstr is created and added to the end of the specified basic
403 MachineInstr(MachineBasicBlock *MBB, short Opcode, unsigned numOps);
407 const MachineBasicBlock* getParent() const { return parent; }
408 MachineBasicBlock* getParent() { return parent; }
410 /// getOpcode - Returns the opcode of this MachineInstr.
412 const int getOpcode() const { return Opcode; }
414 /// Access to explicit operands of the instruction.
416 unsigned getNumOperands() const { return operands.size() - numImplicitRefs; }
418 const MachineOperand& getOperand(unsigned i) const {
419 assert(i < getNumOperands() && "getOperand() out of range!");
422 MachineOperand& getOperand(unsigned i) {
423 assert(i < getNumOperands() && "getOperand() out of range!");
428 // Access to explicit or implicit operands of the instruction
429 // This returns the i'th entry in the operand vector.
430 // That represents the i'th explicit operand or the (i-N)'th implicit operand,
431 // depending on whether i < N or i >= N.
433 const MachineOperand& getExplOrImplOperand(unsigned i) const {
434 assert(i < operands.size() && "getExplOrImplOperand() out of range!");
435 return (i < getNumOperands()? getOperand(i)
436 : getImplicitOp(i - getNumOperands()));
440 // Access to implicit operands of the instruction
442 unsigned getNumImplicitRefs() const{ return numImplicitRefs; }
444 MachineOperand& getImplicitOp(unsigned i) {
445 assert(i < numImplicitRefs && "implicit ref# out of range!");
446 return operands[i + operands.size() - numImplicitRefs];
448 const MachineOperand& getImplicitOp(unsigned i) const {
449 assert(i < numImplicitRefs && "implicit ref# out of range!");
450 return operands[i + operands.size() - numImplicitRefs];
453 Value* getImplicitRef(unsigned i) {
454 return getImplicitOp(i).getVRegValue();
456 const Value* getImplicitRef(unsigned i) const {
457 return getImplicitOp(i).getVRegValue();
460 void addImplicitRef(Value* V, bool isDef = false, bool isDefAndUse = false) {
462 addRegOperand(V, isDef, isDefAndUse);
464 void setImplicitRef(unsigned i, Value* V) {
465 assert(i < getNumImplicitRefs() && "setImplicitRef() out of range!");
466 SetMachineOperandVal(i + getNumOperands(),
467 MachineOperand::MO_VirtualRegister, V);
470 /// clone - Create a copy of 'this' instruction that is identical in
471 /// all ways except the the instruction has no parent, prev, or next.
472 MachineInstr* clone() const;
477 void print(std::ostream &OS, const TargetMachine *TM) const;
479 friend std::ostream& operator<<(std::ostream& os, const MachineInstr& minstr);
482 // Define iterators to access the Value operands of the Machine Instruction.
483 // Note that these iterators only enumerate the explicit operands.
484 // begin() and end() are defined to produce these iterators...
486 template<class _MI, class _V> class ValOpIterator;
487 typedef ValOpIterator<const MachineInstr*,const Value*> const_val_op_iterator;
488 typedef ValOpIterator< MachineInstr*, Value*> val_op_iterator;
491 //===--------------------------------------------------------------------===//
492 // Accessors to add operands when building up machine instructions
495 /// addRegOperand - Add a MO_VirtualRegister operand to the end of the
498 void addRegOperand(Value *V, bool isDef, bool isDefAndUse=false) {
499 assert(!OperandsComplete() &&
500 "Trying to add an operand to a machine instr that is already done!");
502 MachineOperand(V, MachineOperand::MO_VirtualRegister,
503 !isDef ? MachineOperand::Use :
504 (isDefAndUse ? MachineOperand::UseAndDef :
505 MachineOperand::Def)));
508 void addRegOperand(Value *V,
509 MachineOperand::UseType UTy = MachineOperand::Use,
510 bool isPCRelative = false) {
511 assert(!OperandsComplete() &&
512 "Trying to add an operand to a machine instr that is already done!");
513 operands.push_back(MachineOperand(V, MachineOperand::MO_VirtualRegister,
517 void addCCRegOperand(Value *V,
518 MachineOperand::UseType UTy = MachineOperand::Use) {
519 assert(!OperandsComplete() &&
520 "Trying to add an operand to a machine instr that is already done!");
521 operands.push_back(MachineOperand(V, MachineOperand::MO_CCRegister, UTy,
526 /// addRegOperand - Add a symbolic virtual register reference...
528 void addRegOperand(int reg, bool isDef) {
529 assert(!OperandsComplete() &&
530 "Trying to add an operand to a machine instr that is already done!");
532 MachineOperand(reg, MachineOperand::MO_VirtualRegister,
533 isDef ? MachineOperand::Def : MachineOperand::Use));
536 /// addRegOperand - Add a symbolic virtual register reference...
538 void addRegOperand(int reg,
539 MachineOperand::UseType UTy = MachineOperand::Use) {
540 assert(!OperandsComplete() &&
541 "Trying to add an operand to a machine instr that is already done!");
543 MachineOperand(reg, MachineOperand::MO_VirtualRegister, UTy));
546 /// addPCDispOperand - Add a PC relative displacement operand to the MI
548 void addPCDispOperand(Value *V) {
549 assert(!OperandsComplete() &&
550 "Trying to add an operand to a machine instr that is already done!");
552 MachineOperand(V, MachineOperand::MO_PCRelativeDisp,MachineOperand::Use));
555 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
557 void addMachineRegOperand(int reg, bool isDef) {
558 assert(!OperandsComplete() &&
559 "Trying to add an operand to a machine instr that is already done!");
561 MachineOperand(reg, MachineOperand::MO_MachineRegister,
562 isDef ? MachineOperand::Def : MachineOperand::Use));
565 /// addMachineRegOperand - Add a virtual register operand to this MachineInstr
567 void addMachineRegOperand(int reg,
568 MachineOperand::UseType UTy = MachineOperand::Use) {
569 assert(!OperandsComplete() &&
570 "Trying to add an operand to a machine instr that is already done!");
572 MachineOperand(reg, MachineOperand::MO_MachineRegister, UTy));
575 /// addZeroExtImmOperand - Add a zero extended constant argument to the
576 /// machine instruction.
578 void addZeroExtImmOperand(int intValue) {
579 assert(!OperandsComplete() &&
580 "Trying to add an operand to a machine instr that is already done!");
582 MachineOperand(intValue, MachineOperand::MO_UnextendedImmed));
585 /// addSignExtImmOperand - Add a zero extended constant argument to the
586 /// machine instruction.
588 void addSignExtImmOperand(int intValue) {
589 assert(!OperandsComplete() &&
590 "Trying to add an operand to a machine instr that is already done!");
592 MachineOperand(intValue, MachineOperand::MO_SignExtendedImmed));
595 void addMachineBasicBlockOperand(MachineBasicBlock *MBB) {
596 assert(!OperandsComplete() &&
597 "Trying to add an operand to a machine instr that is already done!");
598 operands.push_back(MachineOperand(MBB));
601 /// addFrameIndexOperand - Add an abstract frame index to the instruction
603 void addFrameIndexOperand(unsigned Idx) {
604 assert(!OperandsComplete() &&
605 "Trying to add an operand to a machine instr that is already done!");
606 operands.push_back(MachineOperand(Idx, MachineOperand::MO_FrameIndex));
609 /// addConstantPoolndexOperand - Add a constant pool object index to the
612 void addConstantPoolIndexOperand(unsigned I) {
613 assert(!OperandsComplete() &&
614 "Trying to add an operand to a machine instr that is already done!");
615 operands.push_back(MachineOperand(I, MachineOperand::MO_ConstantPoolIndex));
618 void addGlobalAddressOperand(GlobalValue *GV, bool isPCRelative) {
619 assert(!OperandsComplete() &&
620 "Trying to add an operand to a machine instr that is already done!");
622 MachineOperand((Value*)GV, MachineOperand::MO_GlobalAddress,
623 MachineOperand::Use, isPCRelative));
626 /// addExternalSymbolOperand - Add an external symbol operand to this instr
628 void addExternalSymbolOperand(const std::string &SymName, bool isPCRelative) {
629 operands.push_back(MachineOperand(SymName, isPCRelative));
632 //===--------------------------------------------------------------------===//
633 // Accessors used to modify instructions in place.
635 // FIXME: Move this stuff to MachineOperand itself!
637 /// replace - Support to rewrite a machine instruction in place: for now,
638 /// simply replace() and then set new operands with Set.*Operand methods
641 void replace(short Opcode, unsigned numOperands);
643 /// setOpcode - Replace the opcode of the current instruction with a new one.
645 void setOpcode(unsigned Op) { Opcode = Op; }
647 /// RemoveOperand - Erase an operand from an instruction, leaving it with one
648 /// fewer operand than it started with.
650 void RemoveOperand(unsigned i) {
651 operands.erase(operands.begin()+i);
654 // Access to set the operands when building the machine instruction
656 void SetMachineOperandVal(unsigned i,
657 MachineOperand::MachineOperandType operandType,
660 void SetMachineOperandConst(unsigned i,
661 MachineOperand::MachineOperandType operandType,
664 void SetMachineOperandReg(unsigned i, int regNum);
667 unsigned substituteValue(const Value* oldVal, Value* newVal,
668 bool defsOnly, bool notDefsAndUses,
669 bool& someArgsWereIgnored);
671 // SetRegForOperand -
672 // SetRegForImplicitRef -
673 // Mark an explicit or implicit operand with its allocated physical register.
675 void SetRegForOperand(unsigned i, int regNum);
676 void SetRegForImplicitRef(unsigned i, int regNum);
679 // Iterator to enumerate machine operands.
681 template<class MITy, class VTy>
682 class ValOpIterator : public forward_iterator<VTy, ptrdiff_t> {
686 void skipToNextVal() {
687 while (i < MI->getNumOperands() &&
688 !( (MI->getOperand(i).getType() == MachineOperand::MO_VirtualRegister ||
689 MI->getOperand(i).getType() == MachineOperand::MO_CCRegister)
690 && MI->getOperand(i).getVRegValue() != 0))
694 inline ValOpIterator(MITy mi, unsigned I) : i(I), MI(mi) {
699 typedef ValOpIterator<MITy, VTy> _Self;
701 inline VTy operator*() const {
702 return MI->getOperand(i).getVRegValue();
705 const MachineOperand &getMachineOperand() const { return MI->getOperand(i);}
706 MachineOperand &getMachineOperand() { return MI->getOperand(i);}
708 inline VTy operator->() const { return operator*(); }
710 inline bool isUse() const { return MI->getOperand(i).isUse(); }
711 inline bool isDef() const { return MI->getOperand(i).isDef(); }
713 inline _Self& operator++() { i++; skipToNextVal(); return *this; }
714 inline _Self operator++(int) { _Self tmp = *this; ++*this; return tmp; }
716 inline bool operator==(const _Self &y) const {
719 inline bool operator!=(const _Self &y) const {
720 return !operator==(y);
723 static _Self begin(MITy MI) {
726 static _Self end(MITy MI) {
727 return _Self(MI, MI->getNumOperands());
731 // define begin() and end()
732 val_op_iterator begin() { return val_op_iterator::begin(this); }
733 val_op_iterator end() { return val_op_iterator::end(this); }
735 const_val_op_iterator begin() const {
736 return const_val_op_iterator::begin(this);
738 const_val_op_iterator end() const {
739 return const_val_op_iterator::end(this);
743 //===----------------------------------------------------------------------===//
746 std::ostream& operator<<(std::ostream &OS, const MachineInstr &MI);
747 std::ostream& operator<<(std::ostream &OS, const MachineOperand &MO);
748 void PrintMachineInstructions(const Function *F);
750 } // End llvm namespace