[urcu] Replaced RMW atomics with atomic load/store in URCU read-side lock/unlock.

[libcds.git] / cds / urcu / details / sh.h

diff --git a/cds/urcu/details/sh.h b/cds/urcu/details/sh.h
index c2300f351b9a013039774fc287ee7ccce5b2fd66..fd37602d603c9c78094eed7ffe925b5882183b74 100644 (file)
--- a/cds/urcu/details/sh.h
+++ b/cds/urcu/details/sh.h
@@ -1,7 +1,7 @@
 /*
     This file is a part of libcds - Concurrent Data Structures library
 
-    (C) Copyright Maxim Khizhinsky (libcds.dev@gmail.com) 2006-2016
+    (C) Copyright Maxim Khizhinsky (libcds.dev@gmail.com) 2006-2017
 
     Source code repo: http://github.com/khizmax/libcds/
     Download: http://sourceforge.net/projects/libcds/files/
@@ -69,16 +69,19 @@ namespace cds { namespace urcu { namespace details {
         assert( pRec != nullptr );
 
         uint32_t tmp = pRec->m_nAccessControl.load( atomics::memory_order_relaxed );
+        assert( ( tmp & rcu_class::c_nNestMask ) > 0 );
+
         if ( (tmp & rcu_class::c_nNestMask) == 0 ) {
-            pRec->m_nAccessControl.store(
-                sh_singleton<RCUtag>::instance()->global_control_word(atomics::memory_order_acquire),
-                atomics::memory_order_release
-            );
+            pRec->m_nAccessControl.store( sh_singleton<RCUtag>::instance()->global_control_word(atomics::memory_order_relaxed),
+                atomics::memory_order_relaxed );
+
+            // acquire barrier
+            pRec->m_nAccessControl.load( atomics::memory_order_acquire );
         }
         else {
-            pRec->m_nAccessControl.fetch_add( 1, atomics::memory_order_release );
+            // nested lock
+            pRec->m_nAccessControl.store( tmp + 1, atomics::memory_order_relaxed );
         }
-        CDS_COMPILER_RW_BARRIER;
     }
 
     template <typename RCUtag>
@@ -87,8 +90,10 @@ namespace cds { namespace urcu { namespace details {
         thread_record * pRec = get_thread_record();
         assert( pRec != nullptr);
 
-        CDS_COMPILER_RW_BARRIER;
-        pRec->m_nAccessControl.fetch_sub( 1, atomics::memory_order_release );
+        uint32_t tmp = pRec->m_nAccessControl.load( atomics::memory_order_relaxed );
+        assert( ( tmp & rcu_class::c_nNestMask ) > 0 );
+
+        pRec->m_nAccessControl.store( tmp - 1, atomics::memory_order_release );
     }
 
     template <typename RCUtag>
@@ -111,7 +116,6 @@ namespace cds { namespace urcu { namespace details {
         sigact.sa_sigaction = signal_handler;
         sigact.sa_flags = SA_SIGINFO;
         sigemptyset( &sigact.sa_mask );
-        //sigaddset( &sigact.sa_mask, m_nSigNo );
         sigaction( m_nSigNo, &sigact, nullptr );
 
         sigaddset( &sigact.sa_mask, m_nSigNo );
@@ -122,17 +126,6 @@ namespace cds { namespace urcu { namespace details {
     inline void sh_singleton<RCUtag>::clear_signal_handler()
     {}
 
-    template <typename RCUtag>
-    void sh_singleton<RCUtag>::signal_handler( int /*signo*/, siginfo_t * /*sigInfo*/, void * /*context*/ )
-    {
-        thread_record * pRec = cds::threading::getRCU<RCUtag>();
-        if ( pRec ) {
-            atomics::atomic_signal_fence( atomics::memory_order_acquire );
-            pRec->m_bNeedMemBar.store( false, atomics::memory_order_relaxed );
-            atomics::atomic_signal_fence( atomics::memory_order_release );
-        }
-    }
-
     template <typename RCUtag>
     inline void sh_singleton<RCUtag>::raise_signal( cds::OS::ThreadId tid )
     {