-//$$CDS-header$$
+/*
+ This file is a part of libcds - Concurrent Data Structures library
+
+ (C) Copyright Maxim Khizhinsky (libcds.dev@gmail.com) 2006-2016
+
+ Source code repo: http://github.com/khizmax/libcds/
+ Download: http://sourceforge.net/projects/libcds/files/
+
+ Redistribution and use in source and binary forms, with or without
+ modification, are permitted provided that the following conditions are met:
+
+ * Redistributions of source code must retain the above copyright notice, this
+ list of conditions and the following disclaimer.
+
+ * Redistributions in binary form must reproduce the above copyright notice,
+ this list of conditions and the following disclaimer in the documentation
+ and/or other materials provided with the distribution.
+
+ THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+*/
-#ifndef __CDS_COMPILER_GCC_IA64_CXX11_ATOMIC_H
-#define __CDS_COMPILER_GCC_IA64_CXX11_ATOMIC_H
+#ifndef CDSLIB_COMPILER_GCC_IA64_CXX11_ATOMIC_H
+#define CDSLIB_COMPILER_GCC_IA64_CXX11_ATOMIC_H
/*
Source:
#include <cstdint>
//@cond
-namespace cds { namespace cxx11_atomics {
+namespace cds { namespace cxx11_atomic {
namespace platform { CDS_CXX11_INLINE_NAMESPACE namespace gcc { CDS_CXX11_INLINE_NAMESPACE namespace ia64 {
static inline void itanium_full_fence() CDS_NOEXCEPT
|| order == memory_order_acquire \
|| order == memory_order_seq_cst \
) ; \
- assert( pSrc != NULL ) ; \
+ assert( pSrc ) ; \
T val ; \
__asm__ __volatile__ ( \
"ld" #n_bytes ".acq %[val] = [%[pSrc]] \n\t" \
|| order == memory_order_release \
|| order == memory_order_seq_cst \
) ; \
- assert( pDest != NULL ) ; \
+ assert( pDest ) ; \
if ( order == memory_order_seq_cst ) { \
__asm__ __volatile__ ( \
"st" #n_bytes ".rel [%[pDest]] = %[val] \n\t" \
static inline T exchange##n_bits( T volatile * pDest, T val, memory_order order ) CDS_NOEXCEPT \
{ \
static_assert( sizeof(T) == n_bytes, "Illegal size of operand" ) ; \
- assert( pDest != NULL ) ; \
+ assert( pDest ) ; \
T current ; \
switch(order) \
{ \
static inline T fetch32_add( T volatile * pDest, T val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T) == 4, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T cur;
switch ( val ) {
static inline T fetch32_sub( T volatile * pDest, T val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T) == 4, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T cur;
switch ( val ) {
case 1:
static inline T fetch64_add( T volatile * pDest, T val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T cur;
switch ( val ) {
static inline T fetch64_sub( T volatile * pDest, T val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T cur;
switch ( val ) {
case 1:
|| order == memory_order_acquire
|| order == memory_order_seq_cst
);
- assert( pSrc != NULL );
+ assert( pSrc );
T * val;
__asm__ __volatile__ (
"ld8.acq %[val] = [%[pSrc]] \n\t"
|| order == memory_order_release
|| order == memory_order_seq_cst
);
- assert( pDest != NULL );
+ assert( pDest );
if ( order == memory_order_seq_cst ) {
__asm__ __volatile__ (
static inline bool cas_ptr_strong( T * volatile * pDest, T *& expected, T * desired, memory_order mo_success, memory_order mo_fail ) CDS_NOEXCEPT
{
static_assert( sizeof(T *) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T * current;
static inline T * exchange_ptr( T * volatile * pDest, T * val, memory_order order ) CDS_NOEXCEPT
{
static_assert( sizeof(T *) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T * current;
switch(order) {
template <> struct atomic_pointer_sizeof<void> { enum { value = 1 }; };
// It does not work properly
- // atomic.fetch_add( ... ) returns NULL, why?..
+ // atomic.fetch_add( ... ) returns nullptr, why?..
//# define CDS_ATOMIC_fetch_ptr_add_defined
template <typename T>
static inline T * fetch_ptr_add( T * volatile * pDest, ptrdiff_t val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T *) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T * cur;
val *= atomic_pointer_sizeof<T>::value;
}
// It does not work properly
- // atomic.fetch_sub( ... ) returns NULL, why?..
+ // atomic.fetch_sub( ... ) returns nullptr, why?..
//# define CDS_ATOMIC_fetch_ptr_sub_defined
template <typename T>
static inline T * fetch_ptr_sub( T * volatile * pDest, ptrdiff_t val, memory_order order) CDS_NOEXCEPT
{
static_assert( sizeof(T *) == 8, "Illegal size of operand" );
- assert( pDest != NULL );
+ assert( pDest );
T * cur;
val *= atomic_pointer_sizeof<T>::value;
switch ( val ) {
using namespace gcc::ia64;
#endif
} // namespace platform
-}} // namespace cds::cxx11_atomics
+}} // namespace cds::cxx11_atomic
//@endcond
-#endif // #ifndef __CDS_COMPILER_GCC_IA64_CXX11_ATOMIC_H
+#endif // #ifndef CDSLIB_COMPILER_GCC_IA64_CXX11_ATOMIC_H
projects / libcds.git / blobdiff