From f9c9900af74fff78db90f2d5562dc59f3ab5d32b Mon Sep 17 00:00:00 2001
From: lintao <lintao@rock-chips.com>
Date: Mon, 11 Aug 2014 16:28:38 +0800
Subject: [PATCH] mmc: fix 312x pinctrl

---
 arch/arm/boot/dts/rk312x-pinctrl.dtsi | 22 +++++++++++++++++++++-
 arch/arm/boot/dts/rk312x.dtsi         |  2 +-
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/arch/arm/boot/dts/rk312x-pinctrl.dtsi b/arch/arm/boot/dts/rk312x-pinctrl.dtsi
index 61e0628b6661..377427ebddfb 100755
--- a/arch/arm/boot/dts/rk312x-pinctrl.dtsi
+++ b/arch/arm/boot/dts/rk312x-pinctrl.dtsi
@@ -666,10 +666,30 @@
 				
 
 			};
+			sdio0_clk: sdio0_clk {
+				rockchip,pins = <SDMMC_CLKOUT>;
+				rockchip,pull = <VALUE_PULL_UP>;
+			};
+			sdio0_bus1: sdio0-bus-width1 {
+				rockchip,pins = <SDMMC_DATA0>;
+				rockchip,pull = <VALUE_PULL_UP>;
+			};
+			sdio0_bus4: sdio0-bus-width4 {
+				rockchip,pins = <SDMMC_DATA0>,
+						<SDMMC_DATA1>,
+						<SDMMC_DATA2>,
+						<SDMMC_DATA3>;
+				rockchip,pull = <VALUE_PULL_UP>;
+			};
 
 			sdio0_gpio: sdio0_gpio{
 				rockchip,pins = <GPIO0_D6>, //pwren
-						<GPIO0_A3>; //cmd
+						<GPIO0_A3>, //cmd
+						<GPIO1_A0>, //clk
+						<GPIO1_A1>, //data0
+						<GPIO1_A2>, //data1
+						<GPIO1_A4>, //data2
+						<GPIO1_A5>; //data3
 				rockchip,pull = <VALUE_PULL_UP>;
 			};
 
diff --git a/arch/arm/boot/dts/rk312x.dtsi b/arch/arm/boot/dts/rk312x.dtsi
index 35aa3c9c4dd8..f3049a7ed965 100755
--- a/arch/arm/boot/dts/rk312x.dtsi
+++ b/arch/arm/boot/dts/rk312x.dtsi
@@ -505,7 +505,7 @@
 		#address-cells = <1>;
 		#size-cells = <0>;
 		pinctrl-names = "default","idle";
-		pinctrl-0 = <&sdio0_pwren &sdio0_cmd>;
+		pinctrl-0 = <&sdio0_pwren &sdio0_cmd &sdio0_clk &sdio0_bus4>;
 		pinctrl-1 = <&sdio0_gpio>;
 		clocks = <&clk_sdio>, <&clk_gates5 11>;
 		clock-names = "clk_mmc", "hclk_mmc";
-- 
2.34.1