From b9e14c193d41b680803c4f0d3354b0c7dc2e85e2 Mon Sep 17 00:00:00 2001
From: Chen Liang <cl@rock-chips.com>
Date: Thu, 22 Oct 2015 10:03:26 +0800
Subject: [PATCH 1/1] ARM: dts: rk3228: add syscon node for
 sgrf\grf\cru\ddrpctl\msch

Change-Id: I00bdb4b64a4e5e0a7f5fcd9dd29ec76fd4aba218
Signed-off-by: Chen Liang <cl@rock-chips.com>
---
 arch/arm/boot/dts/rk3228.dtsi | 25 +++++++++++++++++++++++++
 1 file changed, 25 insertions(+)

diff --git a/arch/arm/boot/dts/rk3228.dtsi b/arch/arm/boot/dts/rk3228.dtsi
index 2ac10ef4aa1b..66db2fc29469 100644
--- a/arch/arm/boot/dts/rk3228.dtsi
+++ b/arch/arm/boot/dts/rk3228.dtsi
@@ -47,6 +47,31 @@
 		      <0x32012000 0x1000>;
 	};
 
+	sgrf: syscon@10140000 {
+		compatible = "rockchip,rk3228-sgrf", "rockchip,sgrf", "syscon";
+		reg = <0x10140000 0x1000>;
+	};
+
+	grf: syscon@11000000 {
+		compatible = "rockchip,rk3228-grf", "rockchip,grf", "syscon";
+		reg = <0x11000000 0x1000>;
+	};
+
+	cru: syscon@110e0000 {
+		compatible = "rockchip,rk3228-cru", "rockchip,cru", "syscon";
+		reg = <0x110e0000 0x1000>;
+	};
+
+	ddrpctl: syscon@11200000 {
+		compatible = "rockchip,rk3228-ddrpctl", "syscon";
+		reg = <0x11200000 0x400>;
+	};
+
+	msch: syscon@31020000 {
+		compatible = "rockchip,rk32288-msch", "rockchip,msch", "syscon";
+		reg = <0x31020000 0x3000>;
+	};
+
 	arm-pmu {
 		compatible = "arm,cortex-a7-pmu";
 		interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
-- 
2.34.1