From 9dd79fc5029f5f96899851108520393648f8d073 Mon Sep 17 00:00:00 2001
From: Frank Wang <frank.wang@rock-chips.com>
Date: Wed, 16 Mar 2016 14:54:28 +0800
Subject: [PATCH] ARM64: dts: rockchip: add USB2.0 host nodes for rk3399

Change-Id: Id18a8b43210e439add8c5af8a18a3a62e0d06cc9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-tb.dtsi | 15 +++++++++
 arch/arm64/boot/dts/rockchip/rk3399.dtsi    | 36 +++++++++++++++++++++
 2 files changed, 51 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-tb.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-tb.dtsi
index 9f272c1f245c..dcbefc4cc07d 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-tb.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-tb.dtsi
@@ -60,3 +60,18 @@
 	status = "okay";
 };
 
+&usb_host0_echi {
+	status = "okay";
+};
+
+&usb_host0_ohci {
+	status = "okay";
+};
+
+&usb_host1_echi {
+	status = "okay";
+};
+
+&usb_host1_ohci {
+	status = "okay";
+};
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 15455af384c1..ea4226f7b99f 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -507,6 +507,42 @@
 		status = "disabled";
 	};
 
+	usb_host0_echi: usb@fe380000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfe380000 0x0 0x20000>;
+		interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>;
+		clock-names = "hclk_host0";
+		status = "disabled";
+	};
+
+	usb_host0_ohci: usb@fe3a0000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfe3a0000 0x0 0x20000>;
+		interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST0>;
+		clock-names = "hclk_host0";
+		status = "disabled";
+	};
+
+	usb_host1_echi: usb@fe3c0000 {
+		compatible = "generic-ehci";
+		reg = <0x0 0xfe3c0000 0x0 0x20000>;
+		interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST1>;
+		clock-names = "hclk_host1";
+		status = "disabled";
+	};
+
+	usb_host1_ohci: usb@fe3e0000 {
+		compatible = "generic-ohci";
+		reg = <0x0 0xfe3e0000 0x0 0x20000>;
+		interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
+		clocks = <&cru HCLK_HOST1>;
+		clock-names = "hclk_host1";
+		status = "disabled";
+	};
+
 	i2c4: i2c@ff3d0000 {
 		compatible = "rockchip,rk3399-i2c", "rockchip,rk3288-i2c";
 		reg = <0x0 0xff3d0000 0x0 0x1000>;
-- 
2.34.1