From 70b8fe2af398bcd8d221f8b31bea1e002ea4fcfb Mon Sep 17 00:00:00 2001
From: "hero.huang" <hero.huang@rock-chips.com>
Date: Tue, 28 Mar 2017 09:01:00 +0800
Subject: [PATCH] arm64: dts: rockchip: enable pcie_phy for Sapphire board

Change-Id: Ia59a697ee27d4f4848f3fceb344f362b7fdcae73
Signed-off-by: hero.huang <hero.huang@rock-chips.com>
---
 arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
index 2574d30fe15e..a3961115606a 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399-sapphire.dtsi
@@ -494,6 +494,10 @@
 	gpio1830-supply = <&vcc_3v0>;		/* gpio1833_gpio4cd_ms */
 };
 
+&pcie_phy {
+	status = "okay";
+};
+
 &pcie0 {
 	assigned-clocks = <&cru SCLK_PCIEPHY_REF>;
 	assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>;
-- 
2.34.1