From 4d377d0e3250249da2fa1a22fd8e5390d7685538 Mon Sep 17 00:00:00 2001 From: =?utf8?q?=E9=99=88=E4=BA=AE?= Date: Wed, 23 Jul 2014 01:43:14 -0700 Subject: [PATCH] rk312x: define GRF register offset, add some iomap MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Signed-off-by: 陈亮 --- arch/arm/mach-rockchip/rk312x.c | 25 ++++++-- include/linux/rockchip/grf.h | 100 ++++++++++++++++++++++++++++++++ include/linux/rockchip/iomap.h | 1 + 3 files changed, 120 insertions(+), 6 deletions(-) diff --git a/arch/arm/mach-rockchip/rk312x.c b/arch/arm/mach-rockchip/rk312x.c index 34d3fc6c8a4b..5c96d45e7d4a 100755 --- a/arch/arm/mach-rockchip/rk312x.c +++ b/arch/arm/mach-rockchip/rk312x.c @@ -40,7 +40,7 @@ #include "sram.h" #include "pm.h" -#define RK312x_DEVICE(name) \ +#define RK312X_DEVICE(name) \ { \ .virtual = (unsigned long) RK_##name##_VIRT, \ .pfn = __phys_to_pfn(RK312X_##name##_PHYS), \ @@ -58,17 +58,29 @@ static const char * const rk3128_dt_compat[] __initconst = { NULL, }; +#define RK312X_IMEM_VIRT (RK_BOOTRAM_VIRT + SZ_32K) +#define RK312X_TIMER5_VIRT (RK_TIMER_VIRT + 0xa0) + static struct map_desc rk312x_io_desc[] __initdata = { + RK312X_DEVICE(CRU), + RK312X_DEVICE(GRF), + RK312X_DEVICE(ROM), + RK312X_DEVICE(EFUSE), + RK312X_DEVICE(TIMER), RK_DEVICE(RK_DEBUG_UART_VIRT, RK312X_UART2_PHYS, RK312X_UART_SIZE), - RK312x_DEVICE(TIMER), + RK_DEVICE(RK_DDR_VIRT, RK312X_DDR_PCTL_PHYS, RK312X_DDR_PCTL_SIZE), + RK_DEVICE(RK_DDR_VIRT + RK312X_DDR_PCTL_SIZE, RK312X_DDR_PHY_PHYS, RK312X_DDR_PHY_SIZE), + RK_DEVICE(RK_GPIO_VIRT(0), RK312X_GPIO0_PHYS, RK312X_GPIO_SIZE), + RK_DEVICE(RK_GPIO_VIRT(1), RK312X_GPIO1_PHYS, RK312X_GPIO_SIZE), + RK_DEVICE(RK_GPIO_VIRT(2), RK312X_GPIO2_PHYS, RK312X_GPIO_SIZE), + RK_DEVICE(RK_GPIO_VIRT(3), RK312X_GPIO3_PHYS, RK312X_GPIO_SIZE), + RK_DEVICE(RK_GIC_VIRT, RK312X_GIC_DIST_PHYS, RK312X_GIC_DIST_SIZE), + RK_DEVICE(RK_GIC_VIRT + RK312X_GIC_DIST_SIZE, RK312X_GIC_CPU_PHYS, RK312X_GIC_CPU_SIZE), + RK_DEVICE(RK312X_IMEM_VIRT, RK312X_IMEM_PHYS, SZ_4K), }; -#define RK312X_TIMER5_VIRT (RK_TIMER_VIRT + 0xa0) - static void __init rk312x_dt_map_io(void) { - rockchip_soc_id = ROCKCHIP_SOC_RK3126; - iotable_init(rk312x_io_desc, ARRAY_SIZE(rk312x_io_desc)); debug_ll_io_init(); @@ -98,6 +110,7 @@ static void __init rk3128_dt_map_io(void) static void __init rk312x_dt_init_timer(void) { + of_clk_init(NULL); clocksource_of_init(); } diff --git a/include/linux/rockchip/grf.h b/include/linux/rockchip/grf.h index bfa788cd4e1e..d65094439804 100755 --- a/include/linux/rockchip/grf.h +++ b/include/linux/rockchip/grf.h @@ -424,4 +424,104 @@ #define RK3036_GRF_USBPHY1_CON7 0x002bc #define RK3036_GRF_CHIP_TAG 0x00300 #define RK3036_GRF_SDMMC_DET_CNT 0x00304 + +#define RK312X_GRF_GPIO0A_IOMUX 0x000a8 +#define RK312X_GRF_GPIO0B_IOMUX 0x000ac +#define RK312X_GRF_GPIO0C_IOMUX 0x000b0 +#define RK312X_GRF_GPIO0D_IOMUX 0x000b4 +#define RK312X_GRF_GPIO1A_IOMUX 0x000b8 +#define RK312X_GRF_GPIO1B_IOMUX 0x000bc +#define RK312X_GRF_GPIO1C_IOMUX 0x000c0 +#define RK312X_GRF_GPIO1D_IOMUX 0x000c4 +#define RK312X_GRF_GPIO2A_IOMUX 0x000c8 +#define RK312X_GRF_GPIO2B_IOMUX 0x000cc +#define RK312X_GRF_GPIO2C_IOMUX 0x000d0 +#define RK312X_GRF_GPIO2D_IOMUX 0x000d4 +#define RK312X_GRF_GPIO3A_IOMUX 0x000d8 +#define RK312X_GRF_GPIO3B_IOMUX 0x000dc +#define RK312X_GRF_GPIO3C_IOMUX 0x000e0 +#define RK312X_GRF_GPIO3D_IOMUX 0x000e4 +#define RK312X_GRF_CIF_IOMUX 0x000ec +#define RK312X_GRF_CIF_IOMUX1 0x000f0 +#define RK312X_GRF_GPIO_DS 0x00100 +#define RK312X_GRF_GPIO0L_PULL 0x00118 +#define RK312X_GRF_GPIO0H_PULL 0x0011c +#define RK312X_GRF_GPIO1L_PULL 0x00120 +#define RK312X_GRF_GPIO1H_PULL 0x00124 +#define RK312X_GRF_GPIO2L_PULL 0x00128 +#define RK312X_GRF_GPIO2H_PULL 0x0012c +#define RK312X_GRF_GPIO3L_PULL 0x00130 +#define RK312X_GRF_GPIO3H_PULL 0x00134 +#define RK312X_GRF_ACODEC_CON 0x0013c + +#define RK312X_GRF_SOC_CON0 0x00140 +#define RK312X_GRF_SOC_CON1 0x00144 +#define RK312X_GRF_SOC_CON2 0x00148 +#define RK312X_GRF_SOC_STATUS0 0x0014c +#define RK312X_GRF_LVDS_CON0 0x00150 +#define RK312X_GRF_SOC_CON3 0x00154 +#define RK312X_GRF_DMAC_CON0 0x0015c +#define RK312X_GRF_DMAC_CON1 0x00160 +#define RK312X_GRF_DMAC_CON2 0x00164 +#define RK312X_GRF_MAC_CON0 0x00168 +#define RK312X_GRF_MAC_CON1 0x0016c +#define RK312X_GRF_TVE_CON 0x00170 +#define RK312X_GRF_UOC0_CON0 0x0017c +#define RK312X_GRF_UOC1_CON1 0x00184 +#define RK312X_GRF_UOC1_CON2 0x00188 +#define RK312X_GRF_UOC1_CON3 0x0018c +#define RK312X_GRF_UOC1_CON4 0x00190 +#define RK312X_GRF_UOC1_CON5 0x00194 +#define RK312X_GRF_DDRC_STAT 0x0019c +#define RK312X_GRF_SOC_STATUS1 0x001a4 +#define RK312X_GRF_CPU_CON0 0x001a8 +#define RK312X_GRF_CPU_CON1 0x001ac +#define RK312X_GRF_CPU_CON2 0x001b0 +#define RK312X_GRF_CPU_CON3 0x001b4 +#define RK312X_GRF_CPU_STATUS0 0x001c0 +#define RK312X_GRF_CPU_STATUS1 0x001c4 +#define RK312X_GRF_OS_REG0 0x001c8 +#define RK312X_GRF_OS_REG1 0x001cc +#define RK312X_GRF_OS_REG2 0x001d0 +#define RK312X_GRF_OS_REG3 0x001d4 +#define RK312X_GRF_OS_REG4 0x001d8 +#define RK312X_GRF_OS_REG5 0x001dc +#define RK312X_GRF_OS_REG6 0x001e0 +#define RK312X_GRF_OS_REG7 0x001e4 +#define RK312X_GRF_PVTM_CON0 0x00200 +#define RK312X_GRF_PVTM_CON1 0x00204 +#define RK312X_GRF_PVTM_CON2 0x00208 +#define RK312X_GRF_PVTM_CON3 0x0020c +#define RK312X_GRF_PVTM_STATUS0 0x00210 +#define RK312X_GRF_PVTM_STATUS1 0x00214 +#define RK312X_GRF_PVTM_STATUS2 0x00218 +#define RK312X_GRF_PVTM_STATUS3 0x0021c +#define RK312X_GRF_DFI_WRNUM 0x00220 +#define RK312X_GRF_DFI_RDNUM 0x00224 +#define RK312X_GRF_DFI_ACTNUM 0x00228 +#define RK312X_GRF_DFI_TIMERVAL 0x0022c +#define RK312X_GRF_NIF_FIFO0 0x00230 +#define RK312X_GRF_NIF_FIFO1 0x00234 +#define RK312X_GRF_NIF_FIFO2 0x00238 +#define RK312X_GRF_NIF_FIFO3 0x0023c +#define RK312X_GRF_USBPHY0_CON0 0x00280 +#define RK312X_GRF_USBPHY0_CON1 0x00284 +#define RK312X_GRF_USBPHY0_CON2 0x00288 +#define RK312X_GRF_USBPHY0_CON3 0x0028c +#define RK312X_GRF_USBPHY0_CON4 0x00290 +#define RK312X_GRF_USBPHY0_CON5 0x00294 +#define RK312X_GRF_USBPHY0_CON6 0x00298 +#define RK312X_GRF_USBPHY0_CON7 0x0029c +#define RK312X_GRF_USBPHY1_CON0 0x002a0 +#define RK312X_GRF_USBPHY1_CON1 0x002a4 +#define RK312X_GRF_USBPHY1_CON2 0x002a8 +#define RK312X_GRF_USBPHY1_CON3 0x002ac +#define RK312X_GRF_USBPHY1_CON4 0x002b0 +#define RK312X_GRF_USBPHY1_CON5 0x002b4 +#define RK312X_GRF_USBPHY1_CON6 0x002b8 +#define RK312X_GRF_USBPHY1_CON7 0x002bc +#define RK312X_GRF_UOC_STATUS0 0x002c0 +#define RK312X_GRF_CHIP_TAG 0x00300 +#define RK312X_GRF_SDMMC_DET_CNT 0x00304 +#define RK312X_GRF_EFUSE_PRG_EN 0x0037c #endif diff --git a/include/linux/rockchip/iomap.h b/include/linux/rockchip/iomap.h index 98c552fe856c..1adbcb294187 100755 --- a/include/linux/rockchip/iomap.h +++ b/include/linux/rockchip/iomap.h @@ -171,6 +171,7 @@ #define RK312X_GPIO0_PHYS RK3036_GPIO0_PHYS #define RK312X_GPIO1_PHYS RK3036_GPIO1_PHYS #define RK312X_GPIO2_PHYS RK3036_GPIO2_PHYS +#define RK312X_GPIO3_PHYS 0x20088000 #define RK312X_GPIO_SIZE RK3036_GPIO_SIZE #define RK312X_EFUSE_PHYS RK3036_EFUSE_PHYS #define RK312X_EFUSE_SIZE RK3036_EFUSE_SIZE -- 2.34.1