From 418b0dbdc4d72fb99cd5aa6a26b6b08ff98e2afe Mon Sep 17 00:00:00 2001 From: Finley Xiao Date: Thu, 3 Nov 2016 20:48:17 +0800 Subject: [PATCH] dt-bindings: add binding document for Rockchip pvtm This patch documents the Rockchip pvtm device tree binding. Change-Id: I7edcd1d57ff2852eb6e6897680566abb7f9e76a9 Signed-off-by: Finley Xiao --- .../bindings/soc/rockchip/rockchip-pvtm.txt | 33 +++++++++++++++++++ 1 file changed, 33 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/rockchip/rockchip-pvtm.txt diff --git a/Documentation/devicetree/bindings/soc/rockchip/rockchip-pvtm.txt b/Documentation/devicetree/bindings/soc/rockchip/rockchip-pvtm.txt new file mode 100644 index 000000000000..fa6fdd5aadbf --- /dev/null +++ b/Documentation/devicetree/bindings/soc/rockchip/rockchip-pvtm.txt @@ -0,0 +1,33 @@ +Rockchip pvtm device tree bindings +---------------------------------- + +The Process-Voltage-Temperature Monitor (PVTM) is used to monitor the chip +performance variance caused by chip process, voltage and temperature. + + +Required properties: +- compatible: Should be one of the following. + - "rockchip,rk3366-pvtm" - for RK3366 SoCs. + - "rockchip,rk3366-pmu-pvtm" - for RK3366 SoCs. + - "rockchip,rk3399-pvtm" - for RK3399 SoCs. + - "rockchip,rk3399-pmu-pvtm" - for RK3399 SoCs. +- clocks: list of the clock controller input clock identifiers. +- clock-names: list of the clock controller input clock names. + +Example: + +grf: syscon@ff770000 { + compatible = "rockchip,rk3399-grf", "syscon", "simple-mfd"; + reg = <0x0 0xff770000 0x0 0x10000>; + #address-cells = <1>; + #size-cells = <1>; + +... + + pvtm: pvtm { + compatible = "rockchip,rk3399-pvtm"; + clocks = <&cru SCLK_PVTM_CORE_L>, <&cru SCLK_PVTM_CORE_B>, + <&cru SCLK_PVTM_GPU>, <&cru SCLK_PVTM_DDR>; + clock-names = "core_l", "core_b", "gpu", "ddr"; + }; +} -- 2.34.1