From 331fd8c0321197fac53b0cf3950210ce422c52b5 Mon Sep 17 00:00:00 2001 From: Xing Zheng Date: Wed, 9 Mar 2016 10:43:31 +0800 Subject: [PATCH] UPSTREAM: clk: rockchip: add a COMPOSITE_FRACMUX_NOGATE type Because there are some frac clock mux nodes don't have a gate node on the RK3399. Change-Id: I4791b90a08faab286743a5cba30738cfb046594c Signed-off-by: Xing Zheng Signed-off-by: Heiko Stuebner (cherry picked from git.kernel.org mmind/linux-rockchip.git v4.7-clk/next commit ffd9d4d39ef7ff90364d3abd6c39919e6582b605) --- drivers/clk/rockchip/clk.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h index cb8f405b607d..f0f07ce14723 100644 --- a/drivers/clk/rockchip/clk.h +++ b/drivers/clk/rockchip/clk.h @@ -420,6 +420,22 @@ struct rockchip_clk_branch { .child = ch, \ } +#define COMPOSITE_FRACMUX_NOGATE(_id, cname, pname, f, mo, df, ch) \ + { \ + .id = _id, \ + .branch_type = branch_fraction_divider, \ + .name = cname, \ + .parent_names = (const char *[]){ pname }, \ + .num_parents = 1, \ + .flags = f, \ + .muxdiv_offset = mo, \ + .div_shift = 16, \ + .div_width = 16, \ + .div_flags = df, \ + .gate_offset = -1, \ + .child = ch, \ + } + #define MUX(_id, cname, pnames, f, o, s, w, mf) \ { \ .id = _id, \ -- 2.34.1