From 2adaeb93a1b0c795f281b46d84482b19080d7f60 Mon Sep 17 00:00:00 2001 From: cl Date: Mon, 15 Dec 2014 09:09:09 +0800 Subject: [PATCH] rk312x: miss the new file rk3126.dtsi&&3128.dtsi for the commit c59e8d086aaf89d0f48351ff7287708b57e5aba1(rk312x: adjust dts relation) Signed-off-by: cl --- arch/arm/boot/dts/rk3126.dtsi | 32 ++++++++++++++++++++++++++++++++ arch/arm/boot/dts/rk3128.dtsi | 1 + 2 files changed, 33 insertions(+) create mode 100644 arch/arm/boot/dts/rk3126.dtsi create mode 100644 arch/arm/boot/dts/rk3128.dtsi diff --git a/arch/arm/boot/dts/rk3126.dtsi b/arch/arm/boot/dts/rk3126.dtsi new file mode 100644 index 000000000000..c4f7b8263aca --- /dev/null +++ b/arch/arm/boot/dts/rk3126.dtsi @@ -0,0 +1,32 @@ +#include "rk312x.dtsi" + +&clk_gpll_div2 { + clocks = <&dummy>; +}; + +&clk_gpll_div3 { + clocks = <&dummy>; +}; + +&rockchip_clocks_init { + rockchip,clocks-init-parent = + <&clk_core &clk_apll>, <&aclk_cpu &clk_gpll>, + <&aclk_peri &clk_gpll>, <&clk_uart0_pll &clk_gpll>, + <&clk_uart2_pll &clk_gpll>, <&clk_i2s_2ch_pll &clk_gpll>, + <&clk_i2s_8ch_pll &clk_gpll>, <&clk_spdif_pll &clk_gpll>, + <&clk_vepu &clk_gpll>, <&clk_vdpu &clk_gpll>, + <&clk_hevc_core &clk_gpll>, <&aclk_vio0_pre &clk_gpll>, + <&aclk_vio1_pre &clk_gpll>, <&hclk_vio_pre &clk_gpll>, + <&sclk_lcdc0 &clk_cpll>, <&clk_gpu &clk_gpll>, + <&clk_cif_pll &clk_gpll>, <&dclk_ebc &clk_gpll>, + <&clk_emmc &clk_gpll>, <&clk_sdio &clk_gpll>, + <&clk_sfc &clk_gpll>, <&clk_sdmmc0 &clk_gpll>, + <&clk_tsp &clk_gpll>, <&clk_nandc &clk_gpll>, + <&clk_mac_pll &clk_cpll>; +}; + +&i2s0 { + /* sdi: 0: from io, 1: from acodec */ + sdi_source = <1>; + status = "okay"; +}; \ No newline at end of file diff --git a/arch/arm/boot/dts/rk3128.dtsi b/arch/arm/boot/dts/rk3128.dtsi new file mode 100644 index 000000000000..e3aba98fe23b --- /dev/null +++ b/arch/arm/boot/dts/rk3128.dtsi @@ -0,0 +1 @@ +#include "rk312x.dtsi" -- 2.34.1