mmc: rk_sdmmc: manually zero desc after allocated on ARM64 platform.
authorlintao <lintao@rock-chips.com>
Wed, 24 Dec 2014 07:43:20 +0000 (15:43 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Wed, 24 Dec 2014 08:38:17 +0000 (16:38 +0800)
commite68d16d33646fabf36e782b300404f112eb94d1d
tree0b893bb58b2ea1d9decfae6ad8030b78cd4eb719
parent1b4317b2c96e1e40c7e3cefd0182d29829fed2da
mmc: rk_sdmmc: manually zero desc after allocated on ARM64 platform.

ARM64 call dmam_alloc_coherent mathod to allocate descriptor
will not auto clear buffer. So mmc may get wrong d->desc1 calculated that
load wrong address for BUF2 for dual-buf mode if NO CH set in d->desc0.
Then IDMAC will halt for BUF2 in WR_REQ_WAIT state and cannot generate
TI/RI or others in combine-interrupt.

Signed-off-by: lintao <lintao@rock-chips.com>
drivers/mmc/host/rk_sdmmc.c