firefly-linux-kernel-4.4.55.git
5 years agothermal: rockchip: add rk3328 support
Rocky Hao [Fri, 24 Feb 2017 06:51:53 +0000 (14:51 +0800)]
thermal: rockchip: add rk3328 support

Change-Id: I31f87741a874657fb7caf494ebafd53b6c0ef3b1
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
5 years agoarm64: dts: rockchip: complete cpufreq config data for rk3328
Rocky Hao [Fri, 24 Feb 2017 03:00:32 +0000 (11:00 +0800)]
arm64: dts: rockchip: complete cpufreq config data for rk3328

Change-Id: I422ec388ab6d66e1ba669028d7b88525569e88d5
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
5 years agodrm/rockchip: dw_hdmi: use crtc_clock as vpll clock rate
Zheng Yang [Fri, 24 Feb 2017 06:56:40 +0000 (14:56 +0800)]
drm/rockchip: dw_hdmi: use crtc_clock as vpll clock rate

adjusted_mode.crtc_clock is the real pixel clock rate.

Change-Id: Iac242b89e3144bc53c40170c2cec0c0913ef6ee0
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
5 years agodrm: bridge/dw_hdmi: support DRM_MODE_FLAG_DBLCLK
Zheng Yang [Fri, 24 Feb 2017 06:53:32 +0000 (14:53 +0800)]
drm: bridge/dw_hdmi: support DRM_MODE_FLAG_DBLCLK

Change-Id: I66d9456d6bde38fcf17d5cd5f6394517e4308a68
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
5 years agodrm/rockchip: vop: support DRM_MODE_FLAG_DBLCLK
Mark Yao [Fri, 24 Feb 2017 02:56:43 +0000 (10:56 +0800)]
drm/rockchip: vop: support DRM_MODE_FLAG_DBLCLK

Change-Id: I604e6ba32a2ac3a6569d341d23f9a3368f921120
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agomfd: rk805: fix submodules node available match error
chenjh [Fri, 24 Feb 2017 06:35:56 +0000 (14:35 +0800)]
mfd: rk805: fix submodules node available match error

include: rtc, gpio, pwrkey

Change-Id: I3c91e2ade911017125c80008c122f4bf484767f3
Signed-off-by: chenjh <chenjh@rock-chips.com>
5 years agoarm64: dts: rockchip: Add RK3399 Excavator box dts for drm
Zhangbin Tong [Fri, 24 Feb 2017 01:49:39 +0000 (09:49 +0800)]
arm64: dts: rockchip: Add RK3399 Excavator box dts for drm

Change-Id: Ie3c9cadb3cfbd9d4080ff54c0b65933f347e093a
Signed-off-by: Zhangbin Tong <zebulun.tong@rock-chips.com>
5 years agoarm64: dts: rockchip: clk: rk3399: support dual pll for drm linux
Mark Yao [Fri, 24 Feb 2017 02:27:18 +0000 (10:27 +0800)]
arm64: dts: rockchip: clk: rk3399: support dual pll for drm linux

Change-Id: Ifb38159915939731c3cfc83c7e71000281997cf3
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agodrm: print framebuffer size when plane check fail
Mark Yao [Fri, 24 Feb 2017 02:19:27 +0000 (10:19 +0800)]
drm: print framebuffer size when plane check fail

Change-Id: Id51f25e407953cf123444cf961da8a0f8f5745e8
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agoarm64: configs: enable network filesystem for rockchip linux
Jacob Chen [Wed, 22 Feb 2017 09:42:48 +0000 (17:42 +0800)]
arm64: configs: enable network filesystem for rockchip linux

NFS is a important feature and should be enabled.

Change-Id: Ibc3794bd31f9ddad94af7d3c06d5569fe6feeaf8
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
5 years agoARM: configs: enable network filesystem for rockchip linux
Jacob Chen [Wed, 22 Feb 2017 09:43:35 +0000 (17:43 +0800)]
ARM: configs: enable network filesystem for rockchip linux

NFS is a important feature and should be enabled.

Change-Id: If38086293c47e038fa605a013786465a466f107a
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
5 years agoarm64: rockchip_linux_defconfig: enable USB_CONFIGFS_ACM
William Wu [Wed, 22 Feb 2017 09:41:59 +0000 (17:41 +0800)]
arm64: rockchip_linux_defconfig: enable USB_CONFIGFS_ACM

Change-Id: I70555f8a3897540092068393fea62308fc5e098c
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: rockchip_defconfig: enable USB_CONFIGFS_MASS_STORAGE
William Wu [Wed, 22 Feb 2017 09:38:55 +0000 (17:38 +0800)]
arm64: rockchip_defconfig: enable USB_CONFIGFS_MASS_STORAGE

Change-Id: Idb0d19f2ccad9026f3078724cffbd44b67c5d043
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: rockchip_defconfig: enable USB_CONFIGFS_ACM
William Wu [Wed, 22 Feb 2017 09:33:44 +0000 (17:33 +0800)]
arm64: rockchip_defconfig: enable USB_CONFIGFS_ACM

Change-Id: I4abe4b08d9dde1e873221431af680298269ddfa5
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoARM: rockchip_linux_defconfig: enable MASS_STORAGE config
Jacob Chen [Wed, 22 Feb 2017 08:22:11 +0000 (16:22 +0800)]
ARM: rockchip_linux_defconfig: enable MASS_STORAGE config

Change-Id: Ib23f4c7c6d302203fcb759e93efc4601ca1a13bd
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
5 years agodrm/rockchip: cdn-dp: modify switchdev name to "cdn-dp"
Bin Yang [Wed, 22 Feb 2017 06:05:10 +0000 (14:05 +0800)]
drm/rockchip: cdn-dp: modify switchdev name to "cdn-dp"

If DP and HDMI are enabled at the same board, they will be
register switchdev with the same name in the same directory.
This would cause register switchdev fail.

Resulting in the following error:
[    0.882415] [<ffffff8008212044>] sysfs_warn_dup+0x60/0x7c
[    0.882424] [<ffffff800821212c>] sysfs_create_dir_ns+0x74/0x94
[    0.882436] [<ffffff8008359fc0>] kobject_add_internal+0xc8/0x290
[    0.882446] [<ffffff800835a428>] kobject_add+0xe0/0x10c
[    0.882454] [<ffffff80084c2874>] device_add+0xec/0x508
[    0.882462] [<ffffff80084c2e3c>] device_create_groups_vargs+0xb4/0xf8
[    0.882471] [<ffffff80084c2eac>] device_create_vargs+0x2c/0x34
[    0.882479] [<ffffff80084c2f14>] device_create+0x60/0x80
[    0.882491] [<ffffff80087248bc>] switch_dev_register+0x8c/0x120
[    0.882502] [<ffffff80084709ec>] cdn_dp_bind+0x4c4/0x644
[    0.882511] [<ffffff80084c091c>] component_bind_all+0x94/0x1c0
[    0.882523] [<ffffff8008478550>] rockchip_drm_bind+0x1c4/0xb54
[    0.882533] [<ffffff80084c0554>] try_to_bring_up_master.part.3+0xac/0x114
[    0.882542] [<ffffff80084c0780>] component_add+0x88/0xf8
[    0.882550] [<ffffff8008470504>] cdn_dp_probe+0x140/0x164
[    0.882559] [<ffffff80084c71f8>] platform_drv_probe+0x58/0xa4
[    0.882568] [<ffffff80084c5498>] driver_probe_device+0x118/0x2ac
[    0.882576] [<ffffff80084c5778>] __device_attach_driver+0x88/0x98
[    0.882584] [<ffffff80084c38a0>] bus_for_each_drv+0x7c/0xac
[    0.882592] [<ffffff80084c52cc>] __device_attach+0xa4/0x124
[    0.882600] [<ffffff80084c58e4>] device_initial_probe+0x10/0x18
[    0.882609] [<ffffff80084c4924>] bus_probe_device+0x2c/0x8c
[    0.882617] [<ffffff80084c4da0>] deferred_probe_work_func+0x74/0xa0
[    0.882628] [<ffffff80080b2b38>] process_one_work+0x218/0x3e0
[    0.882636] [<ffffff80080b3538>] worker_thread+0x2e8/0x404
[    0.882644] [<ffffff80080b7e70>] kthread+0xe8/0xf0
[    0.882653] [<ffffff8008082690>] ret_from_fork+0x10/0x40
[    0.882675] kobject_add_internal failed for hdmi with -EEXIST, don't try to
register things with the same name in the same directory.

Change-Id: I0c1b175a2483d5524d9cc0e5261d332c5ad286c8
Signed-off-by: Bin Yang <yangbin@rock-chips.com>
5 years agoASoC: rockchip: i2s: add a delay before i2s clear
Sugar Zhang [Tue, 21 Feb 2017 03:14:05 +0000 (11:14 +0800)]
ASoC: rockchip: i2s: add a delay before i2s clear

in order to keep i2s lrck signal integrity, when i2s stop,
need at least one lrck cycle to ensure signal integrity.

the max delay time is when lrck is 8khz, the delay time is
125us(1/8khz), using udelay(150) with a 25us margin.

Change-Id: Ia0b0c8b0153e25ed3686eee2e13f370d0c3da380
Signed-off-by: Sugar Zhang <sugar.zhang@rock-chips.com>
5 years agoarm64: rockchip_linux_defconfig: enable MASS_STORAGE config
Binyuan Lan [Mon, 20 Feb 2017 08:50:55 +0000 (16:50 +0800)]
arm64: rockchip_linux_defconfig: enable MASS_STORAGE config

Change-Id: Ibe549b102632e6c19c508f46df1b4d4a2b518d51
Signed-off-by: Binyuan Lan <lby@rock-chips.com>
5 years agodrm/rockchip: support cpu cache for drm memory
Mark Yao [Fri, 17 Feb 2017 11:49:08 +0000 (19:49 +0800)]
drm/rockchip: support cpu cache for drm memory

Change-Id: Ic9ca3d0862eb8c5c4d8a002db8cbbcc93d2dcc02
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agoARM64: dts: rk3399-tve1205g: set fixed clock timing of panel
Zhou weixin [Wed, 22 Feb 2017 02:54:56 +0000 (10:54 +0800)]
ARM64: dts: rk3399-tve1205g: set fixed clock timing of panel

Change-Id: I1872ddc5d386b6707ec9ac4e1843b8346a5b36e7
Signed-off-by: Zhou weixin <zwx@rock-chips.com>
5 years agodrm/rockchip: fixup input source check
Mark Yao [Tue, 21 Feb 2017 01:50:07 +0000 (09:50 +0800)]
drm/rockchip: fixup input source check

check destination with max_input is wrong.

Change-Id: If5499b0bc61c84f2b91b641b1974b29b6c042215
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agorockchip: clk: rk3399: default enable dual pll for vop
Mark Yao [Tue, 21 Feb 2017 01:04:04 +0000 (09:04 +0800)]
rockchip: clk: rk3399: default enable dual pll for vop

Change-Id: I88a2a549eaafa91e4159f262a5f5838c834a89e9
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>
5 years agoclk: rockchip: add pll_wait_lock for pll_enable
Elaine Zhang [Tue, 21 Feb 2017 08:50:51 +0000 (16:50 +0800)]
clk: rockchip: add pll_wait_lock for pll_enable

if pll is power down,when power up pll need wait pll lock.

Change-Id: I2e795a682a0c9712b41e00ddf054065dde4a5c7c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agophy: rockchip-inno-usb3: support u3 to work on u2 only mode
William Wu [Tue, 21 Feb 2017 12:57:52 +0000 (20:57 +0800)]
phy: rockchip-inno-usb3: support u3 to work on u2 only mode

Current code set usb2.0 only mode by type in command and may be
failed if change to usb3.0 for that we need reset the controller
when change mode. This patch add a node in debug file system for
config usb2.0 only or usb2.0/usb3.0 mode. So SLT testing or anyone
else can use this node to change config mode.

1. Config to usb2.0/usb3.0 mode:
   echo u3 > /sys/kernel/debug/<phy name>/u3phy_mode

2. Config to usb2.0 only mode:
   echo u2 > /sys/kernel/debug/<phy name>/u3phy_mode

Change-Id: I11338d8307e771b7d76b61a91477d353444c011c
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: dts: rockchip: add grf handle for rk3328 u3phy
William Wu [Tue, 21 Feb 2017 12:24:36 +0000 (20:24 +0800)]
arm64: dts: rockchip: add grf handle for rk3328 u3phy

The USB 3.0 PHY need to config grf when change between
USB 2.0 only and USB 2.0/3.0 mode, so we add grf property
for u3phy node.

Change-Id: I4ff2670d0637e9d0cbae06f5e9efbde9a8513bb3
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: dwc3: rockchip-inno: support to set testmodes via debugfs
William Wu [Tue, 21 Feb 2017 12:16:33 +0000 (20:16 +0800)]
usb: dwc3: rockchip-inno: support to set testmodes via debugfs

This patch create host_testmode file in debugfs for
USB HOST. It's useful for us to use a scope to verify
signal integrity for USB2/USB3 HOST.

For example, set testmodes for rk3328 board USB:
1. set test packet for the USB2 port of USB3 interface:
   echo test_packet > /sys/kernel/debug/usb.23/host_testmode

2. set compliance mode for the USB3 port of USB3 interface:
   echo test_u3 > /sys/kernel/debug/usb.23/host_testmode

3. check the testmode status:
   cat /sys/kernel/debug/usb.23/host_testmode
   The log maybe like this:
   U2: test_packet     /* means that U2 in test mode */
   U3: compliance mode /* means that U3 in test mode */

Change-Id: I6ddead14a7b78a011bbffcec6bf865df0632fe1b
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agophy: rockchip-inno-usb3: add phy_cp_test function for u3phy
William Wu [Tue, 21 Feb 2017 12:00:51 +0000 (20:00 +0800)]
phy: rockchip-inno-usb3: add phy_cp_test function for u3phy

The Inno USB3 PHY disable the ability to toggle the CP test
pattern by default. But when do do USB3 compliance test, it
need to change the CP test pattern according to the requirement
of oscilloscope.

This patch add phy_cp_test function to enable the USB3 PHY
to detect the negative pulse which from the Aux Out of the
oscilloscope in SSRX+, and then the USB3 PHY can toggle the
CP test pattern while do USB3 compliance test.

Change-Id: Idbdf937a7a032dcedfd5f207b2d6d5961ed27b15
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agophy: add cp_test callback
William Wu [Tue, 21 Feb 2017 11:43:02 +0000 (19:43 +0800)]
phy: add cp_test callback

There are several SoCs (e.g. rk3228h and rk3328) that integrated
with Inno USB3 PHY, they can't toggle CP test pattern when do
USB3 compliance test by default.

This patch add a cp_test callback for USB3 controller to enable
the special USB3 PHY to toggle the CP test pattern.

Change-Id: I2d603202723a4c044d4231af10cfe2c60ec0e988
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: host: xhci-plat: get the usb3 phy for shared_hcd
William Wu [Tue, 21 Feb 2017 09:37:58 +0000 (17:37 +0800)]
usb: host: xhci-plat: get the usb3 phy for shared_hcd

This patch tries to get the USB3 PHY using, and associates
the XHCI shared_hcd device with it.

With this patch, the USB HUB core driver can do USB PHY
operations base on USB PHY framework, e.g. call usb_phy_
notify_connect() or usb_phy_notify_disconnect() to notify
USB PHY driver to do soft connect or soft disconnect.

Change-Id: I3b51181b840a68ae477b764013446f49dbf7ca70
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: dts: rockchip: add u3 autosuspend quirk for rk3328
William Wu [Tue, 21 Feb 2017 09:03:19 +0000 (17:03 +0800)]
arm64: dts: rockchip: add u3 autosuspend quirk for rk3328

This patch adds a quirk to disable rk3328 xHCI controller
USB3 port autosuspend function, and USB2 port autosuspend
function is still enabled.

Change-Id: Ie5e6883811b09a9a0d839ce59d8f9c4ad8ad3378
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: dwc3: add dis_u3_autosuspend_quirk
William Wu [Tue, 21 Feb 2017 08:58:22 +0000 (16:58 +0800)]
usb: dwc3: add dis_u3_autosuspend_quirk

Some xHCI controllers (e.g. Rockchip rk3328 SoC) integrated
in DWC3 IP, don't support USB 3.0 autosuspend well, so we
need to disable USB 3.0 HUB autosuspend function with a quirk.

Change-Id: I72d93837496f875dbcbb16818aa3690017cc1085
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: host: xhci: set xhci autosuspend quirk based on platform data
William Wu [Tue, 21 Feb 2017 08:41:55 +0000 (16:41 +0800)]
usb: host: xhci: set xhci autosuspend quirk based on platform data

Some USB controllers (such as rk3328 SoC DWC3 controller with INNO
USB 3.0 PHY) don't support autosuspend well, when receive remote
wakeup signal from autosuspend, the Port Link State training failed,
the correct PLC is Resume->Recovery->U0, but when the issue happens,
the wrong PLC is Resume->Recovery->Inactive, cause resuming SS port
fail. This issue always occurs when connect with external USB 3.0 HUB.

This patch add a quirk to disable autosuspend function, and add new
'usb3_disable_autosuspend' member in xHCI platform data to support
set the quirk based on platform data.

Change-Id: Ice01d70178206e22658660361dd3a525046cbcf5
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: core: hub: add quirk for hub with broken autosuspend function
William Wu [Tue, 21 Feb 2017 08:02:36 +0000 (16:02 +0800)]
usb: core: hub: add quirk for hub with broken autosuspend function

Some USB host controller seems to have problems with
autosuspend. For example, Rockchip rk3328 SoC USB 3.0
wouldn't handle remote wakeup correctly with external
hub after entered autosuspend, caused to resume SS
port fail.

This patch introduces a new quirk flag for hub that
should remain disabled for autosuspend.

Change-Id: I6d14222b2c5025583fea811a6afd6abd22f41cb9
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agonet: wireless: rockchip_wlan: add rtl8188fu support
huweiguo [Tue, 21 Feb 2017 11:28:20 +0000 (19:28 +0800)]
net: wireless: rockchip_wlan: add rtl8188fu support

update rtl8188eu wifi driver to version v4.3.23.6_20964.20170110

Change-Id: I8665563259e49bcdb0498b93fac6138c42ffd051
Signed-off-by: huweiguo <hwg@rock-chips.com>
5 years agoarm64: dts: rockchip: enable otg-port node of usb2-phy for rk3328-evb
Frank Wang [Fri, 17 Feb 2017 01:34:48 +0000 (09:34 +0800)]
arm64: dts: rockchip: enable otg-port node of usb2-phy for rk3328-evb

This patch enable otg-port node of usb2-phy for dwc2 otg controller
on rk3328-evb board.

Change-Id: Ic6ce4beb2ba1814554e709a7d8af83a9ece9d7c9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
5 years agoarm64: dts: rockchip: add otg-port node of usb2-phy for rk3328 dwc2
Frank Wang [Mon, 13 Feb 2017 01:47:39 +0000 (09:47 +0800)]
arm64: dts: rockchip: add otg-port node of usb2-phy for rk3328 dwc2

This patch adds otg-port node of usb2-phy for dwc2 otg controller
on rk3328 SoC.

Change-Id: I4cda3e02d9cab2328cb2a3fe423cd4198258e32b
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
5 years agophy: rockchip-inno-usb2: add otg-port support for rk3328
Frank Wang [Fri, 17 Feb 2017 02:47:49 +0000 (10:47 +0800)]
phy: rockchip-inno-usb2: add otg-port support for rk3328

This patch adds otg-port configuration for rk3328 SoC.

Change-Id: Ic680c7f345396c129e7b2ea8a8dded8ba6ee0ae9
Signed-off-by: Frank Wang <frank.wang@rock-chips.com>
5 years agoARM64: dts: rk3399-tve1205g: turn off codec power when suspend
zhangjun [Mon, 20 Feb 2017 01:38:46 +0000 (09:38 +0800)]
ARM64: dts: rk3399-tve1205g: turn off codec power when suspend

Change-Id: I3c4c841ae576e2c1aa016b915f53384ab167a4eb
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
5 years agoASoC: Update driver for codec cx2072x
zhangjun [Mon, 20 Feb 2017 01:06:57 +0000 (09:06 +0800)]
ASoC: Update driver for codec cx2072x

1. codec into bias off mode when secondary standby
2. restore hw registers during a suspend/resume cycle.
(Note: codec power must be closed after suspend)

Change-Id: I530d59c161afa64bb2781bc12228ff3b60debd6f
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
5 years agoarm64: dts: rk3399: remove next
Huang, Tao [Mon, 20 Feb 2017 08:15:13 +0000 (16:15 +0800)]
arm64: dts: rk3399: remove next

Very small clean up.

Change-Id: Ie023404b11cec26bcb9ec5e1e7b7512351acb888
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
5 years agoarm64: dts: rk3399: rename android-next to android
Huang, Tao [Mon, 20 Feb 2017 07:58:42 +0000 (15:58 +0800)]
arm64: dts: rk3399: rename android-next to android

The md5sum is identical after rename, so this commit is safe.

Change-Id: I97cb5faecebaad9d2e9c39f67f19f662642cc5e8
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
5 years agoarm64: dts: rk3399: rename android to android-6.0
Huang, Tao [Mon, 20 Feb 2017 07:49:03 +0000 (15:49 +0800)]
arm64: dts: rk3399: rename android to android-6.0

Except dts of VR.
The md5sum is identical after rename, so this commit is safe.

Change-Id: I9ec324355ae67bbe2bb626090402ae797de13d92
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
5 years agoDocumentation: bindings: add otg-vbus-gpios property for Rockchip USB2PHY
Meng Dongyang [Wed, 15 Feb 2017 12:53:36 +0000 (20:53 +0800)]
Documentation: bindings: add otg-vbus-gpios property for Rockchip USB2PHY

Add otg-vbus-gpios optional property to assigned a gpio to
control vbus of otg port.

Change-Id: I257a53edc4d62543f8ac9c7591c29e7231227c20
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
5 years agophy: rockchip-inno-usb2: support to control vbus by gpio
Meng Dongyang [Mon, 23 Jan 2017 06:25:57 +0000 (14:25 +0800)]
phy: rockchip-inno-usb2: support to control vbus by gpio

The current code of u2phy set vbus level by set cable state of power
controller, so we can't control vbus level if the platform use gpio
to control vbus. This patch add gpio in u2phy driver and set vbus
level if the mode of usb is detect by u2phy.

Change-Id: I84e966b6e24cb9b6a199fcaad0c509fc003089de
Signed-off-by: Meng Dongyang <daniel.meng@rock-chips.com>
5 years agoarm64: dts: rockchip: Add bt sco audio support for rk3399-tve1205g
zhangjun [Wed, 15 Feb 2017 07:51:15 +0000 (15:51 +0800)]
arm64: dts: rockchip: Add bt sco audio support for rk3399-tve1205g

disable spdif support which is useless meanwhile

Change-Id: Ib116bac82d5d3d13392be2fb62eaf978a08592a0
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
5 years agoarm64: rockchip_defconfig: enable bt sco codec driver
zhangjun [Wed, 15 Feb 2017 07:14:27 +0000 (15:14 +0800)]
arm64: rockchip_defconfig: enable bt sco codec driver

Change-Id: I58d6f5ade04cbfcef436237ae3bc868b6045a9d5
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
5 years agoMALI: midgard: RK: adapt cores_pm in DDK r14 for solution_1_for_glitch
chenzhen [Fri, 10 Feb 2017 08:29:15 +0000 (16:29 +0800)]
MALI: midgard: RK: adapt cores_pm in DDK r14 for solution_1_for_glitch

Change-Id: I383779bd39d6ae52f65ad25bf2e0eb0f1a25dd00
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoMALI: rockchip: upgrade midgard DDK to r14p0-01rel0
chenzhen [Mon, 17 Oct 2016 11:38:36 +0000 (19:38 +0800)]
MALI: rockchip: upgrade midgard DDK to r14p0-01rel0

Along with a slight modification in mali_kbase_core_linux.c,
for building in rk Linux 4.4:
-#if KERNEL_VERSION(4, 6, 0) > LINUX_VERSION_CODE
+#if KERNEL_VERSION(4, 4, 0) > LINUX_VERSION_CODE

Change-Id: I34565cb975866b46c5e3a4d8e2ac5e350dcceb80
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoRevert "Revert "MALI: midgard: RK: not to power off all the pm cores""
chenzhen [Fri, 30 Dec 2016 11:56:52 +0000 (19:56 +0800)]
Revert "Revert "MALI: midgard: RK: not to power off all the pm cores""

This reverts commit d94880b547779baaaa9e9b733c38881cad8aa685.

Change-Id: Iac64d84ff5a7ee3e5666ed2829c17de413fc9bcd
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoRevert "MALI: midgard: RK: slowdown clk_gpu before poweroff cores"
chenzhen [Fri, 30 Dec 2016 11:56:50 +0000 (19:56 +0800)]
Revert "MALI: midgard: RK: slowdown clk_gpu before poweroff cores"

This reverts commit 89501d8dd3c214e4a162e94804f0d56c61c23237.

Change-Id: I403b63847da10bc2c5536bd26f692bafc849588e
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoRevert "MALI: midgard: avoid GPU voltage domain keeping the initial voltage"
chenzhen [Fri, 30 Dec 2016 11:56:48 +0000 (19:56 +0800)]
Revert "MALI: midgard: avoid GPU voltage domain keeping the initial voltage"

This reverts commit 57984d531806892a8e14bb7c1b42b1c4c406ddf9.

Change-Id: If538c9bbeb5d3fc7302f9683cb85f8acdd309a09
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoRevert "MALI: midgard: support sharing regulator with other devices"
chenzhen [Fri, 30 Dec 2016 11:56:42 +0000 (19:56 +0800)]
Revert "MALI: midgard: support sharing regulator with other devices"

This reverts commit 85b4e1dffa2e7a0bbd092d294043f19f82417d74.

Change-Id: Ie8fb980cb8a8b063dd6c9626d5b6c858b36f0976
Signed-off-by: chenzhen <chenzhen@rock-chips.com>
5 years agoarm64: dts: rockchip: add gmac support for rk3328-evb
david.wu [Fri, 20 Jan 2017 08:22:54 +0000 (16:22 +0800)]
arm64: dts: rockchip: add gmac support for rk3328-evb

Change-Id: I05e4eb2d904809a310b12f0de8ae274b90dd583a
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoarm64: dts: rockchip: add io-domain support for rk3328-evb
david.wu [Fri, 20 Jan 2017 08:20:19 +0000 (16:20 +0800)]
arm64: dts: rockchip: add io-domain support for rk3328-evb

Change-Id: I15fb97655419e723ce001b8900b413dac3e291e8
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoarm64: dts: rockchip: modify auto dp rayken hwrotation for rk3399-box-rev2-disvr dts
Luo wei [Fri, 17 Feb 2017 08:10:36 +0000 (16:10 +0800)]
arm64: dts: rockchip: modify auto dp rayken hwrotation for rk3399-box-rev2-disvr dts

Change-Id: Ia5fc077acba519c07f58456fde0257e313181197
Signed-off-by: Luo wei <lw@rock-chips.com>
5 years agoclk: rockchip: rk3328: add SCLK_HDMI_SFC id
Elaine Zhang [Fri, 17 Feb 2017 08:36:44 +0000 (16:36 +0800)]
clk: rockchip: rk3328: add SCLK_HDMI_SFC id

Change-Id: Ic876175272cba40093e555ee815e9261bb39d510
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoarm64: dts: rockchip: add pwm support for rk3328
david.wu [Fri, 20 Jan 2017 08:09:13 +0000 (16:09 +0800)]
arm64: dts: rockchip: add pwm support for rk3328

Change-Id: I20d150fb258f9eb7f09623189551b982b641e7ad
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agopwm: rockchip: need the Distinguish between rk3328 and rk3288 for clk used
david.wu [Fri, 17 Feb 2017 08:21:19 +0000 (16:21 +0800)]
pwm: rockchip: need the Distinguish between rk3328 and rk3288 for clk used

Change-Id: Ib6274a200640ab8829a99761ffbf60d530fe5653
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoBluetooth: update rtk_btusb driver to v 4.1.2
huweiguo [Fri, 17 Feb 2017 08:20:00 +0000 (16:20 +0800)]
Bluetooth: update rtk_btusb driver to v 4.1.2

Change-Id: I3627b1938c734cfe4ce32c269798037dc1ff8a32
Signed-off-by: huweiguo <hwg@rock-chips.com>
5 years agomfd: rk808: add sysfs debug node "/sys/rk8xx/rk8xx_dbg"
chenjh [Wed, 15 Feb 2017 11:48:03 +0000 (19:48 +0800)]
mfd: rk808: add sysfs debug node "/sys/rk8xx/rk8xx_dbg"

Change-Id: I197dc97b7337414a7d52426da0e0cb8c7480c917
Signed-off-by: chenjh <chenjh@rock-chips.com>
5 years agoarm64: dts: rockchip: add gmac support for rk3328
david.wu [Fri, 20 Jan 2017 08:12:04 +0000 (16:12 +0800)]
arm64: dts: rockchip: add gmac support for rk3328

Change-Id: If46e67a05e2a54462b1a83433018385c5f52942c
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoarm64: dts: rockchip: change the compatible for rk3328 i2c
david.wu [Fri, 20 Jan 2017 08:07:47 +0000 (16:07 +0800)]
arm64: dts: rockchip: change the compatible for rk3328 i2c

Change-Id: I02e7c4088a7a14e233ce2fd907d6a249c18f3a7d
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoi2c: rk3x: Don't need to add rk3328 i2c compitiable
david.wu [Fri, 20 Jan 2017 08:01:49 +0000 (16:01 +0800)]
i2c: rk3x: Don't need to add rk3328 i2c compitiable

Change-Id: I32f9698fcfdce4ecd40b9be7b2ab7ffd82651b9b
Signed-off-by: david.wu <david.wu@rock-chips.com>
5 years agoarm64: dts: rockchip: enable usb3 controller for rk3328-evb
William Wu [Wed, 15 Feb 2017 13:34:52 +0000 (21:34 +0800)]
arm64: dts: rockchip: enable usb3 controller for rk3328-evb

Change-Id: I49c152476f6c87195e6b68a9477d84d8bfcc1a70
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: dwc3: add a new glue layer for rockchip SoCs with INNO PHY
William Wu [Wed, 15 Feb 2017 13:24:23 +0000 (21:24 +0800)]
usb: dwc3: add a new glue layer for rockchip SoCs with INNO PHY

This patch add a rockchip specific glue layer to support
USB 3.0 HOST only mode for rockchip USB 3.0 core wrapper
consisting of USB 3.0 controller IP from Synopsys and USB
3.0 PHY IP from Innosilicon.

With this patch, we can support for XHCI integrated in
DWC3 IP on rockchip platforms. Because some INNO USB 3.0
PHY can't detect disconnection by PHY IP, and cause USB3
device unrecognized when replugged again. So we depend on
the HUB core driver to detect the disconnection, and send
notifier to DWC3 driver from USB PHY driver, then we can
do phy reset and remove/add hcd to reinit HCD.

Change-Id: I6972c6f9f8f7160dbd74ad531b843a65ccec5dc0
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: dts: rockchip: add usb3 controller node for rk3328
William Wu [Wed, 15 Feb 2017 13:20:33 +0000 (21:20 +0800)]
arm64: dts: rockchip: add usb3 controller node for rk3328

Change-Id: I350f46a839ec2266a129c8902aebe3a0480c074d
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: dwc3: rockchip-inno: add devicetree bindings documentation
William Wu [Wed, 15 Feb 2017 13:16:18 +0000 (21:16 +0800)]
usb: dwc3: rockchip-inno: add devicetree bindings documentation

This patch adds the devicetree documentation required for Rockchip
USB 3.0 core wrapper consisting of USB 3.0 controller IP from Synopsys
and USB 3.0 PHY IP from Innosilicon.

It supports DRD mode, and could operate in device mode (SS, HS, FS)
and host mode (SS, HS, FS, LS).

Change-Id: Ia240627c31cd3ff2f2d7f1a1faa9c7d88207d04f
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agophy: rockchip-inno-usb3: workaround for USB3 PHY disconnection det issue
William Wu [Wed, 15 Feb 2017 13:12:31 +0000 (21:12 +0800)]
phy: rockchip-inno-usb3: workaround for USB3 PHY disconnection det issue

The rk322xh USB3 PHY has a problem to detect disconnection,
it loses the ability to detect an absence of a far-end
receiver termination specified in USB3 spec Table 6-21,
and this causes the linkstate to change between SS.Inactive
and Polling state, but not return to correct state Rx.detect.

To workaround this bug, we depends on the hub_event to
detect the port linkstate change and do soft disconnect.
And then do USB3 PHY reset and reinit HCD to recovery
the whole USB3.

The workaround process is:
Plug out USB3 device -> hub_event detect PLC and find
USB 3.0 port in the Inactive -> call usb_remove_device()
to do soft disconnect -> call usb_phy_notify_connect()
-> send notifier to DWC3 controller driver to do USB3
PHY reset and reinit HCD.

Change-Id: Icb975581c6fbbb34a7da90ddca47e04a46e5da48
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agophy: rockchip-inno-usb3: select USB_PHY
William Wu [Wed, 15 Feb 2017 13:04:22 +0000 (21:04 +0800)]
phy: rockchip-inno-usb3: select USB_PHY

Some rockchip SoCs (e.g. rk322xh/rk3328) integrated with
INNO USB 3.0 PHY have a problem to detect disconnection
correctly. So we need to depend on the usb phy framework
to handle the disconnection.

Change-Id: Ie3bd015c89e1fb8d46f69fe8d274e29462bfb763
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: dts: rockchip: enable usb3 phy for rk3328-evb
William Wu [Wed, 15 Feb 2017 09:31:22 +0000 (17:31 +0800)]
arm64: dts: rockchip: enable usb3 phy for rk3328-evb

Change-Id: I5ab06e9db355575e828ce004c1d3ce65e4717c95
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: rockchip_linux_defconfig: enable INNO USB 3.0 PHY
William Wu [Wed, 15 Feb 2017 09:23:33 +0000 (17:23 +0800)]
arm64: rockchip_linux_defconfig: enable INNO USB 3.0 PHY

Change-Id: I4eb6f75fa0149fb40a3acc5aa6425b1efdf14239
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agophy: rockchip-inno-usb3: add a new driver for Rockchip USB 3.0 PHY
William Wu [Wed, 15 Feb 2017 09:19:14 +0000 (17:19 +0800)]
phy: rockchip-inno-usb3: add a new driver for Rockchip USB 3.0 PHY

This patch implements a USB 3.0 PHY driver for Rockchip
platform (e.g. rk3328) with Innosilicon IP block.

Change-Id: Ia6ed5df6b7b9eecebd5a5c8a4c4a6df7d26b7422
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoarm64: dts: rockchip: add usb3 phy nodes for rk3328
William Wu [Wed, 15 Feb 2017 09:11:46 +0000 (17:11 +0800)]
arm64: dts: rockchip: add usb3 phy nodes for rk3328

This patch adds USB 3.0 PHY grf node and apb node
for rk3328 USB 3.0 module.

Change-Id: I9d4e6c6d6792ac5fd6c2a4d7cc902f1ff0cf4ef1
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoDocumentation: bindings: add dt doc for Rockchip USB 3.0 PHY
William Wu [Wed, 15 Feb 2017 09:03:11 +0000 (17:03 +0800)]
Documentation: bindings: add dt doc for Rockchip USB 3.0 PHY

This patch adds a binding that describes the Rockchip USB 3.0
PHY designed by Innosilicon.

Change-Id: Ia5b9f18743c7a7ed1b9d33420608a2f12a086aee
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agousb: dwc3: rockchip: delete unused binding documentation
William Wu [Wed, 15 Feb 2017 08:56:08 +0000 (16:56 +0800)]
usb: dwc3: rockchip: delete unused binding documentation

We have cherry-pick new binding documentation for dwc3
from upstream, so delete the legacy one.

Change-Id: I292447c96c741445669139478c769e356d1b8d9e
Signed-off-by: William Wu <wulf@rock-chips.com>
5 years agoblock/partitions/rk: extend the property setting for NVMe
Shawn Lin [Tue, 14 Feb 2017 06:50:02 +0000 (14:50 +0800)]
block/partitions/rk: extend the property setting for NVMe

In order not to cause ABI regression, let's invent a new
androidboot.mode for NVMe instead. Just elaborate a bit more
that we now doesn't support mtd devices, otherwise we should
rework it to make it more scalable.

Change-Id: I115ffd0e5c4986f2e76fcbcf6700c31f297f7950
Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
5 years agoclk: rockchip: rk3328: fix up the describe error for aclk_usb3otg
Elaine Zhang [Thu, 16 Feb 2017 01:19:53 +0000 (09:19 +0800)]
clk: rockchip: rk3328: fix up the describe error for aclk_usb3otg

Change-Id: Ie323c8934205bf71360d779717bb3e34c36a9dc6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoarm64: dts: rockchip: Fix indentation of rk3399-android-next
Huang, Tao [Thu, 16 Feb 2017 02:08:29 +0000 (10:08 +0800)]
arm64: dts: rockchip: Fix indentation of rk3399-android-next

Change-Id: I93cce96446bd89634eef21e1dae633734660c686
Signed-off-by: Huang, Tao <huangtao@rock-chips.com>
5 years agoASoC: bt-sco: Compatible stereo format
zhangjun [Wed, 15 Feb 2017 06:14:25 +0000 (14:14 +0800)]
ASoC: bt-sco: Compatible stereo format

Compatible the platform which unsupported mono channel

Change-Id: Ica417b0c544b0750e6367fdeab45254542135bc4
Signed-off-by: zhangjun <zhangjun@rock-chips.com>
5 years agovideo: rockchip: hdmi: add dts property rockchip,defaultdepth
Zheng Yang [Tue, 7 Feb 2017 06:42:50 +0000 (14:42 +0800)]
video: rockchip: hdmi: add dts property rockchip,defaultdepth

To modify hdmi default output color depth, use following dts:

&hdmi {
rockchip,defaultdepth = <10>;
}

rockchip,defaultdepth could be following value:
<0>  auto select color depth, prefer 8bit
<8>  8bit
<10> 10bit

Change-Id: Idce0bd080c042edf3939c5c38b76d4d1860b7a9f
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 905228ba1e43c24b3048820a7f1047a4ed5ef185)

5 years agovideo: rockchip: hdmi: support set hdr metedata
Zheng Yang [Tue, 27 Dec 2016 03:53:14 +0000 (11:53 +0800)]
video: rockchip: hdmi: support set hdr metedata

Use following command to set hdr metadata:

cd /sys/class/display/HDMI
echo "hdrmdata=1 2 3 4 5 6 7 8 9 10 11 12" > color

Use following command to get current hdr metadata

cat /sys/class/display/HDMI/color

Change-Id: I81a5000801b558728689be912c1a642f3b237e65
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 09210b8aa1881935d31be8a4d9e2574a026512b3)

5 years agovideo: rockchip: hdmi: support modify color mode and depth simultaneously
Zheng Yang [Fri, 25 Nov 2016 07:17:36 +0000 (15:17 +0800)]
video: rockchip: hdmi: support modify color mode and depth simultaneously

Use following command:

echo mode=<value> > /sys/class/display/HDMI/mode

<value> is decimal digits, lower 8bit is color mode, upper 8bit is depth.
For example:
value = 131 = 0x83 means YCbCr444 8bit output
value = 164 = 0xa4 means YCbCr422 10bit output
value = 0 means restore auto mode(8bit, priority YCbCr444)

Change-Id: I256906d91f7075defb4d785cfc15926ca5627093
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit c3620a88e55c3ade4a823adea08b0bb2acc4737e)

5 years agovideo: rockchip: hdmi: fix compile warning
Zheng Yang [Fri, 2 Dec 2016 06:04:44 +0000 (14:04 +0800)]
video: rockchip: hdmi: fix compile warning

fix warning: switch condition has boolean value [-Wswitch-bool]

Change-Id: I11d7a9fe2a07f6681dacf4a1d800b16497339297
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 66f72e45db8d12d4c5049de6c6fb9aae67a30fe6)

5 years agovideo: rockchip: hdmi: v2: fix some format check error
Zheng Yang [Tue, 22 Nov 2016 08:01:28 +0000 (16:01 +0800)]
video: rockchip: hdmi: v2: fix some format check error

Change-Id: I3432060aed93ccf8745fa7afebd0a5322f8d4121
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit d3dfca100edae96339c2a9b7674dd3b715f2b18e)

5 years agovideo: rockchip: hdmi: fix can not disable hdr error
Zheng Yang [Fri, 18 Nov 2016 09:16:15 +0000 (17:16 +0800)]
video: rockchip: hdmi: fix can not disable hdr error

Change-Id: I53f809d78a8a151a6b6985266ec73026bdc0b3a2
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit b60715d9a028e849bd40a0f1a9693f0519e66f06)

5 years agovideo: rockchip: hdmi: fix CTS HF1-53 HDR test
Zheng Yang [Wed, 16 Nov 2016 11:26:24 +0000 (19:26 +0800)]
video: rockchip: hdmi: fix CTS HF1-53 HDR test

1. HDR MetaData HB2 is 26.
2. Under HF1-53, HDR MetaData should be sent and
PB1 value should be exist in EDID.

Change-Id: I616b4cdcf321ea0080b845c868d1f4cd4881fd14
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 39c34527e735b84e6ceb8a2e386aed0060111858)

5 years agovideo: rockchip: hdmi: improve hdr function when out of sink tmds clk
Zheng Yang [Wed, 16 Nov 2016 09:05:47 +0000 (17:05 +0800)]
video: rockchip: hdmi: improve hdr function when out of sink tmds clk

If output tmdsclk is out of sink max tmds clk, we need to set output
mode to 8bit or YCbCr422.

For example, sink max tmds clk is 600M, but 3840x2160p-60 10bit tmdsclk
is 594*1.25 > 600, we set output mode to YCbCr422 10bit which tmds clk
is 594, so we can get max picture quality.

Change-Id: I13fe30dad06757ec52de8d367f1e10a56e63ad92
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 0c3397a9b8b4da4ca3a67e5a6d88abf20f00f184)

5 years agovideo: rockchip: hdmi: enable hdr when resolution is not 4K
Zheng Yang [Wed, 16 Nov 2016 09:04:54 +0000 (17:04 +0800)]
video: rockchip: hdmi: enable hdr when resolution is not 4K

Change-Id: If3ab93cd0ef822c82d6d482cb3ed2dc29f6613d8
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 62a423c5a074a895b1f92f3ceecf4f4ba5d8253a)

5 years agovideo: rockchip: hdmi: support hdr function
Zheng Yang [Fri, 7 Oct 2016 07:38:32 +0000 (15:38 +0800)]
video: rockchip: hdmi: support hdr function

HDR is introduced by HDMI2.0a, which need parsing HDR Static
Metedata data Block defined in EDID, and send Dynamic Range
and Mastering InfoFrame to inform TV to switch to HDR mode.

If TV support HDR, it's EOTF is shown in sysfs node
/sys/class/display/HDMI/color with key word "Supported EOTF:".

For example, "Support EOTF: 0x7" means support following EOTF:
BIT0: Traditional gamma - SDR
BIT1: Traditional gamma - HDR
BIT2: ST_2084

To switch eotf mode, you can use following command:
echo hdr=value > /sys/class/display/HDMI/color
value could be:
0 - Disable sending Dynamic Range and Mastering InfoFrame
1 - Traditional gamma - SDR
2 - Traditional gamma - HDR
4 - ST_2084
0、1 both means SDR mode, 4 is HDR10/Dolby HDR mode.

Change-Id: Ia3d19bbca9b9368cde8dcb11265fbff4684ac603
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 08ea9d12f34f8ea6f79bdd5b7eb1ff74d2cd796f)

5 years agovideo: rockchip: hdmi: change the way to enable debug log
Shen Zhenyi [Thu, 29 Sep 2016 07:16:54 +0000 (15:16 +0800)]
video: rockchip: hdmi: change the way to enable debug log

user can change hdmi_dbg_level value to printf log which you want.
1 : cec
2 : hdmi
3 : hdcp
such as, echo 2 > /sys/module/rockchip_hdmi_sysfs/parameters/hdmi_dbg_level

Change-Id: Iaa5a66c2926789694e0d544196bedc81fb3a755a
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 919cb0208a877a1b80bf4171d479f36c9a2dbca2)

5 years agovideo: rockchip: hdmi: contrast uboot and kernel resolution
Shen Zhenyi [Fri, 22 Jul 2016 08:04:02 +0000 (16:04 +0800)]
video: rockchip: hdmi: contrast uboot and kernel resolution

When box is starting, if kernel resolution is different from uboot,
need to clear hdmi->uboot

Change-Id: Iec56862fe20dcaccc12fefae21de55b56ab2fe54
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 899bf65ac08492fc5aec36a1b23509baa008d409)

5 years agovideo: rockchip: hdmi: yuv420 resolution retain 4K 50/60HZ
Shen Zhenyi [Mon, 20 Jun 2016 03:35:42 +0000 (11:35 +0800)]
video: rockchip: hdmi: yuv420 resolution retain 4K 50/60HZ

Change-Id: I75ae87bbd274af10b7da9b6699d5892e6f864dba
Signed-off-by: Shen Zhenyi <szy@rock-chips.com>
(cherry picked from commit 6acb6585c03dd4bf7eaf2a548cb3f836070ba56c)

5 years agovideo: rockchip: hdmi: delete cec grf register operation
Zheng Yang [Thu, 18 Feb 2016 02:08:58 +0000 (10:08 +0800)]
video: rockchip: hdmi: delete cec grf register operation

CEC GRF register can be replaced by hdmi cec register
CEC_CTRL BIT 5.

Change-Id: Ic27eb242e23c4a9b4de6a77032372eac11b5247c
Signed-off-by: Zheng Yang <zhengyang@rock-chips.com>
(cherry picked from commit 3a94990c47760102a6b314e7b83c75c86af788e6)

5 years agoRevert "mfd: fusb302: avoid sending notifier to USB/DP during PM suspend"
Elaine Zhang [Tue, 10 Jan 2017 08:40:55 +0000 (16:40 +0800)]
Revert "mfd: fusb302: avoid sending notifier to USB/DP during PM suspend"

This reverts commit 082f43af91698a82583053679ec0d0be89b36b2d.

Change-Id: Iae816df6de573c03cf87b0091fb920c4673dbb54
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoPM / Domains: Keep the pd status during system PM phases
Elaine Zhang [Thu, 12 Jan 2017 08:12:31 +0000 (16:12 +0800)]
PM / Domains: Keep the pd status during system PM phases

If a PM domain is powered off before system suspend,
we hope do nothing in system runtime suspend noirq phase
and system runtime resume noirq phase.

Change-Id: Id72b1f92e10449c48006aced0d49612637402210
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoUPSTREAM: PM / Domains: Allow runtime PM during system PM phases
Ulf Hansson [Mon, 30 May 2016 09:33:13 +0000 (11:33 +0200)]
UPSTREAM: PM / Domains: Allow runtime PM during system PM phases

In cases when a PM domain isn't powered off when genpd's ->prepare()
callback is invoked, genpd runtime resumes and disables runtime PM for the
device. This behaviour was needed when genpd managed intermediate states
during the power off sequence, as to maintain proper low power states of
devices during system PM suspend/resume.

Commit ba2bbfbf6307 (PM / Domains: Remove intermediate states from the
power off sequence), enables genpd to improve its behaviour in that
respect.

The PM core disables runtime PM at __device_suspend_late() before it calls
a system PM "late" callback for a device. When resuming a device, after a
corresponding "early" callback has been invoked, the PM core re-enables
runtime PM.

By changing genpd to allow runtime PM according to the same system PM
phases as the PM core, devices can be runtime resumed by their
corresponding subsystem/driver when really needed.

In this way, genpd no longer need to runtime resume the device from its
->prepare() callback. In most cases that avoids unnecessary and energy-
wasting operations of runtime resuming devices that have nothing to do,
only to runtime suspend them shortly after.

Although, because of changing this behaviour in genpd and due to that
genpd powers on the PM domain unconditionally in the system PM resume
"noirq" phase, it could potentially cause a PM domain to stay powered
on even if it's unused after the system has resumed. To avoid this,
schedule a power off work when genpd's system PM ->complete() callback
has been invoked for the last device in the PM domain.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 4d23a5e84806b202d9231929c9507ef7cf7a0185)

Change-Id: I195392386758b1320107d17f4e54c3c220263a9c
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoUPSTREAM: PM / Domains: Remove redundant pm_request_idle() call in genpd
Ulf Hansson [Mon, 30 May 2016 09:33:11 +0000 (11:33 +0200)]
UPSTREAM: PM / Domains: Remove redundant pm_request_idle() call in genpd

The PM core increases the runtime PM usage count at the system PM prepare
phase. Later when the system resumes, it does a pm_runtime_put() in the
complete phase, which in addition to decrementing the usage count, does
the equivalent of a pm_request_idle().

Therefore the call to pm_request_idle() from within genpd's ->complete()
callback is redundant, so remove it.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 9b002b8f0e386966dfc2dddf47eebed3b71ef876)

Change-Id: I3b6b3cb1b7675f7a9579b57d801efa5ea55c0e4e
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoUPSTREAM: PM / Domains: Remove redundant wrapper functions for system PM
Ulf Hansson [Mon, 30 May 2016 09:43:08 +0000 (11:43 +0200)]
UPSTREAM: PM / Domains: Remove redundant wrapper functions for system PM

Due to the previous changes in genpd, which removed the suspend_power_off
flag, several of the system PM callbacks no longer do any additional
checks but only invoke corresponding pm_generic_* helper functions.

To clean up the code, drop these wrapper functions as they have
become redundant. Instead, assign the system PM callbacks directly
to the pm_generic_*() helper functions.

While changing this, it has bocame clear that some of the current
system PM callbacks in genpd invoke wrong driver callbacks. For
example, the genpd's ->restore() callback invokes pm_generic_resume(),
while that should be pm_generic_restore(). Fix that as well.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 800188538965d90759cea13bcb4f87a214cf5c53)

Change-Id: I463cc0a8c4d6d2e69dd320ff58af3cf2e999e6ee
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoUPSTREAM: PM / Domains: Allow genpd to power on during system PM phases
Ulf Hansson [Mon, 30 May 2016 09:43:07 +0000 (11:43 +0200)]
UPSTREAM: PM / Domains: Allow genpd to power on during system PM phases

If a PM domain is powered off when the first device starts its system PM
prepare phase, genpd prevents any further attempts to power on the PM
domain during the following system PM phases. Not until the system PM
complete phase is finalized for all devices in the PM domain, genpd again
allows it to be powered on.

This behaviour needs to be changed, as a subsystem/driver for a device in
the same PM domain may still need to be able to serve requests in some of
the system PM phases. Accordingly, it may need to runtime resume its
device and thus also request the corresponding PM domain to be powered on.

To deal with these scenarios, let's make the device operational in the
system PM prepare phase by runtime resuming it, no matter if the PM domain
is powered on or off. Changing this also enables us to remove genpd's
suspend_power_off flag, as it's being used to track this condition.
Additionally, we must allow the PM domain to be powered on via runtime PM
during the system PM phases.

This change also requires a fix in the AMD ACP (Audio CoProcessor) drm
driver. It registers a genpd to model the ACP as a PM domain, but
unfortunately it's also abuses genpd's "internal" suspend_power_off flag
to deal with a corner case at system PM resume.

More precisely, the so called SMU block powers on the ACP at system PM
resume, unconditionally if it's being used or not. This may lead to that
genpd's internal status of the power state, may not correctly reflect the
power state of the HW after a system PM resume.

Because of changing the behaviour of genpd, by runtime resuming devices in
the prepare phase, the AMD ACP drm driver no longer have to deal with this
corner case. So let's just drop the related code in this driver.

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Reviewed-by: Kevin Hilman <khilman@baylibre.com>
Acked-by: Maruthi Bayyavarapu <maruthi.bayyavarapu@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 39dd0f234fc37da071dadbd9b49fe800d62139b4)

Change-Id: I1c964ebd660c8c7a8547f2206c80c25b936e7196
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
5 years agoUPSTREAM: PM / Domains: Drop unnecessary wakeup code from pm_genpd_prepare()
Ulf Hansson [Tue, 26 Apr 2016 06:47:18 +0000 (08:47 +0200)]
UPSTREAM: PM / Domains: Drop unnecessary wakeup code from pm_genpd_prepare()

As the PM core already have wakeup management during the system PM phase,
it seems reasonable that genpd and its users should be able to rely on
that. Therefore let's remove this from pm_genpd_prepare().

Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
(cherry picked from commit 164a2159a2d6789bc7e3c4b126dde7f3ce865992)

Change-Id: I39f72aa82468327c01b4533d177f797bf2da59a6
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>