From: Rocky Hao <rocky.hao@rock-chips.com>
Date: Thu, 30 Mar 2017 03:46:15 +0000 (+0800)
Subject: arm64: dts: rockchip: add tsadc's working clock rate for rk3288
X-Git-Tag: firefly_0821_release~46
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=commitdiff_plain;h=b913ab69f93fda49fba500188823593f140e724f;ds=inline

arm64: dts: rockchip: add tsadc's working clock rate for rk3288

add tsadc's working clock rate for rk3288. if not set, tsadc
will work at the default rate of 1k hz.

Change-Id: I1b26351c3fb97f5ceb4657c2356c2f5649ad140c
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
---

diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 1947ef8f9ceb..f7601f4f7bed 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -610,6 +610,8 @@
 		interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
 		clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
 		clock-names = "tsadc", "apb_pclk";
+		assigned-clocks = <&cru SCLK_TSADC>;
+		assigned-clock-rates = <10000>;
 		resets = <&cru SRST_TSADC>;
 		reset-names = "tsadc-apb";
 		pinctrl-names = "init", "default", "sleep";