From: Elaine Zhang <zhangqing@rock-chips.com>
Date: Tue, 11 Apr 2017 03:08:15 +0000 (+0800)
Subject: clk: rockchip: add ACLK_VIO0\1 HCLK_VIO id for rk3288 vio
X-Git-Tag: firefly_0821_release~52
X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=commitdiff_plain;h=40b3da4859eaa72bd507ad689313e3eaf4621729

clk: rockchip: add ACLK_VIO0\1 HCLK_VIO id for rk3288 vio

Add the needed id for the vio clock.

Change-Id: I2c4009d8214e1560da1213f224610882c2cd06e7
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
---

diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock/rk3288-cru.h
index fb95e737ffc5..237bd1d43d67 100644
--- a/include/dt-bindings/clock/rk3288-cru.h
+++ b/include/dt-bindings/clock/rk3288-cru.h
@@ -116,6 +116,8 @@
 #define ACLK_VCODEC		208
 #define ACLK_CPU		209
 #define ACLK_PERI		210
+#define ACLK_VIO0		211
+#define ACLK_VIO1		212
 
 /* pclk gates */
 #define PCLK_GPIO0		320
@@ -204,8 +206,9 @@
 #define HCLK_CPU		477
 #define HCLK_PERI		478
 #define HCLK_USB_PERI		479
+#define HCLK_VIO		480
 
-#define CLK_NR_CLKS		(HCLK_PERI + 1)
+#define CLK_NR_CLKS		(HCLK_VIO + 1)
 
 /* soft-reset indices */
 #define SRST_CORE0		0