UPSTREAM: clk: rockchip: fix warning reported by kernel-doc

./scripts/kernel-doc -man -v drivers/clk/rockchip/clk.h > /dev/null

drivers/clk/rockchip/clk.h:133: warning: missing initial short
description on line:
 * struct rockchip_clk_provider: information about clock provider
drivers/clk/rockchip/clk.h:133: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:164: warning: missing initial short
description on line:
 * struct rockchip_pll_clock: information about pll clock
drivers/clk/rockchip/clk.h:164: info: Scanning doc for struct
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'parent_names'
drivers/clk/rockchip/clk.h:194: warning: No description found for
parameter 'num_parents'
drivers/clk/rockchip/clk.h:194: warning: Excess struct/union/enum/typedef
member 'parent_name' description in 'rockchip_pll_clock'
drivers/clk/rockchip/clk.h:235: warning: missing initial short
description on line:
 * struct rockchip_cpuclk_reg_data: describes register offsets and
masks of the cpuclock

Signed-off-by: Shawn Lin <shawn.lin@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git
v4.7-clk/next commit 1c908b320055e1ce706e91121dbb2ce7934c788f)

Change-Id: I18dbd45ebd528fe2a871c98a1561dd0c0bf41e13
Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>

diff --git a/drivers/clk/rockchip/clk.h b/drivers/clk/rockchip/clk.h
index fec084bbb749d15aa9cf033f4dad9ecbc41e85cb..836e488989ad68bebaa017881cb542d2e8869a53 100644 (file)
--- a/drivers/clk/rockchip/clk.h
+++ b/drivers/clk/rockchip/clk.h
@@ -121,7 +121,7 @@ enum rockchip_pll_type {
 }
 
 /**
 }
 
 /**

- * struct rockchip_clk_provider: information about clock provider
+ * struct rockchip_clk_provider - information about clock provider

  * @reg_base: virtual address for the register base.
  * @clk_data: holds clock related data like clk* and number of clocks.
  * @cru_node: device-node of the clock-provider
  * @reg_base: virtual address for the register base.
  * @clk_data: holds clock related data like clk* and number of clocks.
  * @cru_node: device-node of the clock-provider


@@ -152,10 +152,11 @@ struct rockchip_pll_rate_table {
 };
 
 /**
 };
 
 /**

- * struct rockchip_pll_clock: information about pll clock
+ * struct rockchip_pll_clock - information about pll clock

  * @id: platform specific id of the clock.
  * @name: name of this pll clock.
  * @id: platform specific id of the clock.
  * @name: name of this pll clock.

- * @parent_name: name of the parent clock.
+ * @parent_names: name of the parent clock.
+ * @num_parents: number of parents

  * @flags: optional flags for basic clock.
  * @con_offset: offset of the register for configuring the PLL.
  * @mode_offset: offset of the register for configuring the PLL-mode.
  * @flags: optional flags for basic clock.
  * @con_offset: offset of the register for configuring the PLL.
  * @mode_offset: offset of the register for configuring the PLL-mode.


@@ -223,7 +224,7 @@ struct rockchip_cpuclk_rate_table {
 };
 
 /**
 };
 
 /**

- * struct rockchip_cpuclk_reg_data: describes register offsets and masks of the cpuclock
+ * struct rockchip_cpuclk_reg_data - describes register offsets and masks of the cpuclock

  * @core_reg:          register offset of the core settings register
  * @div_core_shift:    core divider offset used to divide the pll value
  * @div_core_mask:     core divider mask
  * @core_reg:          register offset of the core settings register
  * @div_core_shift:    core divider offset used to divide the pll value
  * @div_core_mask:     core divider mask