arm64: dts: rk3368: assign clock rates for aclk_vop and hclk_vop

Change-Id: I1d8559f09cd2df516aa8d479aa1b7407418916aa
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 39ba7d713bde93a349f75cfd3b651efbaac1c18d..19913eaa00e70f761201622f09c0b1f11e989563 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1142,6 +1142,8 @@
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
                interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru ACLK_VOP>, <&cru DCLK_VOP>, <&cru HCLK_VOP>;
                clock-names = "aclk_vop", "dclk_vop", "hclk_vop";

+               assigned-clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
+               assigned-clock-rates = <400000000>, <200000000>;

                resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
                reset-names = "axi", "ahb", "dclk";
                power-domains = <&power RK3368_PD_VIO>;
                resets = <&cru SRST_LCDC0_AXI>, <&cru SRST_LCDC0_AHB>, <&cru SRST_LCDC0_DCLK>;
                reset-names = "axi", "ahb", "dclk";
                power-domains = <&power RK3368_PD_VIO>;