arm64: dts: rockchip: Add reset property for rk3368 mipi

Change-Id: I12a3bf9cdd61c6da3d0675d68d4ffd9bbfd9ffd8
Signed-off-by: WeiYong Bi <bivvy.bi@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
index 1ae4689629522c052a1b3a6ad9383a92c4fa4e53..6d5372dc06f7c182c168ae1c680519fb8755da05 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi
@@ -1341,6 +1341,8 @@
                interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru PCLK_MIPI_DSI0>;
                clock-names = "pclk";
+               resets = <&cru SRST_MIPIDSI0>;
+               reset-names = "apb";
                phys = <&mipi_dphy>;
                phy-names = "mipi_dphy";
                rockchip,grf = <&grf>;
@@ -1349,17 +1351,9 @@
                #size-cells = <0>;
                status = "disabled";
 
-               ports@1 {
-                       #address-cells = <1>;
-                       #size-cells = <0>;
-                       reg = <1>;
-
-                       mipi_in: port {
-                               #address-cells = <1>;
-                               #size-cells = <0>;
-
-                               mipi_in_vop: endpoint@0 {
-                                       reg = <0>;
+               ports {
+                       port {
+                               mipi_in_vop: endpoint {
                                        remote-endpoint = <&vop_out_mipi>;
                                };
                        };
@@ -1372,6 +1366,8 @@
                #phy-cells = <0>;
                clocks = <&cru SCLK_MIPIDSI_24M>, <&cru PCLK_DPHYTX0>;
                clock-names = "ref", "pclk";
+               resets = <&cru SRST_MIPIDPHYTX>;
+               reset-names = "apb";
                status = "disabled";
        };