drm/rockchip: enable pm_runtime after clock enable

Power domain recommand order is that:
  -> enable clock
  -> pm_runtime_get_sync
  -> pm_runtime_put
  -> disable clock

Change-Id: Ia8d5c961afe8da6407a7cca1e48696a285460686
Signed-off-by: Mark Yao <mark.yao@rock-chips.com>

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index 544a51cfccb0b51dc066c30a0f725db7fae65ae5..c9a521412fb979409aad11327c75f41ad8b7f447 100644 (file)
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -468,12 +468,6 @@ static void vop_enable(struct drm_crtc *crtc)
        if (vop->is_enabled)
                return;
 
-       ret = pm_runtime_get_sync(vop->dev);
-       if (ret < 0) {
-               dev_err(vop->dev, "failed to get pm runtime: %d\n", ret);
-               return;
-       }
-
        ret = clk_enable(vop->hclk);
        if (ret < 0) {
                dev_err(vop->dev, "failed to enable hclk - %d\n", ret);
@@ -492,6 +486,12 @@ static void vop_enable(struct drm_crtc *crtc)
                goto err_disable_dclk;
        }
 
+       ret = pm_runtime_get_sync(vop->dev);
+       if (ret < 0) {
+               dev_err(vop->dev, "failed to get pm runtime: %d\n", ret);
+               return;
+       }
+
        /*
         * Slave iommu shares power, irq and clock with vop.  It was associated
         * automatically with this master device via common driver code.
@@ -582,10 +582,10 @@ static void vop_crtc_disable(struct drm_crtc *crtc)
         */
        rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev);
 
+       pm_runtime_put(vop->dev);
        clk_disable(vop->dclk);
        clk_disable(vop->aclk);
        clk_disable(vop->hclk);
-       pm_runtime_put(vop->dev);
 }
 
 static void vop_plane_destroy(struct drm_plane *plane)