ARM64: dts: rockchip: rk3399: add cpul/cpub assingment clk rate

set clk_cpul:816M clk_cpub:1008M when clk tree init

Change-Id: I8f493ce8479fc670aa05d651db5be354d6870c98
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index 2c206bf0d9791660ff1fc0f956c249636538fccc..09a7e668cf16e5204bf29ca52bab31e9b6e54009 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -857,6 +857,7 @@
                #clock-cells = <1>;
                #reset-cells = <1>;
                assigned-clocks =
+                       <&cru ARMCLKL>, <&cru ARMCLKB>,
                        <&cru PLL_GPLL>, <&cru PLL_CPLL>,
                        <&cru PLL_NPLL>,
                        <&cru ACLK_PERIHP>, <&cru HCLK_PERIHP>,
@@ -865,6 +866,7 @@
                        <&cru PCLK_PERILP0>,
                        <&cru HCLK_PERILP1>, <&cru PCLK_PERILP1>;
                assigned-clock-rates =
+                        <816000000>, <1008000000>,
                         <594000000>,  <800000000>,
                        <1000000000>,
                         <150000000>,   <75000000>,