ARM: dts: rockchip: add ddr related node for rk3288
authorJacob Chen <jacob2.chen@rock-chips.com>
Wed, 11 Jan 2017 06:45:57 +0000 (14:45 +0800)
committerJacob Chen <jacob2.chen@rock-chips.com>
Thu, 12 Jan 2017 01:19:30 +0000 (09:19 +0800)
Add dmc,sram,noc nodes which are used for ddr function

Change-Id: I5798f7a2c444adf6940b44fe0cdadca8655e534e
Signed-off-by: Jacob Chen <jacob2.chen@rock-chips.com>
arch/arm/boot/dts/rk3288.dtsi

index 6106902c588e6ffbb8d3a24d5a91f714fe51468a..56334c10387bc1fbd1ffbed9fc64e98bf5445254 100644 (file)
                status = "disabled";
        };
 
+       dmc: dmc@ff610000 {
+               compatible = "rockchip,rk3288-dmc", "syscon";
+               rockchip,cru = <&cru>;
+               rockchip,grf = <&grf>;
+               rockchip,pmu = <&pmu>;
+               rockchip,sgrf = <&sgrf>;
+               rockchip,noc = <&noc>;
+               reg = <0xff610000 0x3fc
+                      0xff620000 0x294
+                      0xff630000 0x3fc
+                      0xff640000 0x294>;
+               rockchip,sram = <&ddr_sram>;
+               clocks = <&cru PCLK_DDRUPCTL0>, <&cru PCLK_PUBL0>,
+                        <&cru PCLK_DDRUPCTL1>, <&cru PCLK_PUBL1>,
+                        <&cru ARMCLK>, <&cru ACLK_DMAC1>;
+               clock-names = "pclk_ddrupctl0", "pclk_publ0",
+                             "pclk_ddrupctl1", "pclk_publ1",
+                             "arm_clk", "aclk_dmac1";
+       };
+
        i2c0: i2c@ff650000 {
                compatible = "rockchip,rk3288-i2c";
                reg = <0xff650000 0x1000>;
                        compatible = "rockchip,rk3066-smp-sram";
                        reg = <0x00 0x10>;
                };
+               ddr_sram: ddr-sram@1000 {
+                       compatible = "rockchip,rk3288-ddr-sram";
+                       reg = <0x1000 0x4000>;
+               };
        };
 
        sram@ff720000 {
                };
        };
 
+       noc: syscon@ffac0000 {
+               compatible = "rockchip,rk3288-noc", "syscon";
+               reg = <0xffac0000 0x2000>;
+       };
+
        vpu: video-codec@ff9a0000 {
                compatible = "rockchip,rk3288-vpu";
                reg = <0xff9a0000 0x800>;