dt-bindings: add binding document for Rockchip cpu avs
authorFinley Xiao <finley.xiao@rock-chips.com>
Wed, 2 Nov 2016 09:48:41 +0000 (17:48 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 4 Nov 2016 11:48:33 +0000 (19:48 +0800)
This patch documents the Rockchip cpu avs device tree binding.

Change-Id: I4a86cd384f304a5d77ff2763b2347804699b9b93
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt [new file with mode: 0644]

diff --git a/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt b/Documentation/devicetree/bindings/power/rockchip-cpu-avs.txt
new file mode 100644 (file)
index 0000000..25ba862
--- /dev/null
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+Rockchip cpu avs device tree bindings
+-------------------------------------
+
+Under the same frequency, the operating voltage tends to decrease with
+increasing leakage. so it is necessary to adjust opp's voltage according
+to leakage for power.
+
+
+Required properties:
+- cluster-id: At runtime, the platform can find a cpu's cluster_id
+  according to it's cpu_id and match cluster-id property.
+- min-volt: The minimum voltage in uV. Even though opp's voltage will be
+  adjusted, it must be bigger than or equal to the minimum.
+- min-freq: The minimum frequency in KHz. If an opp's frequency is bigger
+  than or equal to the minimum, its volatge will be adjusted.
+- leakage-adjust-volt: The property is an array of 3-tuples items, and
+  each item consists of leakage and voltage like
+  <min-leakage-mA max-leakage-mA volt-uV>.
+       min-leakage: minimum leakage in mA, ranges from 0 to 254.
+       max-leakage: maximum leakage in mA, ranges from 0 to 254.
+       volt: voltage offset in uV to apply to the opp table entries.
+- nvmem-cells: A phandle to the leakage data provided by efuse.
+- nvmem-cell-names: Should be "cpu_leakage".
+
+Example:
+
+       cpu_avs: cpu-avs {
+               cluster0-avs {
+                       cluster-id = <0>;
+                       min-volt = <800000>; /* uV */
+                       min-freq = <408000>; /* KHz */
+                       leakage-adjust-volt = <
+                       /*  mA        mA         uV */
+                           0         254        0
+                       >;
+                       nvmem-cells = <&cpul_leakage>;
+                       nvmem-cell-names = "cpu_leakage";
+               };
+               cluster1-avs {
+                       cluster-id = <1>;
+                       min-volt = <800000>; /* uV */
+                       min-freq = <408000>; /* KHz */
+                       leakage-adjust-volt = <
+                       /*  mA        mA         uV */
+                           0         254        0
+                       >;
+                       nvmem-cells = <&cpub_leakage>;
+                       nvmem-cell-names = "cpu_leakage";
+               };
+       };