arm64: dts: rk3368-android: debug uart id change to uart3

Change earlycon and console to uart3.

Change-Id: I7c6d7322e077b605b209dce4cf51afb26b9147dc
Signed-off-by: Jianqun Xu <jay.xu@rock-chips.com>

diff --git a/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi b/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
index 9b6e815c6c84e1d07ff26fa70db91f917ffef821..2dd5af22d98a001cba9dc66165f0c986d426b840 100644 (file)
--- a/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3368-android.dtsi
@@ -42,18 +42,18 @@
 
 / {
        chosen {
-               bootargs = "earlycon=uart8250,mmio32,0xff690000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
+               bootargs = "earlycon=uart8250,mmio32,0xff1b0000 swiotlb=1 firmware_class.path=/system/vendor/firmware";
        };
 
        fiq_debugger: fiq-debugger {
                compatible = "rockchip,fiq-debugger";
-               rockchip,serial-id = <2>;
+               rockchip,serial-id = <3>;
                rockchip,signal-irq = <186>;
                rockchip,wake-irq = <0>;
                rockchip,irq-mode-enable = <1>;  /* If enable uart uses irq instead of fiq */
                rockchip,baudrate = <115200>;  /* Only 115200 and 1500000 */
                pinctrl-names = "default";
-               pinctrl-0 = <&uart2_xfer>;
+               pinctrl-0 = <&uart3_xfer>;
        };
 
        reserved-memory {
@@ -216,6 +216,10 @@
        };
 };
 
+&uart3 {
+       status = "okay";
+};
+
 &vop {
        status = "okay";
 };