arm64: dts: rockchip: update tsadc node for rk3368
authorRocky Hao <rocky.hao@rock-chips.com>
Fri, 17 Mar 2017 02:19:05 +0000 (10:19 +0800)
committerRocky Hao <rocky.hao@rock-chips.com>
Tue, 21 Mar 2017 03:54:41 +0000 (11:54 +0800)
Change-Id: I0c99dcc6b5515639a496b915832542c3b844f4c8
Signed-off-by: Rocky Hao <rocky.hao@rock-chips.com>
arch/arm64/boot/dts/rockchip/rk3368.dtsi

index c3a29e3..4845d82 100644 (file)
        };
 
        tsadc: tsadc@ff280000 {
-               compatible = "rockchip,rk3368-tsadc";
+               compatible = "rockchip,rk3368-tsadc-legacy";
                reg = <0x0 0xff280000 0x0 0x100>;
                interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
                clocks = <&cru SCLK_TSADC>, <&cru PCLK_TSADC>;
                clock-names = "tsadc", "apb_pclk";
+               clock-frequency = <32768>;
                resets = <&cru SRST_TSADC>;
                reset-names = "tsadc-apb";
-               pinctrl-names = "init", "default", "sleep";
-               pinctrl-0 = <&otp_gpio>;
-               pinctrl-1 = <&otp_out>;
-               pinctrl-2 = <&otp_gpio>;
+               nvmem-cells = <&temp_adjust>;
+               nvmem-cell-names = "temp_adjust";
                #thermal-sensor-cells = <1>;
-               rockchip,hw-tshut-temp = <95000>;
+               hw-shut-temp = <95000>;
                status = "disabled";
        };
 
                        };
                };
 
-               tsadc {
-                       otp_gpio: otp-gpio {
-                               rockchip,pins = <0 3 RK_FUNC_GPIO &pcfg_pull_none>;
-                       };
-
-                       otp_out: otp-out {
-                               rockchip,pins = <0 3 RK_FUNC_1 &pcfg_pull_none>;
-                       };
-               };
-
                uart0 {
                        uart0_xfer: uart0-xfer {
                                rockchip,pins = <2 24 RK_FUNC_1 &pcfg_pull_up>,