clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 3 Feb 2015 00:13:49 +0000 (09:13 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 5 Feb 2015 14:21:06 +0000 (15:21 +0100)
commitdf40a13ca53e6f83ead88e718dd96654e75365ec
tree5bd3c9d023d188b0545aafe280dffbd73b8d727e
parent2a2f33e83ddb6c0abe3d32075f795aa14e4b9476
clk: samsung: exynos5433: Add clocks for CMU_APOLLO domain

This patch adds the mux/divider/gate clocks for CMU_APOLLO domain
which generates the clocks for Cortex-A53 Quad-core processsor.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
[s.nawrocki@samsung.com: Renamed pclk_pmu_sysreg_apollo to pclk_sysreg_apollo]
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Documentation/devicetree/bindings/clock/exynos5433-clock.txt
drivers/clk/samsung/clk-exynos5433.c
include/dt-bindings/clock/exynos5433.h