drm/i915: ILK cdclk seems to be 450MHz
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Tue, 31 Mar 2015 11:11:54 +0000 (14:11 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Tue, 31 Mar 2015 15:28:43 +0000 (17:28 +0200)
commitb37a6434cfa9477e6e5cb386e7e3d135073aef63
treef3b8094c5472d3e7093c3bd39eaddc22129bbc84
parente907f1704c402122b0c0a206d8064e19b79ed1c3
drm/i915: ILK cdclk seems to be 450MHz

Based on the BIOS DP A AUX 2x clock divider the cdclk frequency
on ILK is 450Mhz. At least that holds on my ILK and it matches
how we program the divider.

Supposedly cdclk is 400MHz on SNB and IVB, again based on the AUX 2x
clock divider. Note that I don't have a SNB or IVB machine with
eDP so I couldn't verify what the BIOS used, so this notion is
purely based on our current code,

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Damien Lespiau <damien.lespiau@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/intel_display.c