clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain
authorChanwoo Choi <cw00.choi@samsung.com>
Tue, 3 Feb 2015 00:13:56 +0000 (09:13 +0900)
committerSylwester Nawrocki <s.nawrocki@samsung.com>
Thu, 5 Feb 2015 18:31:08 +0000 (19:31 +0100)
commita5958a939bbf93e6b77cb3626c6aebde237ad759
tree006941dc9a66f2a8141c4dc60908b9ec5f56d125
parent6958f22f39f9292f6e871b4383a11f183c1271ed
clk: samsung: exynos5433: Add clocks for CMU_CAM1 domain

This patch adds the mux/divider/gate clocks for CMU_CAM1 domain which
generates the clocks for Cortex-A5/MIPI_CSIS2/FIMC-LITE_C/FIMC-FD IPs.

Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Acked-by: Inki Dae <inki.dae@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Documentation/devicetree/bindings/clock/exynos5433-clock.txt
drivers/clk/samsung/clk-exynos5433.c
include/dt-bindings/clock/exynos5433.h