UPSTREAM: clk: rockchip: add clock controller for rk3128
authorElaine Zhang <zhangqing@rock-chips.com>
Fri, 2 Jun 2017 01:47:25 +0000 (09:47 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Mon, 5 Jun 2017 06:30:59 +0000 (14:30 +0800)
commita558b95e2c8e11be91b40feb2e2f40a27607893a
treea202bf2bde894d646a7de96aec5f8a4505716536
parent7c7c946356a9d1d398aabba1fcf9c6637e35c7b6
UPSTREAM: clk: rockchip: add clock controller for rk3128

Add the clock tree definition for the new rk3128 SoC.
And it also applies to the RK3126 SoC.

Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from git.kernel.org mmind/linux-rockchip.git v4.13-clk/next
 commit f6022e88faca1a6a21cbd0f009b477bc530b9cc7)

Change-Id: Ib933e398bc8e40d8659bc1cdc419116f48f6ae30
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
drivers/clk/rockchip/Makefile
drivers/clk/rockchip/clk-rk3128.c [new file with mode: 0644]