UPSTREAM: clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent
authorSjoerd Simons <sjoerd.simons@collabora.co.uk>
Tue, 22 Dec 2015 21:28:02 +0000 (22:28 +0100)
committerHuang, Tao <huangtao@rock-chips.com>
Thu, 18 Feb 2016 11:16:37 +0000 (19:16 +0800)
commit7e878e433c76556acf62c4d76403a4680143a601
tree73b77b328e4629dbb4306ae9cc18cf5dd03dd098
parent7abdf253f05def2fb98fd6dae8b03fbf3d482827
UPSTREAM: clk: rockchip: Allow the RK3288 SPDIF clocks to change their parent

The clock branches leading to sclk_spdif and sclk_spdif_8ch on RK3288
SoCs only feed those clocks, allow those clocks to change their parents
all the way up the hierarchy.

Signed-off-by: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
(cherry picked from commit 84a8c541664b037a4d1fdc3151466b4ec45c37a5)

Change-Id: Id362013ba195fdb88e4cdbaed2468deaafc04e64
drivers/clk/rockchip/clk-rk3288.c