drm/i915: Fix command parser to validate multiple register access with the same command.
authorFrancisco Jerez <currojerez@riseup.net>
Fri, 29 May 2015 13:44:13 +0000 (16:44 +0300)
committerDaniel Vetter <daniel.vetter@ffwll.ch>
Mon, 15 Jun 2015 10:34:26 +0000 (12:34 +0200)
commit6a65c5b9326c9dd391afb1b3df75cbedffbaccdb
tree835c797d0dc83fbd27498b8b7bda4ab7ed55ef3d
parentfcc0008fd02330f1c539a8dd831b00ca9b998cd8
drm/i915: Fix command parser to validate multiple register access with the same command.

Until now the software command checker assumed that commands could
read or write at most a single register per packet.  This is not
necessarily the case, MI_LOAD_REGISTER_IMM expects a variable-length
list of offset/value pairs and writes them in sequence.  The previous
code would only check whether the first entry was valid, effectively
allowing userspace to write unrestricted registers of the MMIO space
by sending a multi-register write with a legal first register, with
potential security implications on Gen6 and 7 hardware.

Fix it by extending the drm_i915_cmd_descriptor table to represent
multi-register access and making validate_cmd() iterate for all
register offsets present in the command packet.

Signed-off-by: Francisco Jerez <currojerez@riseup.net>
Reviewed-by: Zhigang Gong <zhigang.gong@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
drivers/gpu/drm/i915/i915_cmd_parser.c
drivers/gpu/drm/i915/i915_drv.h