UPSTREAM: clk: rockchip: add mipidsi clock on rk3288
authorChris Zhong <zyw@rock-chips.com>
Thu, 26 Nov 2015 07:50:16 +0000 (15:50 +0800)
committerHuang, Tao <huangtao@rock-chips.com>
Fri, 18 Mar 2016 02:43:07 +0000 (10:43 +0800)
commit627e6431eb41cb03e22b8f882bc0bc73f8308f18
tree766b765e93d80a609de8ac17171d96151dfd1482
parente965c04156a412f7b4760129b7f3340d04c2b44c
UPSTREAM: clk: rockchip: add mipidsi clock on rk3288

sclk_mipidsi_24m is the gating of mipi dsi phy.

Change-Id: I15b3e7a17b06397eb825eb2faca37d77732c9a97
Signed-off-by: Chris Zhong <zyw@rock-chips.com>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
(cherry picked from commit a2f4c560f18edd2ffe0f15d52ce2be55cff605d2)
drivers/clk/rockchip/clk-rk3288.c