arm64: atomics: prefetch the destination word for write prior to stxr
authorWill Deacon <will.deacon@arm.com>
Fri, 29 May 2015 12:31:10 +0000 (13:31 +0100)
committerWill Deacon <will.deacon@arm.com>
Mon, 27 Jul 2015 14:28:53 +0000 (15:28 +0100)
commit0ea366f5e1b6413a6095dce60ea49ae51e468b61
treefce4fc690edf16784d21a714415a74a8ce53eb2b
parenta82e62382fcbbf5c3348e802af73583e0cac39c0
arm64: atomics: prefetch the destination word for write prior to stxr

The cost of changing a cacheline from shared to exclusive state can be
significant, especially when this is triggered by an exclusive store,
since it may result in having to retry the transaction.

This patch makes use of prfm to prefetch cachelines for write prior to
ldxr/stxr loops when using the ll/sc atomic routines.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
arch/arm64/include/asm/atomic_ll_sc.h
arch/arm64/include/asm/cmpxchg.h
arch/arm64/include/asm/futex.h
arch/arm64/lib/bitops.S