X-Git-Url: http://plrg.eecs.uci.edu/git/?p=firefly-linux-kernel-4.4.55.git;a=blobdiff_plain;f=drivers%2Fgpu%2Fdrm%2Frockchip%2Frockchip_drm_vop.c;h=39d0020d9e3c2d806484b27620fa8a09cb1c57d2;hp=d3c80337b083cb48a869facfeb0ca047fe8d9f6b;hb=acb8c96304b55b224f95a34c0edebe509ae80266;hpb=e5683dd6c1ca3bd95e8c79e00ab2811e9198a05c diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d3c80337b083..39d0020d9e3c 100644 --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c @@ -30,39 +30,62 @@ #include #include +#include #include "rockchip_drm_drv.h" #include "rockchip_drm_gem.h" #include "rockchip_drm_fb.h" #include "rockchip_drm_vop.h" -#define __REG_SET_RELAXED(x, off, mask, shift, v, write_mask) \ - vop_mask_write(x, off, mask, shift, v, write_mask, true) +#define VOP_REG_SUPPORT(vop, reg) \ + (!reg.major || (reg.major == VOP_MAJOR(vop->data->version) && \ + reg.begin_minor <= VOP_MINOR(vop->data->version) && \ + reg.end_minor >= VOP_MINOR(vop->data->version) && \ + reg.mask)) -#define __REG_SET_NORMAL(x, off, mask, shift, v, write_mask) \ - vop_mask_write(x, off, mask, shift, v, write_mask, false) +#define VOP_WIN_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, win->phy->name) -#define REG_SET(x, base, reg, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, \ - reg.mask, reg.shift, v, reg.write_mask) -#define REG_SET_MASK(x, base, reg, mask, v, mode) \ - __REG_SET_##mode(x, base + reg.offset, \ - mask, reg.shift, v, reg.write_mask) +#define VOP_CTRL_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, vop->data->ctrl->name) + +#define VOP_INTR_SUPPORT(vop, win, name) \ + VOP_REG_SUPPORT(vop, vop->data->intr->name) + +#define __REG_SET(x, off, mask, shift, v, write_mask, relaxed) \ + vop_mask_write(x, off, mask, shift, v, write_mask, relaxed) + +#define _REG_SET(vop, name, off, reg, mask, v, relaxed) \ + do { \ + if (VOP_REG_SUPPORT(vop, reg)) \ + __REG_SET(vop, off + reg.offset, mask, reg.shift, \ + v, reg.write_mask, relaxed); \ + else \ + dev_dbg(vop->dev, "Warning: not support "#name"\n"); \ + } while(0) + +#define REG_SET(x, name, off, reg, v, relaxed) \ + _REG_SET(x, name, off, reg, reg.mask, v, relaxed) +#define REG_SET_MASK(x, name, off, reg, mask, v, relaxed) \ + _REG_SET(x, name, off, reg, reg.mask & mask, v, relaxed) #define VOP_WIN_SET(x, win, name, v) \ - REG_SET(x, win->base, win->phy->name, v, RELAXED) + REG_SET(x, name, win->offset, VOP_WIN_NAME(win, name), v, true) #define VOP_SCL_SET(x, win, name, v) \ - REG_SET(x, win->base, win->phy->scl->name, v, RELAXED) + REG_SET(x, name, win->offset, win->phy->scl->name, v, true) #define VOP_SCL_SET_EXT(x, win, name, v) \ - REG_SET(x, win->base, win->phy->scl->ext->name, v, RELAXED) + REG_SET(x, name, win->offset, win->phy->scl->ext->name, v, true) + #define VOP_CTRL_SET(x, name, v) \ - REG_SET(x, 0, (x)->data->ctrl->name, v, NORMAL) + REG_SET(x, name, 0, (x)->data->ctrl->name, v, false) #define VOP_INTR_GET(vop, name) \ vop_read_reg(vop, 0, &vop->data->ctrl->name) #define VOP_INTR_SET(vop, name, mask, v) \ - REG_SET_MASK(vop, 0, vop->data->intr->name, mask, v, NORMAL) + REG_SET_MASK(vop, name, 0, vop->data->intr->name, \ + mask, v, false) + #define VOP_INTR_SET_TYPE(vop, name, type, v) \ do { \ int i, reg = 0, mask = 0; \ @@ -77,19 +100,31 @@ #define VOP_INTR_GET_TYPE(vop, name, type) \ vop_get_intr_type(vop, &vop->data->intr->name, type) +#define VOP_CTRL_GET(x, name) \ + vop_read_reg(x, 0, vop->data->ctrl->name) + #define VOP_WIN_GET(x, win, name) \ - vop_read_reg(x, win->base, &win->phy->name) + vop_read_reg(x, win->offset, &VOP_WIN_NAME(win, name)) + +#define VOP_WIN_NAME(win, name) \ + (vop_get_win_phy(win, &win->phy->name)->name) #define VOP_WIN_GET_YRGBADDR(vop, win) \ - vop_readl(vop, win->base + win->phy->yrgb_mst.offset) + vop_readl(vop, win->offset + VOP_WIN_NAME(win, yrgb_mst).offset) #define to_vop(x) container_of(x, struct vop, crtc) #define to_vop_win(x) container_of(x, struct vop_win, base) #define to_vop_plane_state(x) container_of(x, struct vop_plane_state, base) +struct vop_zpos { + int win_id; + int zpos; +}; + struct vop_plane_state { struct drm_plane_state base; int format; + int zpos; struct drm_rect src; struct drm_rect dest; dma_addr_t yrgb_mst; @@ -97,10 +132,19 @@ struct vop_plane_state { }; struct vop_win { + struct vop_win *parent; struct drm_plane base; - const struct vop_win_data *data; + + int win_id; + int area_id; + uint32_t offset; + enum drm_plane_type type; + const struct vop_win_phy *phy; + const uint32_t *data_formats; + uint32_t nformats; struct vop *vop; + struct drm_property *rotation_prop; struct vop_plane_state state; }; @@ -108,6 +152,7 @@ struct vop { struct drm_crtc crtc; struct device *dev; struct drm_device *drm_dev; + struct drm_property *plane_zpos_prop; bool is_enabled; /* mutex vsync_ work */ @@ -118,6 +163,7 @@ struct vop { struct drm_pending_vblank_event *event; const struct vop_data *data; + int num_wins; uint32_t *regsbak; void __iomem *regs; @@ -170,11 +216,11 @@ static inline void vop_mask_write(struct vop *vop, uint32_t offset, return; if (write_mask) { - v = (v << shift) | (mask << (shift + 16)); + v = ((v & mask) << shift) | (mask << (shift + 16)); } else { uint32_t cached_val = vop->regsbak[offset >> 2]; - v = (cached_val & ~(mask << shift)) | (v << shift); + v = (cached_val & ~(mask << shift)) | ((v & mask) << shift); vop->regsbak[offset >> 2] = v; } @@ -184,6 +230,15 @@ static inline void vop_mask_write(struct vop *vop, uint32_t offset, writel(v, vop->regs + offset); } +static inline const struct vop_win_phy * +vop_get_win_phy(struct vop_win *win, const struct vop_reg *reg) +{ + if (!reg->mask && win->parent) + return win->parent->phy; + + return win->phy; +} + static inline uint32_t vop_get_intr_type(struct vop *vop, const struct vop_reg *reg, int type) { @@ -296,9 +351,9 @@ static uint16_t scl_vop_cal_scale(enum scale_mode mode, uint32_t src, return val; } -static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, - uint32_t src_w, uint32_t src_h, uint32_t dst_w, - uint32_t dst_h, uint32_t pixel_format) +static void scl_vop_cal_scl_fac(struct vop *vop, struct vop_win *win, + uint32_t src_w, uint32_t src_h, uint32_t dst_w, + uint32_t dst_h, uint32_t pixel_format) { uint16_t yrgb_hor_scl_mode, yrgb_ver_scl_mode; uint16_t cbcr_hor_scl_mode = SCALE_NONE; @@ -311,7 +366,10 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, uint16_t vsu_mode; uint16_t lb_mode; uint32_t val; - int vskiplines; + int vskiplines = 0; + + if (!win->phy->scl) + return; if (dst_w > 3840) { DRM_ERROR("Maximum destination width (3840) exceeded\n"); @@ -325,9 +383,9 @@ static void scl_vop_cal_scl_fac(struct vop *vop, const struct vop_win_data *win, scl_cal_scale2(src_h, dst_h)); if (is_yuv) { VOP_SCL_SET(vop, win, scale_cbcr_x, - scl_cal_scale2(src_w, dst_w)); + scl_cal_scale2(cbcr_src_w, dst_w)); VOP_SCL_SET(vop, win, scale_cbcr_y, - scl_cal_scale2(src_h, dst_h)); + scl_cal_scale2(cbcr_src_h, dst_h)); } return; } @@ -430,35 +488,32 @@ static void vop_dsp_hold_valid_irq_disable(struct vop *vop) static void vop_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); - int ret; - - if (vop->is_enabled) - return; - - ret = pm_runtime_get_sync(vop->dev); - if (ret < 0) { - dev_err(vop->dev, "failed to get pm runtime: %d\n", ret); - return; - } + int ret, i; - ret = clk_enable(vop->hclk); + ret = clk_prepare_enable(vop->hclk); if (ret < 0) { dev_err(vop->dev, "failed to enable hclk - %d\n", ret); return; } - ret = clk_enable(vop->dclk); + ret = clk_prepare_enable(vop->dclk); if (ret < 0) { dev_err(vop->dev, "failed to enable dclk - %d\n", ret); goto err_disable_hclk; } - ret = clk_enable(vop->aclk); + ret = clk_prepare_enable(vop->aclk); if (ret < 0) { dev_err(vop->dev, "failed to enable aclk - %d\n", ret); goto err_disable_dclk; } + ret = pm_runtime_get_sync(vop->dev); + if (ret < 0) { + dev_err(vop->dev, "failed to get pm runtime: %d\n", ret); + return; + } + /* * Slave iommu shares power, irq and clock with vop. It was associated * automatically with this master device via common driver code. @@ -471,7 +526,16 @@ static void vop_enable(struct drm_crtc *crtc) goto err_disable_aclk; } - memcpy(vop->regs, vop->regsbak, vop->len); + memcpy(vop->regsbak, vop->regs, vop->len); + + VOP_CTRL_SET(vop, global_regdone_en, 1); + + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; + + VOP_WIN_SET(vop, win, gate, 1); + } + /* * At here, vop clock & iommu is enable, R/W vop regs would be safe. */ @@ -490,11 +554,11 @@ static void vop_enable(struct drm_crtc *crtc) return; err_disable_aclk: - clk_disable(vop->aclk); + clk_disable_unprepare(vop->aclk); err_disable_dclk: - clk_disable(vop->dclk); + clk_disable_unprepare(vop->dclk); err_disable_hclk: - clk_disable(vop->hclk); + clk_disable_unprepare(vop->hclk); } static void vop_crtc_disable(struct drm_crtc *crtc) @@ -502,22 +566,19 @@ static void vop_crtc_disable(struct drm_crtc *crtc) struct vop *vop = to_vop(crtc); int i; - if (!vop->is_enabled) - return; - /* * We need to make sure that all windows are disabled before we * disable that crtc. Otherwise we might try to scan from a destroyed * buffer later. */ - for (i = 0; i < vop->data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - const struct vop_win_data *win = vop_win->data; + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; spin_lock(&vop->reg_lock); VOP_WIN_SET(vop, win, enable, 0); spin_unlock(&vop->reg_lock); } + vop_cfg_done(vop); drm_crtc_vblank_off(crtc); @@ -550,10 +611,10 @@ static void vop_crtc_disable(struct drm_crtc *crtc) */ rockchip_drm_dma_detach_device(vop->drm_dev, vop->dev); - clk_disable(vop->dclk); - clk_disable(vop->aclk); - clk_disable(vop->hclk); pm_runtime_put(vop->dev); + clk_disable_unprepare(vop->dclk); + clk_disable_unprepare(vop->aclk); + clk_disable_unprepare(vop->hclk); } static void vop_plane_destroy(struct drm_plane *plane) @@ -561,14 +622,30 @@ static void vop_plane_destroy(struct drm_plane *plane) drm_plane_cleanup(plane); } +static int vop_plane_prepare_fb(struct drm_plane *plane, + const struct drm_plane_state *new_state) +{ + if (plane->state->fb) + drm_framebuffer_reference(plane->state->fb); + + return 0; +} + +static void vop_plane_cleanup_fb(struct drm_plane *plane, + const struct drm_plane_state *old_state) +{ + if (old_state->fb) + drm_framebuffer_unreference(old_state->fb); +} + static int vop_plane_atomic_check(struct drm_plane *plane, struct drm_plane_state *state) { struct drm_crtc *crtc = state->crtc; struct drm_framebuffer *fb = state->fb; - struct vop_win *vop_win = to_vop_win(plane); + struct vop_win *win = to_vop_win(plane); struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); - const struct vop_win_data *win = vop_win->data; + struct drm_crtc_state *crtc_state; bool visible; int ret; struct drm_rect *dest = &vop_plane_state->dest; @@ -585,6 +662,11 @@ static int vop_plane_atomic_check(struct drm_plane *plane, */ if (!crtc || !fb) goto out_disable; + + crtc_state = drm_atomic_get_crtc_state(state->state, crtc); + if (IS_ERR(crtc_state)) + return PTR_ERR(crtc_state); + src->x1 = state->src_x; src->y1 = state->src_y; src->x2 = state->src_x + state->src_w; @@ -596,8 +678,8 @@ static int vop_plane_atomic_check(struct drm_plane *plane, clip.x1 = 0; clip.y1 = 0; - clip.x2 = crtc->mode.hdisplay; - clip.y2 = crtc->mode.vdisplay; + clip.x2 = crtc_state->mode.hdisplay; + clip.y2 = crtc_state->mode.vdisplay; ret = drm_plane_helper_check_update(plane, crtc, state->fb, src, dest, &clip, @@ -634,8 +716,7 @@ static void vop_plane_atomic_disable(struct drm_plane *plane, struct drm_plane_state *old_state) { struct vop_plane_state *vop_plane_state = to_vop_plane_state(old_state); - struct vop_win *vop_win = to_vop_win(plane); - const struct vop_win_data *win = vop_win->data; + struct vop_win *win = to_vop_win(plane); struct vop *vop = to_vop(old_state->crtc); if (!old_state->crtc) @@ -655,9 +736,9 @@ static void vop_plane_atomic_update(struct drm_plane *plane, { struct drm_plane_state *state = plane->state; struct drm_crtc *crtc = state->crtc; - struct vop_win *vop_win = to_vop_win(plane); + struct vop_win *win = to_vop_win(plane); struct vop_plane_state *vop_plane_state = to_vop_plane_state(state); - const struct vop_win_data *win = vop_win->data; + struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); struct vop *vop = to_vop(state->crtc); struct drm_framebuffer *fb = state->fb; unsigned int actual_w, actual_h; @@ -669,6 +750,7 @@ static void vop_plane_atomic_update(struct drm_plane *plane, struct rockchip_gem_object *rk_obj, *rk_uv_obj; unsigned long offset; dma_addr_t dma_addr; + int ymirror, xmirror; uint32_t val; bool rb_swap; @@ -701,11 +783,19 @@ static void vop_plane_atomic_update(struct drm_plane *plane, dsp_st = dsp_sty << 16 | (dsp_stx & 0xffff); offset = (src->x1 >> 16) * drm_format_plane_cpp(fb->pixel_format, 0); - offset += (src->y1 >> 16) * fb->pitches[0]; + if (state->rotation & BIT(DRM_REFLECT_Y)) + offset += ((src->y2 >> 16) - 1) * fb->pitches[0]; + else + offset += (src->y1 >> 16) * fb->pitches[0]; vop_plane_state->yrgb_mst = rk_obj->dma_addr + offset + fb->offsets[0]; + ymirror = !!(state->rotation & BIT(DRM_REFLECT_Y)); + xmirror = !!(state->rotation & BIT(DRM_REFLECT_X)); + spin_lock(&vop->reg_lock); + VOP_WIN_SET(vop, win, xmirror, xmirror); + VOP_WIN_SET(vop, win, ymirror, ymirror); VOP_WIN_SET(vop, win, format, vop_plane_state->format); VOP_WIN_SET(vop, win, yrgb_vir, fb->pitches[0] >> 2); VOP_WIN_SET(vop, win, yrgb_mst, vop_plane_state->yrgb_mst); @@ -725,10 +815,9 @@ static void vop_plane_atomic_update(struct drm_plane *plane, VOP_WIN_SET(vop, win, uv_mst, dma_addr); } - if (win->phy->scl) - scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, - drm_rect_width(dest), drm_rect_height(dest), - fb->pixel_format); + scl_vop_cal_scl_fac(vop, win, actual_w, actual_h, + drm_rect_width(dest), drm_rect_height(dest), + fb->pixel_format); VOP_WIN_SET(vop, win, act_info, act_info); VOP_WIN_SET(vop, win, dsp_info, dsp_info); @@ -737,7 +826,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane, rb_swap = has_rb_swapped(fb->pixel_format); VOP_WIN_SET(vop, win, rb_swap, rb_swap); - if (is_alpha_support(fb->pixel_format)) { + if (is_alpha_support(fb->pixel_format) && + (s->dsp_layer_sel & 0x3) != win->win_id) { VOP_WIN_SET(vop, win, dst_alpha_ctl, DST_FACTOR_M0(ALPHA_SRC_INVERSE)); val = SRC_ALPHA_EN(1) | SRC_COLOR_M0(ALPHA_SRC_PRE_MUL) | @@ -746,8 +836,11 @@ static void vop_plane_atomic_update(struct drm_plane *plane, SRC_ALPHA_CAL_M0(ALPHA_NO_SATURATION) | SRC_FACTOR_M0(ALPHA_ONE); VOP_WIN_SET(vop, win, src_alpha_ctl, val); + VOP_WIN_SET(vop, win, alpha_mode, 1); + VOP_WIN_SET(vop, win, alpha_en, 1); } else { VOP_WIN_SET(vop, win, src_alpha_ctl, SRC_ALPHA_EN(0)); + VOP_WIN_SET(vop, win, alpha_en, 0); } VOP_WIN_SET(vop, win, enable, 1); @@ -755,6 +848,8 @@ static void vop_plane_atomic_update(struct drm_plane *plane, } static const struct drm_plane_helper_funcs plane_helper_funcs = { + .prepare_fb = vop_plane_prepare_fb, + .cleanup_fb = vop_plane_cleanup_fb, .atomic_check = vop_plane_atomic_check, .atomic_update = vop_plane_atomic_update, .atomic_disable = vop_plane_atomic_disable, @@ -762,6 +857,7 @@ static const struct drm_plane_helper_funcs plane_helper_funcs = { void vop_atomic_plane_reset(struct drm_plane *plane) { + struct vop_win *win = to_vop_win(plane); struct vop_plane_state *vop_plane_state = to_vop_plane_state(plane->state); @@ -773,6 +869,7 @@ void vop_atomic_plane_reset(struct drm_plane *plane) if (!vop_plane_state) return; + vop_plane_state->zpos = win->win_id; plane->state = &vop_plane_state->base; plane->state->plane = plane; } @@ -808,6 +905,50 @@ static void vop_atomic_plane_destroy_state(struct drm_plane *plane, kfree(vop_state); } +static int vop_atomic_plane_set_property(struct drm_plane *plane, + struct drm_plane_state *state, + struct drm_property *property, + uint64_t val) +{ + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *plane_state = to_vop_plane_state(state); + + if (property == win->vop->plane_zpos_prop) { + plane_state->zpos = val; + return 0; + } + + if (property == win->rotation_prop) { + state->rotation = val; + return 0; + } + + DRM_ERROR("failed to set vop plane property\n"); + return -EINVAL; +} + +static int vop_atomic_plane_get_property(struct drm_plane *plane, + const struct drm_plane_state *state, + struct drm_property *property, + uint64_t *val) +{ + struct vop_win *win = to_vop_win(plane); + struct vop_plane_state *plane_state = to_vop_plane_state(state); + + if (property == win->vop->plane_zpos_prop) { + *val = plane_state->zpos; + return 0; + } + + if (property == win->rotation_prop) { + *val = state->rotation; + return 0; + } + + DRM_ERROR("failed to get vop plane property\n"); + return -EINVAL; +} + static const struct drm_plane_funcs vop_plane_funcs = { .update_plane = drm_atomic_helper_update_plane, .disable_plane = drm_atomic_helper_disable_plane, @@ -815,6 +956,8 @@ static const struct drm_plane_funcs vop_plane_funcs = { .reset = vop_atomic_plane_reset, .atomic_duplicate_state = vop_atomic_plane_duplicate_state, .atomic_destroy_state = vop_atomic_plane_destroy_state, + .atomic_set_property = vop_atomic_plane_set_property, + .atomic_get_property = vop_atomic_plane_get_property, }; static int vop_crtc_enable_vblank(struct drm_crtc *crtc) @@ -898,6 +1041,7 @@ static bool vop_crtc_mode_fixup(struct drm_crtc *crtc, static void vop_crtc_enable(struct drm_crtc *crtc) { struct vop *vop = to_vop(crtc); + const struct vop_data *vop_data = vop->data; struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc->state); struct drm_display_mode *adjusted_mode = &crtc->state->adjusted_mode; u16 hsync_len = adjusted_mode->hsync_end - adjusted_mode->hsync_start; @@ -956,19 +1100,28 @@ static void vop_crtc_enable(struct drm_crtc *crtc) switch (s->output_type) { case DRM_MODE_CONNECTOR_LVDS: VOP_CTRL_SET(vop, rgb_en, 1); + VOP_CTRL_SET(vop, rgb_pin_pol, val); break; case DRM_MODE_CONNECTOR_eDP: VOP_CTRL_SET(vop, edp_en, 1); + VOP_CTRL_SET(vop, edp_pin_pol, val); break; case DRM_MODE_CONNECTOR_HDMIA: VOP_CTRL_SET(vop, hdmi_en, 1); + VOP_CTRL_SET(vop, hdmi_pin_pol, val); break; case DRM_MODE_CONNECTOR_DSI: VOP_CTRL_SET(vop, mipi_en, 1); + VOP_CTRL_SET(vop, mipi_pin_pol, val); break; default: DRM_ERROR("unsupport connector_type[%d]\n", s->output_type); } + + if (s->output_mode == ROCKCHIP_OUT_MODE_AAAA && + !(vop_data->feature & VOP_FEATURE_OUTPUT_10BIT)) + s->output_mode = ROCKCHIP_OUT_MODE_P888; + VOP_CTRL_SET(vop, out_mode, s->output_mode); VOP_CTRL_SET(vop, htotal_pw, (htotal << 16) | hsync_len); @@ -988,9 +1141,90 @@ static void vop_crtc_enable(struct drm_crtc *crtc) VOP_CTRL_SET(vop, standby, 0); } +static int vop_zpos_cmp(const void *a, const void *b) +{ + struct vop_zpos *pa = (struct vop_zpos *)a; + struct vop_zpos *pb = (struct vop_zpos *)b; + + return pa->zpos - pb->zpos; +} + +static int vop_crtc_atomic_check(struct drm_crtc *crtc, + struct drm_crtc_state *crtc_state) +{ + struct drm_atomic_state *state = crtc_state->state; + struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state); + struct vop *vop = to_vop(crtc); + const struct vop_data *vop_data = vop->data; + struct drm_plane *plane; + struct drm_plane_state *pstate; + struct vop_plane_state *plane_state; + struct vop_zpos *pzpos; + int dsp_layer_sel = 0; + int i, j, cnt = 0, ret = 0; + + pzpos = kmalloc_array(vop_data->win_size, sizeof(*pzpos), GFP_KERNEL); + if (!pzpos) + return -ENOMEM; + + for (i = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + struct vop_win *win; + + if (!win_data->phy) + continue; + + for (j = 0; j < vop->num_wins; j++) { + win = &vop->win[j]; + + if (win->win_id == i && !win->area_id) + break; + } + if (WARN_ON(j >= vop->num_wins)) { + ret = -EINVAL; + goto err_free_pzpos; + } + + plane = &win->base; + pstate = state->plane_states[drm_plane_index(plane)]; + /* + * plane might not have changed, in which case take + * current state: + */ + if (!pstate) + pstate = plane->state; + plane_state = to_vop_plane_state(pstate); + pzpos[cnt].zpos = plane_state->zpos; + pzpos[cnt++].win_id = win->win_id; + } + + sort(pzpos, cnt, sizeof(pzpos[0]), vop_zpos_cmp, NULL); + + for (i = 0, cnt = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + int shift = i * 2; + + if (win_data->phy) { + struct vop_zpos *zpos = &pzpos[cnt++]; + + dsp_layer_sel |= zpos->win_id << shift; + } else { + dsp_layer_sel |= i << shift; + } + } + + s->dsp_layer_sel = dsp_layer_sel; + +err_free_pzpos: + kfree(pzpos); + return ret; +} + static void vop_crtc_atomic_flush(struct drm_crtc *crtc, struct drm_crtc_state *old_crtc_state) { + struct rockchip_crtc_state *s = + to_rockchip_crtc_state(crtc->state); struct vop *vop = to_vop(crtc); if (WARN_ON(!vop->is_enabled)) @@ -998,6 +1232,7 @@ static void vop_crtc_atomic_flush(struct drm_crtc *crtc, spin_lock(&vop->reg_lock); + VOP_CTRL_SET(vop, dsp_layer_sel, s->dsp_layer_sel); vop_cfg_done(vop); spin_unlock(&vop->reg_lock); @@ -1020,6 +1255,7 @@ static const struct drm_crtc_helper_funcs vop_crtc_helper_funcs = { .enable = vop_crtc_enable, .disable = vop_crtc_disable, .mode_fixup = vop_crtc_mode_fixup, + .atomic_check = vop_crtc_atomic_check, .atomic_flush = vop_crtc_atomic_flush, .atomic_begin = vop_crtc_atomic_begin, }; @@ -1066,9 +1302,9 @@ static bool vop_win_pending_is_complete(struct vop_win *vop_win) dma_addr_t yrgb_mst; if (!state->enable) - return VOP_WIN_GET(vop_win->vop, vop_win->data, enable) == 0; + return VOP_WIN_GET(vop_win->vop, vop_win, enable) == 0; - yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win->data); + yrgb_mst = VOP_WIN_GET_YRGBADDR(vop_win->vop, vop_win); return yrgb_mst == state->yrgb_mst; } @@ -1080,7 +1316,7 @@ static void vop_handle_vblank(struct vop *vop) unsigned long flags; int i; - for (i = 0; i < vop->data->win_size; i++) { + for (i = 0; i < vop->num_wins; i++) { if (!vop_win_pending_is_complete(&vop->win[i])) return; } @@ -1143,9 +1379,52 @@ static irqreturn_t vop_isr(int irq, void *data) return ret; } +static int vop_plane_init(struct vop *vop, struct vop_win *win, + unsigned long possible_crtcs) +{ + struct drm_plane *share = NULL; + unsigned int rotations = 0; + struct drm_property *prop; + int ret; + + if (win->parent) + share = &win->parent->base; + + ret = drm_share_plane_init(vop->drm_dev, &win->base, share, + possible_crtcs, &vop_plane_funcs, + win->data_formats, win->nformats, win->type); + if (ret) { + DRM_ERROR("failed to initialize plane\n"); + return ret; + } + drm_plane_helper_add(&win->base, &plane_helper_funcs); + drm_object_attach_property(&win->base.base, + vop->plane_zpos_prop, win->win_id); + + if (VOP_WIN_SUPPORT(vop, win, xmirror)) + rotations |= BIT(DRM_REFLECT_X); + + if (VOP_WIN_SUPPORT(vop, win, ymirror)) + rotations |= BIT(DRM_REFLECT_Y); + + if (rotations) { + rotations |= BIT(DRM_ROTATE_0); + prop = drm_mode_create_rotation_property(vop->drm_dev, + rotations); + if (!prop) { + DRM_ERROR("failed to create zpos property\n"); + return -EINVAL; + } + drm_object_attach_property(&win->base.base, prop, + BIT(DRM_ROTATE_0)); + win->rotation_prop = prop; + } + + return 0; +} + static int vop_create_crtc(struct vop *vop) { - const struct vop_data *vop_data = vop->data; struct device *dev = vop->dev; struct drm_device *drm_dev = vop->drm_dev; struct drm_plane *primary = NULL, *cursor = NULL, *plane, *tmp; @@ -1159,30 +1438,23 @@ static int vop_create_crtc(struct vop *vop) * to pass them to drm_crtc_init_with_planes, which sets the * "possible_crtcs" to the newly initialized crtc. */ - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - const struct vop_win_data *win_data = vop_win->data; + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; - if (win_data->type != DRM_PLANE_TYPE_PRIMARY && - win_data->type != DRM_PLANE_TYPE_CURSOR) + if (win->type != DRM_PLANE_TYPE_PRIMARY && + win->type != DRM_PLANE_TYPE_CURSOR) continue; - ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, - 0, &vop_plane_funcs, - win_data->phy->data_formats, - win_data->phy->nformats, - win_data->type, NULL); - if (ret) { - DRM_ERROR("failed to initialize plane\n"); + ret = vop_plane_init(vop, win, 0); + if (ret) goto err_cleanup_planes; - } - plane = &vop_win->base; - drm_plane_helper_add(plane, &plane_helper_funcs); + plane = &win->base; if (plane->type == DRM_PLANE_TYPE_PRIMARY) primary = plane; else if (plane->type == DRM_PLANE_TYPE_CURSOR) cursor = plane; + } ret = drm_crtc_init_with_planes(drm_dev, crtc, primary, cursor, @@ -1196,25 +1468,16 @@ static int vop_create_crtc(struct vop *vop) * Create drm_planes for overlay windows with possible_crtcs restricted * to the newly created crtc. */ - for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; - const struct vop_win_data *win_data = vop_win->data; + for (i = 0; i < vop->num_wins; i++) { + struct vop_win *win = &vop->win[i]; unsigned long possible_crtcs = 1 << drm_crtc_index(crtc); - if (win_data->type != DRM_PLANE_TYPE_OVERLAY) + if (win->type != DRM_PLANE_TYPE_OVERLAY) continue; - ret = drm_universal_plane_init(vop->drm_dev, &vop_win->base, - possible_crtcs, - &vop_plane_funcs, - win_data->phy->data_formats, - win_data->phy->nformats, - win_data->type, NULL); - if (ret) { - DRM_ERROR("failed to initialize overlay plane\n"); + ret = vop_plane_init(vop, win, possible_crtcs); + if (ret) goto err_cleanup_crtc; - } - drm_plane_helper_add(&vop_win->base, &plane_helper_funcs); } port = of_get_child_by_name(dev->of_node, "port"); @@ -1269,118 +1532,61 @@ static void vop_destroy_crtc(struct vop *vop) drm_crtc_cleanup(crtc); } -static int vop_initial(struct vop *vop) -{ - const struct vop_data *vop_data = vop->data; - const struct vop_reg_data *init_table = vop_data->init_table; - struct reset_control *ahb_rst; - int i, ret; - - vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); - if (IS_ERR(vop->hclk)) { - dev_err(vop->dev, "failed to get hclk source\n"); - return PTR_ERR(vop->hclk); - } - vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); - if (IS_ERR(vop->aclk)) { - dev_err(vop->dev, "failed to get aclk source\n"); - return PTR_ERR(vop->aclk); - } - vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); - if (IS_ERR(vop->dclk)) { - dev_err(vop->dev, "failed to get dclk source\n"); - return PTR_ERR(vop->dclk); - } - - ret = clk_prepare(vop->dclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare dclk\n"); - return ret; - } - - /* Enable both the hclk and aclk to setup the vop */ - ret = clk_prepare_enable(vop->hclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare/enable hclk\n"); - goto err_unprepare_dclk; - } - - ret = clk_prepare_enable(vop->aclk); - if (ret < 0) { - dev_err(vop->dev, "failed to prepare/enable aclk\n"); - goto err_disable_hclk; - } - - /* - * do hclk_reset, reset all vop registers. - */ - ahb_rst = devm_reset_control_get(vop->dev, "ahb"); - if (IS_ERR(ahb_rst)) { - dev_err(vop->dev, "failed to get ahb reset\n"); - ret = PTR_ERR(ahb_rst); - goto err_disable_aclk; - } - reset_control_assert(ahb_rst); - usleep_range(10, 20); - reset_control_deassert(ahb_rst); - - memcpy(vop->regsbak, vop->regs, vop->len); - - for (i = 0; i < vop_data->table_size; i++) - vop_writel(vop, init_table[i].offset, init_table[i].value); - - for (i = 0; i < vop_data->win_size; i++) { - const struct vop_win_data *win = &vop_data->win[i]; - - VOP_WIN_SET(vop, win, enable, 0); - } - - vop_cfg_done(vop); - - /* - * do dclk_reset, let all config take affect. - */ - vop->dclk_rst = devm_reset_control_get(vop->dev, "dclk"); - if (IS_ERR(vop->dclk_rst)) { - dev_err(vop->dev, "failed to get dclk reset\n"); - ret = PTR_ERR(vop->dclk_rst); - goto err_disable_aclk; - } - reset_control_assert(vop->dclk_rst); - usleep_range(10, 20); - reset_control_deassert(vop->dclk_rst); - - clk_disable(vop->hclk); - clk_disable(vop->aclk); - - vop->is_enabled = false; - - return 0; - -err_disable_aclk: - clk_disable_unprepare(vop->aclk); -err_disable_hclk: - clk_disable_unprepare(vop->hclk); -err_unprepare_dclk: - clk_unprepare(vop->dclk); - return ret; -} - /* * Initialize the vop->win array elements. */ -static void vop_win_init(struct vop *vop) +static int vop_win_init(struct vop *vop) { const struct vop_data *vop_data = vop->data; - unsigned int i; + unsigned int i, j; + unsigned int num_wins = 0; + struct drm_property *prop; for (i = 0; i < vop_data->win_size; i++) { - struct vop_win *vop_win = &vop->win[i]; + struct vop_win *vop_win = &vop->win[num_wins]; const struct vop_win_data *win_data = &vop_data->win[i]; - vop_win->data = win_data; + if (!win_data->phy) + continue; + + vop_win->phy = win_data->phy; + vop_win->offset = win_data->base; + vop_win->type = win_data->type; + vop_win->data_formats = win_data->phy->data_formats; + vop_win->nformats = win_data->phy->nformats; vop_win->vop = vop; + vop_win->win_id = i; + vop_win->area_id = 0; + num_wins++; + + for (j = 0; j < win_data->area_size; j++) { + struct vop_win *vop_area = &vop->win[num_wins]; + const struct vop_win_phy *area = win_data->area[j]; + + vop_area->parent = vop_win; + vop_area->offset = vop_win->offset; + vop_area->phy = area; + vop_area->type = DRM_PLANE_TYPE_OVERLAY; + vop_area->data_formats = vop_win->data_formats; + vop_area->nformats = vop_win->nformats; + vop_area->vop = vop; + vop_area->win_id = i; + vop_area->area_id = j; + num_wins++; + } + } + + vop->num_wins = num_wins; + + prop = drm_property_create_range(vop->drm_dev, DRM_MODE_PROP_ATOMIC, + "ZPOS", 0, vop->data->win_size); + if (!prop) { + DRM_ERROR("failed to create zpos property\n"); + return -EINVAL; } + vop->plane_zpos_prop = prop; + + return 0; } static int vop_bind(struct device *dev, struct device *master, void *data) @@ -1391,14 +1597,21 @@ static int vop_bind(struct device *dev, struct device *master, void *data) struct vop *vop; struct resource *res; size_t alloc_size; - int ret, irq; + int ret, irq, i; + int num_wins = 0; vop_data = of_device_get_match_data(dev); if (!vop_data) return -ENODEV; + for (i = 0; i < vop_data->win_size; i++) { + const struct vop_win_data *win_data = &vop_data->win[i]; + + num_wins += win_data->area_size + 1; + } + /* Allocate vop struct and its vop_win array */ - alloc_size = sizeof(*vop) + sizeof(*vop->win) * vop_data->win_size; + alloc_size = sizeof(*vop) + sizeof(*vop->win) * num_wins; vop = devm_kzalloc(dev, alloc_size, GFP_KERNEL); if (!vop) return -ENOMEM; @@ -1406,9 +1619,12 @@ static int vop_bind(struct device *dev, struct device *master, void *data) vop->dev = dev; vop->data = vop_data; vop->drm_dev = drm_dev; + vop->num_wins = num_wins; dev_set_drvdata(dev, vop); - vop_win_init(vop); + ret = vop_win_init(vop); + if (ret) + return ret; res = platform_get_resource(pdev, IORESOURCE_MEM, 0); vop->len = resource_size(res); @@ -1420,10 +1636,20 @@ static int vop_bind(struct device *dev, struct device *master, void *data) if (!vop->regsbak) return -ENOMEM; - ret = vop_initial(vop); - if (ret < 0) { - dev_err(&pdev->dev, "cannot initial vop dev - err %d\n", ret); - return ret; + vop->hclk = devm_clk_get(vop->dev, "hclk_vop"); + if (IS_ERR(vop->hclk)) { + dev_err(vop->dev, "failed to get hclk source\n"); + return PTR_ERR(vop->hclk); + } + vop->aclk = devm_clk_get(vop->dev, "aclk_vop"); + if (IS_ERR(vop->aclk)) { + dev_err(vop->dev, "failed to get aclk source\n"); + return PTR_ERR(vop->aclk); + } + vop->dclk = devm_clk_get(vop->dev, "dclk_vop"); + if (IS_ERR(vop->dclk)) { + dev_err(vop->dev, "failed to get dclk source\n"); + return PTR_ERR(vop->dclk); } irq = platform_get_irq(pdev, 0);